SI1489EDH [VISHAY]
P-Channel 8 V (D-S) MOSFET; P沟道8 V (D -S )的MOSFET型号: | SI1489EDH |
厂家: | VISHAY |
描述: | P-Channel 8 V (D-S) MOSFET |
文件: | 总12页 (文件大小:264K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
New Product
Si1489EDH
Vishay Siliconix
P-Channel 8 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
•
Halogen-free According to IEC 61249-2-21
VDS (V)
RDS(on) (Ω)
Qg (Typ.)
I
D (A)a
Definition
- 2.0e
- 2.0e
- 2.0e
- 1.5
0.048 at VGS = - 4.5 V
0.059 at VGS = - 2.5 V
0.073 at VGS = - 1.8 V
0.097 at VGS = - 1.5 V
0.190 at VGS = - 1.2 V
•
•
•
•
•
TrenchFET® Power MOSFET
100 % Rg Tested
Typical ESD Performance 2000 V in HBM
Built in ESD Protection with Zener Diode
Compliant to RoHS Directive 2002/95/EC
- 8
10.5 nC
- 0.5
APPLICATIONS
•
Load Switch for Portable Devices
- Cellular Phone/Smart Phone
- DSC
- Portable Game Console
- MP3
- GPS
SOT-363
SC-70 (6-LEADS)
S
D
D
G
1
2
3
6
D
D
S
- Tablet PC
Marking Code
5
4
BS XX
G
Lot Traceability
and Date Code
R
Part # Code
Top View
D
Ordering Information: Si1489EDH-T1-GE3 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted)
A
Parameter
Symbol
Limit
- 8
Unit
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
V
5
- 2.0a, e
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
- 2.0e
Continuous Drain Current (TJ = 150 °C)
ID
- 2.0b, c, e
- 2.0b, c, e
- 8
- 2.0a, e
- 1.3b, c
2.8
A
Pulsed Drain Current (t = 300 µs)
IDM
IS
TC = 25 °C
Continuous Source-Drain Diode Current
TA = 25 °C
TC = 25 °C
T
C = 70 °C
A = 25 °C
1.8
Maximum Power Dissipation
PD
W
1.56b, c
1b, c
T
TA = 70 °C
TJ, Tstg
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d, e
- 55 to 150
260
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambientb, d
Maximum Junction-to-Foot (Drain)
Symbol
RthJA
Typical
60
34
Maximum
Unit
t ≤ 5 s
Steady State
80
45
°C/W
RthJF
Notes:
a. TC = 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. Maximum under steady state conditions is 125 °C/W.
e. Package limited.
Document Number: 67491
S11-0610-Rev. A, 04-Apr-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1489EDH
Vishay Siliconix
SPECIFICATIONS (T = 25 °C, unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
VDS
ΔVDS/TJ
ΔVGS(th)/TJ
VGS(th)
VGS = 0 V, ID = - 250 µA
ID = - 250 µA
Drain-Source Breakdown Voltage
- 8
V
mV/°C
V
V
DS Temperature Coefficient
- 2
VGS(th) Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
2.2
VDS = VGS, ID = - 250 µA
- 0.35
- 0.7
5
IGSS
VDS = 0 V, VGS
=
5 V
VDS = - 8 V, VGS = 0 V
DS = - 8 V, VGS = 0 V, TJ = 55 °C
VDS ≤ - 5 V, VGS = - 4.5 V
VGS = - 4.5 V, ID = - 3.0 A
- 1
µA
A
IDSS
Zero Gate Voltage Drain Current
On-State Drain Currenta
V
- 10
ID(on)
- 8
0.040
0.048
0.060
0.070
0.110
12
0.048
0.059
0.073
0.097
0.190
V
V
V
V
GS = - 2.5 V, ID = - 1.0 A
GS = - 1.8 V, ID = - 1.0 A
GS = - 1.5 V, ID = - 0.5 A
GS = - 1.2 V, ID = - 0.5 A
Drain-Source On-State Resistancea
RDS(on)
Ω
Forward Transconductancea
gfs
VDS = - 4 V, ID = - 3.0 A
S
Dynamicb
Qg
Qgs
Qgd
Rg
10.5
1.5
16
Gate-Source Charge
VDS = - 4 V, VGS = - 4.5 V, ID = - 7.4 A
f = 1 MHz
nC
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
3.3
80
400
90
800
180
Ω
td(on)
tr
td(off)
tf
170
690
630
340
V
DD = - 4 V, RL = 0.7 Ω
ns
ID ≅ - 6 A, VGEN = - 4.5 V, Rg = 1 Ω
Turn-Off Delay Time
Fall Time
1380
1260
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
IS
ISM
VSD
trr
TC = 25 °C
- 2.0
- 8
A
IS = - 2 A, VGS = 0 V
Body Diode Voltage
- 0.8
30
- 1.2
60
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
ns
nC
Qrr
ta
12
25
IF = - 2 A, dI/dt = 100 A/µs, TJ = 25 °C
12
ns
tb
Reverse Recovery Rise Time
18
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 67491
S11-0610-Rev. A, 04-Apr-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1489EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1.E-02
6.000
5.000
4.000
3.000
2.000
1.000
0.000
1.E-03
1.E-04
1.E-05
1.E-06
1.E-07
1.E-08
1.E-09
1.E-10
TJ = 150 °C
TJ = 25 °C
TJ = 25 °C
0
2
4
6
8
10
0
2
4
6
8
10
VGS - Gate-to-Source Voltage (V)
VGS - Gate-Source Voltage (V)
Gate Current vs. Gate-Source Voltage
Gate Current vs. Gate-Source Voltage
5
4
3
2
1
0
8
6
4
2
0
VGS = 5 V thru 2 V
VGS = 1.5 V
TC = 25 °C
TC = 125 °C
VGS = 1 V
TC = - 55 °C
1.2 1.5
0.0
0.3
0.6
0.9
0.0
0.5
1.0
1.5
2.0
2.5
3.0
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Transfer Characteristics
Output Characteristics
0.20
0.16
0.12
0.08
0.04
0.00
6
5
4
3
2
1
0
ID = 7.4 A
VDS = 2 V
VGS = 1.2 V
VGS = 1.5 V
VDS = 4 V
VGS = 2.5 V
VDS = 6.4 V
VGS = 1.8 V
VGS = 4.5 V
0
2
4
6
8
0
3
6
9
12
15
ID - Drain Current (A)
Qg - Total Gate Charge (nC)
Gate Charge
On-Resistance vs. Drain Current
Document Number: 67491
S11-0610-Rev. A, 04-Apr-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1489EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1.3
1.2
1.1
1.0
0.9
0.8
100
10
1
VGS = 4.5 V; ID = 3 A
VGS = 1.8 V; ID = 1 A
VGS = 1.5 V; ID = 0.5 A
TJ = 150 °C
TJ = 25 °C
VGS = 1.2 V; ID = 0.5 A
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
- 50 - 25
0
25
50
75
100 125 150
VSD - Source-to-Drain Voltage (V)
TJ - Junction Temperature (°C)
Soure-Drain Diode Forward Voltage
On-Resistance vs. Junction Temperature
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
0.7
0.6
0.5
0.4
0.3
0.2
ID = 3 A; TJ = 125 °C
ID = 0.5 A; TJ = 125 °C
ID = 250 μA
ID = 3 A; TJ = 25 °C
ID = 0.5 A; TJ = 25 °C
- 50 - 25
0
25
50
75
100 125 150
0.0
1.0
2.0
3.0
4.0
5.0
TJ - Temperature (°C)
VGS - Gate-to-Source Voltage (V)
Threshold Voltage
On-Resistance vs. Gate-to-Source Voltage
30
25
20
15
10
5
10
1
1 ms
10 ms
Limited by RDS(on)
*
100 ms
1 s
10 s
DC
0.1
TA = 25 °C
Single Pulse
BVDSS Limited
0
0.01
0.1
1
10
0.001
0.01
0.1
1
10
100
1000
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Time (s)
Single Pulse Power, Junction-to-Ambient
Safe Operating Area, Junction-to-Ambient
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Document Number: 67491
S11-0610-Rev. A, 04-Apr-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1489EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
8
6
4
Package Limited
2
0
0
25
50
75
100
125
150
25
50
75
100
125
150
TC - Case Temperature (°C)
TC - Foot Temperature (°C)
Current Derating*
Power Derating
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 67491
S11-0610-Rev. A, 04-Apr-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
New Product
Si1489EDH
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?67491.
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Document Number: 67491
S11-0610-Rev. A, 04-Apr-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SCĆ70: 6ĆLEADS
MILLIMETERS
INCHES
Dim Min
Nom Max Min Nom Max
6
1
5
2
4
3
0.90
–
–
1.10
0.10
1.00
0.30
0.25
2.20
2.40
1.35
0.035
–
–
–
0.043
0.004
0.039
0.012
0.010
0.087
0.094
0.053
A
E
E
1
–
A1
0.80
–
0.031
0.006
0.004
0.071
0.071
0.045
–
A2
0.15
–
–
b
-B-
0.10
–
–
c
e
b
1.80
2.00
2.10
1.25
0.65BSC
1.30
0.20
7_Nom
0.079
0.083
0.049
0.026BSC
0.051
0.008
7_Nom
D
e
1
1.80
E
-A-
D
1.15
E1
c
e
1.20
1.40
0.30
0.047
0.004
0.055
0.012
A
e1
A
2
1
0.10
L
L
A
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5550
Document Number: 71154
06-Jul-01
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1
AN815
Vishay Siliconix
Single-Channel LITTLE FOOTR SC-70 6-Pin MOSFET
Copper Leadframe Version
Recommended Pad Pattern and Thermal Performance
INTRODUCTION
EVALUATION BOARDS ꢀ SINGLE SC70-6
The new single 6-pin SC-70 package with a copper leadframe
enables improved on-resistance values and enhanced
thermal performance as compared to the existing 3-pin and
6-pin packages with Alloy 42 leadframes. These devices are
intended for small to medium load applications where a
miniaturized package is required. Devices in this package
come in a range of on-resistance values, in n-channel and
p-channel versions. This technical note discusses pin-outs,
package outlines, pad patterns, evaluation board layout, and
thermal performance for the single-channel version.
The evaluation board (EVB) measures 0.6 inches by
0.5 inches. The copper pad traces are the same as in Figure 2.
The board allows examination from the outer pins to 6-pin DIP
connections, permitting test sockets to be used in evaluation
testing. See Figure 3.
52 (mil)
BASIC PAD PATTERNS
6
5
2
4
3
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286) for the basic
pad layout and dimensions. These pad patterns are sufficient
for the low to medium power applications for which this
package is intended. Increasing the drain pad pattern yields a
reduction in thermal resistance and is a preferred footprint.
The availability of four drain leads rather than the traditional
single drain lead allows a better thermal path from the package
to the PCB and external environment.
96 (mil)
71 (mil)
26 (mil)
1
13 (mil)
0, 0 (mil)
18 (mil)
26 (mil)
PIN-OUT
16 (mil)
Figure
1 shows the pin-out description and Pin 1
FIGURE 2.
SC-70 (6 leads) Single
identification.The pin-out of this device allows the use of four
pins as drain leads, which helps to reduce on-resistance and
junction-to-ambient thermal resistance.
SOT-363
SC-70 (6-LEADS)
The thermal performance of the single 6-pin SC-70 has been
measured on the EVB, comparing both the copper and
Alloy 42 leadframes. This test was first conducted on the
traditional Alloy 42 leadframe and was then repeated using the
1-inch2 PCB with dual-side copper coating.
D
D
G
1
2
3
6
5
D
D
S
4
Top View
FIGURE 1.
For package dimensions see outline drawing SC-70 (6-Leads)
(http://www.vishay.com/doc?71154)
Document Number: 71334
12-Dec-03
www.vishay.com
1
AN815
Vishay Siliconix
Front of Board SC70-6
Back of Board SC70-6
vishay.com
FIGURE 3.
THERMAL PERFORMANCE
Junction-to-Foot Thermal Resistance
(Package Performance)
COOPER LEADFRAME
Room Ambient 25 _C
Elevated Ambient 60 _C
The junction to foot thermal resistance is a useful method of
comparing different packages thermal performance.
T
J(max) * TA
T
J(max) * TA
PD
+
PD
+
RqJA
RqJA
150oC * 60oC
124oCńW
150oC * 25oC
124oCńW
PD
+
PD
+
A helpful way of presenting the thermal performance of the
6-Pin SC-70 copper leadframe device is to compare it to the
traditional Alloy 42 version.
P
D + 726 mW
P
D + 1.01 W
As can be seen from the calculations above, the compact 6-pin
SC-70 copper leadframe LITTLE FOOT power MOSFET can
handle up to 1 W under the stated conditions.
Thermal performance for the 6-pin SC-70 measured as
junction-to-foot thermal resistance, where the “foot” is the
drain lead of the device at the bottom where it meets the PCB.
The junction-to-foot thermal resistance is typically 40_C/W in
the copper leadframe and 163_C/W in the Alloy 42 leadframe
— a four-fold improvement. This improved performance is
obtained by the enhanced thermal conductivity of copper over
Alloy 42.
Testing
To further aid comparison of copper and Alloy 42 leadframes,
Figure 5 illustrates single-channel 6-pin SC-70 thermal
performance on two different board sizes and two different pad
patterns. The measured steady-state values of RqJA for the
two leadframes are as follows:
LITTLE FOOT 6-PIN SC-70
Power Dissipation
Alloy 42
Copper
The typical RqJA for the single 6-pin SC-70 with copper
leadframe is 103_C/W steady-state, compared with 212_C/W
for the Alloy 42 version. The figures are based on the 1-inch2
FR4 test board. The following example shows how the thermal
resistance impacts power dissipation for the two different
leadframes at varying ambient temperatures.
1) Minimum recommended pad pattern on
the EVB board V (see Figure 3.
329.7_C/W
208.5_C/W
2
2) Industry standard 1-inch PCB with
211.8_C/W
103.5_C/W
maximum copper both sides.
The results indicate that designers can reduce thermal
resistance (RqJA) by 36% simply by using the copper
leadframe device rather than the Alloy 42 version. In this
example, a 121_C/W reduction was achieved without an
increase in board area. If increasing in board size is feasible,
a further 105_C/W reduction could be obtained by utilizing a
1-inch2 square PCB area.
ALLOY 42 LEADFRAME
Room Ambient 25 _C
Elevated Ambient 60 _C
T
J(max) * TA
RqJA
T
J(max) * TA
RqJA
PD
+
PD
+
The copper leadframe versions have the following suffix:
150oC * 25oC
212oCńW
150oC * 25oC
212oCńW
PD
+
PD
+
Single:
Dual:
Si14xxEDH
Si19xxEDH
P
D + 590 mW
P
D + 425 mW
Complementary: Si15xxEDH
Document Number: 71334
12-Dec-03
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2
AN815
Vishay Siliconix
250
200
150
400
320
240
Alloy
42
Alloy
42
160
80
100
50
Copper
100
Copper
0
0
-5
-4
-3
-2
-1
-5
-4
-3
-2
-1
10
10
10
10
10
1
10
1000
10
10
10
10
10
1
10
100
1000
Time (Secs)
Time (Secs)
2
FIGURE 4.
Leadframe Comparison on EVB
FIGURE 5.
Leadframe Comparison on Alloy 42 1-inch PCB
Document Number: 71334
12-Dec-03
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3
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead
0.067
(1.702)
0.016
0.026
0.010
(0.406)
(0.648)
(0.241)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
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Document Number: 72602
Revision: 21-Jan-08
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
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Revision: 12-Mar-12
Document Number: 91000
1
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