SI9105DN02-E3 [VISHAY]

1-W High-Voltage Switchmode Regulator; 1 -W高压开关模式稳压器
SI9105DN02-E3
型号: SI9105DN02-E3
厂家: VISHAY    VISHAY
描述:

1-W High-Voltage Switchmode Regulator
1 -W高压开关模式稳压器

稳压器 开关式稳压器或控制器 电源电路 开关式控制器 高压 CD
文件: 总11页 (文件大小:305K)
中文:  中文翻译
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Si9105  
Vishay Siliconix  
1-W High-Voltage Switchmode Regulator  
DESCRIPTION  
FEATURES  
CCITT Compatible  
The Si9105 high-voltage switchmode regulator is a mono-  
lithic BiC/DMOS integrated circuit which contains most of the  
components necessary to implement a high-efficiency dc/dc  
converter in ISDN terminals up to 3 watts. A 0.5 mA max  
supply current makes possible the design of a dc/dc con-  
verter with 60 % efficiency at 25 mW, therefore meeting the  
recommended performance under the CCITT I.430 specifi-  
cations.  
Current-Mode Control  
Low Power Consumption (less than 5 mW)  
10 to 120 V Input Range  
200 V, 250 mA MOSFET  
Internal Start-Up Circuit  
Current-Mode Control  
SHUTDOWN and RESET  
This device may be used with an appropriate transformer to  
implement isolated flyback power converter topologies to  
provide single or multiple regulated dc outputs (i.e., 5 V).  
The Si9105 is available in both standard and lead (Pb)-free  
16-pin wide-body SOIC, 14-pin plastic DIP and 20-pin PLCC  
packages which are specified to operate over the industrial  
temperature range of - 40 °C to 85 °C.  
FUNCTIONAL BLOCK DIAGRAM  
OSC OSC  
IN OUT  
FB  
COMP  
DISCHARGE  
Error  
Amplifier  
OSC  
-
Clock (½ f  
)
+
OSC  
V
REF  
2 V  
Current-Mode  
Comparator  
-
4 V (1 %)  
R
S
+
Q
Ref  
Gen  
+
-
DRAIN  
- V  
C/L  
Comparator  
IN  
(BODY)  
1.2 V  
Current  
Sources  
To  
Internal  
Circuits  
BIAS  
SOURCE  
V
CC  
V
CC  
SHUTDOWN  
RESET  
Undervoltage Comparator  
S
R
+V  
IN  
-
Q
+
8.7 V  
-
+
9.3 V  
Document Number: 70003  
S-70497-Rev. I, 19-Mar-07  
www.vishay.com  
1
Si9105  
Vishay Siliconix  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Limit  
Unit  
Voltages Referenced to - VIN (VCC < + VIN + 0.3 V)  
VCC  
+VIN  
VDS  
15  
V
120  
200  
I
I
D (Peak) (300 µs pulse, 2 % duty cycle)  
D (rms)  
2
A
250  
mA  
Logic Inputs (RESET, SHUTDOWN, OSC IN)  
Linear Inputs (FEEDBACK, SOURCE)  
HV Pre-Regulator Input Current (continuous)  
Storage Temperature  
- 0.3 V to VCC + 0.3 V  
V
- 0.3 V to 7 V  
5
- 65 to 125  
- 40 to 85  
150  
mA  
°C  
Operating Temperature  
Junction Temperature (TJ)  
14-Pin Plastic DIP (J Suffix)b  
16-Pin Plastic Wide-Body SOIC (W Suffix)c  
750  
Power Dissipation (Package)a  
mW  
°C/W  
900  
20-Pin PLCC (N Suffix)d  
14-Pin Plastic DIP  
1400  
167  
Thermal Impedance (ΘJA  
Notes:  
)
16-Pin Plastic Wide-Body SOIC  
20-Pin PLCC  
140  
90  
a. Device Mounted with all leads soldered or welded to PC board.  
b. Derate 6 mW/°C above 25 °C.  
c. Derate 7.2 mW/°C above 25 °C.  
d. Derate 11.2 mW/°C above 25 °C.  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation  
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
RECOMMENDED OPERATING RANGE  
Parameter  
Limit  
Unit  
Voltages Referenced to - VIN  
VCC  
10 to 13.5  
10 to 120  
V
+ VIN  
fOSC  
40 kHz to 1 MHz  
25 kΩ to 1 MΩ  
0 to VCC - 3 V  
0 to VCC  
ROSC  
Linear Inputs  
Digital Inputs  
V
a
SPECIFICATIONS  
Test Conditions  
Limits  
Unless Otherwise Specified  
DISCHARGE = - VIN = 0 V  
VCC = 10 V, + VIN = 48 V  
RBIAS = 820 kΩ, ROSC = 910 kΩ  
Parameter  
Reference  
Symbol  
Tempb  
Minc  
Typd  
Maxc  
Unit  
OSC IN = - VIN (OSC Disabled)  
VR  
Output Voltage  
Room  
3.92  
4.00  
4.08  
V
RL = 10 MΩ  
Output Impedancee  
Short Circuit Current  
Temperature Stabilitye  
Long Term Stabilitye  
Oscillator  
ZOUT  
ISREF  
TREF  
OSC IN = - VIN  
OSC IN = - VIN, VREF = - VIN  
OSC IN = - VIN  
Room  
Room  
Full  
15  
70  
300  
100  
45  
130  
kΩ  
µA  
0.25  
5.00  
1.0  
mV/°C  
mV  
t = 1000 h, TA = 125 °C  
Room  
25.00  
Maximum Frequencye  
Initial Accuracy  
fMAX  
fOSC  
Δf/f  
ROSC = 0  
See Note e  
Room  
Room  
Room  
Full  
1
3
MHz  
kHz  
32  
40  
48  
15  
Voltage Stability  
Temperature Coefficiente  
Δf/f = f(13.5 V) - f(9.5 V)/f(9.5 V)  
10  
%
TOSC  
200  
500  
ppm/°C  
www.vishay.com  
2
Document Number: 70003  
S-70497-Rev. I, 19-Mar-07  
Si9105  
Vishay Siliconix  
a
SPECIFICATIONS  
Test Conditions  
Limits  
Unless Otherwise Specified  
DISCHARGE = - VIN = 0 V  
VCC = 10 V, + VIN = 48 V  
RBIAS = 820 kΩ, ROSC = 910 kΩ  
Parameter  
Symbol  
Tempb  
Minc  
Typd  
Maxc  
Unit  
Error Amplifier  
FB Tied to COMP  
VFB  
Feedback Input Voltage  
Room  
3.96  
4
4.04  
500  
V
OSC IN = - VIN (OSC Disabled)  
IFB  
AVOL  
VOS  
BW  
OSC IN = - VIN, VFB = 4 V  
Input BIAS Current  
Room  
Room  
Room  
Room  
Room  
Room  
Room  
Room  
25  
80  
nA  
dB  
Open Loop Voltage Gaine  
Input OFFSET Voltage  
Unity Gain Bandwidthe  
OSC IN = - VIN (OSC Disabled)  
60  
15  
40  
mV  
MHz  
kΩ  
OSC IN = - VIN  
0.5  
0.8  
1
ZOUT  
Dynamic Output Impedance  
Source (VFB = 3.4 V)  
Sink (VFB = 4.5 V)  
10 V VCC 13.5 V  
- 1.2  
0.08  
70  
- 0.32  
IOUT  
Output Current  
mA  
dB  
0.05  
Power Supply Rejection  
PSRR  
Current Limit  
RL = 100 Ω from DRAIN to VCC  
VSOURCE  
td  
Threshold Voltage  
Delay to Outpute  
Room  
Room  
0.8  
1.0  
1.2  
V
VFB = 0 V  
RL = 100 Ω from DRAIN to VCC  
VSOURCE = 1.5 V, See Figure 1  
200  
300  
ns  
+ VIN  
+ IIN  
IIN = 10 µA  
VCC 10 V  
Input Voltage  
Room  
Room  
Room  
120  
V
Input Leakage Current  
Pre-Regulator Start-Up Current  
10  
µA  
mA  
ISTART  
Pulse Width 300 µs, VCC = 7 V  
8
15  
V
CC Pre-Regulator  
VREG  
IPRE-REGULATOR = 10 µA  
Room  
7.5  
9.3  
9.7  
9.2  
Turn-Off Threshold Voltage  
RL = 100 Ω from DRAIN to VCC  
V
VUVLO  
VDELTA  
Undervoltage Lockout  
Room  
Room  
7.0  
8.7  
0.5  
See Detailed Description  
V
REG - VUVLO  
0.25  
Supply  
ICC  
IBIAS  
tSD  
Supply Current  
Room  
Room  
Room  
Room  
Room  
0.35  
7.5  
50  
0.5  
mA  
µA  
Bias Current  
VSOURCE = - VIN, See Figure 2  
See Figure 3  
SHUTDOWN Delay  
SHUTDOWN Pulse Width  
RESET Pulse Width  
100  
tSW  
tRW  
50  
50  
ns  
Latching Pulse Width  
SHUTDOWN and RESET Low  
tLW  
Room  
25  
VIL  
VIH  
IIH  
Input Low Voltage  
Room  
Room  
Room  
Room  
2.0  
5
V
Input High Voltage  
8.0  
- 35  
200  
VIN = 10 V  
VIN = 0 V  
Input Current Input Voltage High  
Input Current Input Voltage Low  
MOSFET Switch  
1
µA  
IIL  
- 25  
V(BR)DSS  
rDS(on)  
IDSS  
IDRAIN = 100 µA  
IDRAIN = 100 mA  
VDRAIN = 100 V  
Breakdown Voltage  
Full  
220  
5
V
Ω
Drain-Source On Resistanceg  
Drain Off Leakage Current  
Drain Capacitance  
Room  
Room  
Room  
7
10  
µA  
pF  
CDS  
35  
Notes:  
a. Refer to PROCESS OPTION FLOWCHART for additional information.  
b. Room = 25 °C, Full = as determined by the operating temperature suffix.  
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.  
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.  
e. Guaranteed by design, not subject to production test.  
f. CSTRAY Pin 8 = 5 pF.  
g .Temperature coefficient of rDS(on) is 0.75 % per °C, typical.  
Document Number: 70003  
S-70497-Rev. I, 19-Mar-07  
www.vishay.com  
3
Si9105  
Vishay Siliconix  
TIMING WAVEFORMS  
V
1.5 V  
SOURCE  
-
-
CC  
t
f
10 ns  
t
r
10 ns  
50 %  
SHUTDOWN  
0 -  
50 %  
0
t
d
V
CC  
t
SD  
V
-
CC  
DRAIN  
0
DRAIN  
0
10 %  
10 %  
Figure 2.  
Figure 1.  
t
SW  
V
CC  
t , t 10 ns  
r
f
SHUTDOWN  
0
50 %  
50 %  
-
-
t
LW  
V
CC  
50 %  
50 %  
RESET  
0
50 %  
t
RW  
Figure 3.  
TYPICAL CHARACTERISTICS  
1 M  
100 k  
10 k  
10 k  
100 k  
1 M  
r
- Oscillator Resistance (Ω)  
OSC  
Figure 4. Output Switching Frequency  
vs. Oscillator Resistance  
www.vishay.com  
4
Document Number: 70003  
S-70497-Rev. I, 19-Mar-07  
Si9105  
Vishay Siliconix  
PIN CONFIGURATIONS  
PLCC-20  
SO-16  
(Wide-Body)  
PDIP-14  
3
2
1
20 19  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
4
5
6
7
8
18  
17  
16  
15  
14  
8
9
10 11 12 13  
Top View  
Top View  
Top View  
PIN DESCRIPTION  
Pin Number  
Function  
14-Pin Plastic DIP  
16-Pin SOIC  
20-Pin PLCC  
SOURCE  
- VIN  
4
5
1
2
7
8
VCC  
6
7
4
5
9
OSCOUT  
OSCIN  
10  
8
9
6
7
11  
12  
14  
16  
17  
18  
20  
2
DISCHARGE  
VREF  
10  
11  
12  
13  
14  
1
8
SHUTDOWN  
RESET  
COMP  
FB  
9
10  
11  
12  
13  
14  
16  
3, 15  
BIAS  
+ VIN  
2
3
DRAIN  
NC  
3
5
1, 4, 6, 13, 15, 19  
ORDERING INFORMATION  
Standard  
Part Number  
Lead (Pb)-free  
Part Number  
Temperature Range  
Package  
Si9105DJ02  
Si9105DW  
Si9105DJ02-E3  
PDIP-14  
SOIC-16 (WB)  
PLCC-20  
Si9105DW-T1  
(With Tape and Reel)  
Si9105DW-T1-E3  
(With Tape and Reel)  
- 40 to 85 °C  
Si9105DN02  
Si9105DN02-E3  
Si9105DN02-T1  
(With Tape and Reel)  
Si9105DN02-T1-E3  
(With Tape and Reel)  
Document Number: 70003  
S-70497-Rev. I, 19-Mar-07  
www.vishay.com  
5
Si9105  
Vishay Siliconix  
DETAILED DESCRIPTION  
Pre-Regulator/Start-Up Section  
Due to the low quiescent current requirement of the Si9105  
control circuitry, bias power can be supplied from the unreg-  
ulated input power source, from an external regulated low-  
voltage supply, or from an auxiliary "bootstrap" winding on  
the output inductor or transformer.  
The output of the reference section is connected internally to  
the non-inverting input of the error amplifier. Nominal refer-  
ence output voltage is 4 V. The trimming procedure that is  
used on the Si9105 brings the output of the error amplifier  
(which is configured for unity gain during trimming) to within  
1 % of 4 V. This automatically compensates for the input  
offset voltage in the error amplifier.  
When power is first applied during start-up, + VIN will draw a  
constant current. The magnitude of this current is determined  
by a high-voltage depletion MOSFET device which is con-  
nected between + VIN and VCC. This start-up circuitry pro-  
vides initial power to the IC by charging an external bypass  
capacitance connected to the VCC pin. The constant current  
is disabled when VCC exceeds 9.3 V. If VCC is not forced to  
exceed the 9.3 V threshold, then VCC will be regulated to a  
nominal value of 9.3 V by the pre-regulator circuit.  
The output impedance of the reference section has been  
purposely made high so that a low impedance external volt-  
age source can be used to override the internal voltage  
source, if desired, without otherwise altering the perfor-  
mance of the device.  
Error Amplifier  
As the supply voltage rises toward the normal operating con-  
ditions, an internal undervoltage (UV) lockout circuit keeps  
the output MOSFET disabled until VCC exceeds the under-  
voltage lockout threshold (typically 8.7 V). This guarantees  
that the control logic will be functioning properly and that suf-  
ficient gate drive voltage is available before the MOSFET  
turns on. The design of the IC is such that the undervoltage  
lockout threshold will not exceed the pre-regulator turn-off  
voltage. Power dissipation can be minimized by providing an  
external power source to VCC such that the constant current  
source is always disabled.  
Closed-loop regulation is provided by the error amplifier,  
whose 1 kΩ dynamic output impedance enables it to be used  
with feedback compensation (unlike transconductance  
amplifiers). A MOS differential input stage provides for low  
input current. The noninverting input to the error amplifier  
(VREF) is internally connected to the output of the reference  
supply and should be bypassed with a small capacitor to  
ground.  
Oscillator Section  
BIAS  
The oscillator consists of a ring of CMOS inverters, capaci-  
tors, and a capacitor discharge switch. Frequency is set by  
an external resistor between the OSC IN and OSC OUT pins.  
(See Typical Characteristics graph of resistor value vs. fre-  
quency.) The DISCHARGE pin should be tied to - VIN for nor-  
mal internal oscillator operation. A frequency divider in the  
logic section limits switch duty cycle to a maximum of 50 %  
by locking the switching frequency to one half of the oscillator  
frequency.  
To properly set the bias for the Si9105, a 820 kΩ resistor  
should be tied from BIAS to - VIN. This determines the mag-  
nitude of bias current in all of the analog sections and the  
pull-up current for the SHUTDOWN and RESET pins. The  
current flowing in the bias resistor is nominally 7.5 µA.  
Reference Section  
Remote synchronization can be accomplished by capacitive  
coupling of a synchronization pulse into the OSC IN terminal.  
For a 5 V pulse amplitude and 0.5 µs pulse width, typical val-  
ues would be 100 pF in series with 3 kΩ to OSC IN.  
The reference section of the Si9105 consists of a tempera-  
ture compensated buried zener and trimmable divider net-  
work.  
www.vishay.com  
6
Document Number: 70003  
S-70497-Rev. I, 19-Mar-07  
Si9105  
Vishay Siliconix  
DETAILED DESCRIPTION (CONT’D)  
SHUTDOWN and RESET  
Output Switch  
SHUTDOWN and RESET are intended for overriding the  
output MOSFET switch via external control logic. The two  
inputs are fed through a latch preceding the output switch.  
Depending on the logic state of RESET, SHUTDOWN can  
be either a latched or unlatched input. The output is off when-  
ever SHUTDOWN is low. By simultaneously having SHUT-  
DOWN and RESET low, the latch is set and SHUTDOWN  
has no effect until RESET goes high. The truth table for these  
inputs is given in Table 1.  
The output switch is a 7 Ω , 200 V lateral DMOS transistor.  
Like discrete MOSFETs, the switch contains an intrinsic  
body-drain diode. However, the body contact in the Si9105 is  
connected internally to - VIN and is independent of the  
SOURCE.  
Table 1. Truth Table for the SHUTDOWN and RESET Pins  
SHUTDOWN  
RESET  
Output  
Normal Operation  
H
H
L
H
Both pins have internal current source pull-ups and can be  
left disconnected when not in use. An added feature of the  
current sources is the ability to connect a capacitor and an  
open-collector driver to the SHUTDOWN pin to provide vari-  
able shutdown time.  
Normal Operation (No Change)  
Off (Not Latched)  
H
L
L
L
Off (Latched)  
Off (Latched, No Change)  
APPLICATIONS  
1N5819  
+ 5 V  
+V  
IN  
7
8
2
NC  
11  
0.1 µF  
220 µF  
L
p
= 3.8 mH  
2
5.6 V  
OUTPUT  
3
8
3
6
1N4148  
10  
910 k  
7
+
-
0.1 µF  
47 µF  
Si9105DJ  
20 µF  
150 k  
71.5 k  
1 %  
12  
10  
1
14  
13  
4
NC  
0.1 µF  
15 k  
0.22 µF  
-
5 V  
9
4
1N5819  
12 V  
0.1  
µF  
5
9
1 µF  
47.5 k  
1 %  
0.1  
µF  
3.9 Ω  
820 k  
INPUT GND (GND Plane)  
Figure 5. CCITT Compatible ISDN Terminal Power Supply  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-  
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability  
data, see http://www.vishay.com/ppg?70003.  
Document Number: 70003  
S-70497-Rev. I, 19-Mar-07  
www.vishay.com  
7
Package Information  
Vishay Siliconix  
SOIC (WIDE-BODY): 16-LEAD (POWER IC ONLY)  
ECN: S-40079—Rev. A, 02-Feb-04  
DWG: 5910  
Ğ0.06$0.002D  
0.2025$0.001  
CAVITY NO.  
0.334$0.005  
R0.004  
0.010  
16 15 14 13 12 11 10  
9
8
R0.008  
R0.009  
0.1475$0.001  
0.295$0.001  
0.070$0.005  
R0.004  
4°$2°  
1
2
3
4
5
6
7
0.032$0.005  
DETAIL A  
0.055$0.005  
PIN 1 INDICATOR  
Ğ0.0470.007$0.001 dp  
SURFACE POLISHED  
0.334$0.005  
0.291$0.001  
0.02045°  
7°(4)  
0.405$0.001  
0.098$0.002  
0.091$0.001  
R0.004  
0.295$0.001  
0.406$0.004  
DETAIL A  
0.041$0.001  
0.050 TYP.  
0.006$0.002  
0.017$0.0003  
All Dimensions In Inches  
Document Number: 72805  
28-Jan-04  
www.vishay.com  
1
Package Information  
Vishay Siliconix  
PLCC: 2O-LEAD (POWER IC ONLY)  
DSQUARE  
A
2
MILLIMETERS  
INCHES  
D SQUARE  
1
Dim  
A
A1  
A2  
B
B1  
D
D1  
D2  
e1  
Min  
4.20  
Max  
4.57  
3.04  
Min  
Max  
0.180  
0.120  
B
1
0.165  
0.090  
0.020  
0.013  
0.026  
0.385  
0.350  
0.290  
2.29  
B
0.51  
0.331  
0.661  
9.78  
0.553  
0.812  
10.03  
9.042  
8.38  
0.021  
0.032  
0.395  
0.356  
0.330  
e
1
D
2
8.890  
7.37  
1.27 BSC  
0.050 BSC  
ECN: S-40081—Rev. A, 02-Feb-04  
DWG: 5917  
A
1
A
0.101 mm  
0.004  
Document Number: 72812  
28-Jan-04  
www.vishay.com  
1
Package Information  
Vishay Siliconix  
PDIP: 14-LEAD (POWER IC ONLY)  
14  
1
13  
2
12  
3
11  
4
10  
5
9
6
8
7
E
E
1
D
S
1
Q
A
A
1
L
15°  
MAX  
C
e
1
B
B
1
e
A
MILLIMETERS  
INCHES  
Min  
Dim  
A
A1  
B
B1  
C
D
Min  
3.81  
0.38  
0.38  
0.89  
0.20  
17.27  
7.62  
5.59  
2.29  
7.37  
2.79  
1.27  
1.02  
Max  
5.08  
1.27  
0.51  
1.65  
0.30  
19.30  
8.26  
7.11  
2.79  
7.87  
3.81  
2.03  
2.03  
Max  
0.200  
0.050  
0.020  
0.065  
0.012  
0.760  
0.325  
0.280  
0.110  
0.310  
0.150  
0.080  
0.080  
0.150  
0.015  
0.015  
0.035  
0.008  
0.680  
0.300  
0.220  
0.090  
0.290  
0.110  
0.050  
0.040  
E
E1  
e1  
eA  
L
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ECN: S-40081—Rev. A, 02-Feb-04  
DWG: 5919  
Document Number: 72814  
28-Jan-04  
www.vishay.com  
1
Legal Disclaimer Notice  
Vishay  
Disclaimer  
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,  
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other  
disclosure relating to any product.  
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or  
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all  
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,  
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular  
purpose, non-infringement and merchantability.  
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical  
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements  
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular  
product with the properties described in the product specification is suitable for use in a particular application. Parameters  
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All  
operating parameters, including typical parameters, must be validated for each customer application by the customer’s  
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,  
including but not limited to the warranty expressed therein.  
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining  
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.  
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree  
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and  
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay  
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to  
obtain written terms and conditions regarding products designed for such applications.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by  
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.  
Document Number: 91000  
Revision: 11-Mar-11  
www.vishay.com  
1

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