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SI9110_11

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描述：High-Voltage Switchmode Controllers

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SI9110_11 概述

High-Voltage Switchmode Controllers 高压开关模式控制器

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Si9110, Si9111

Vishay Siliconix

High-Voltage Switchmode Controllers

DESCRIPTION

FEATURES

•

10 V to 120 V Input Range

The Si9110/9111 are BiC/DMOS integrated circuits

designed for use as high-performance switchmode

controllers. A high-voltage DMOS input allows the controller

to work over a wide range of input voltages (10 to 120 VDC).

Current-mode PWM control circuitry is implemented in

CMOS to reduce internal power consumption to less than

10 mW.

Current-Mode Control

High-Speed, Source-Sink Output Drive

High Efficiency Operation (> 80 %)

Internal Start-Up Circuit

Internal Oscillator (1 MHz)

SHUTDOWN and RESET

A push-pull output driver provides high-speed switching for

MOSPOWER devices large enough to supply 50 W of output

power. When combined with an output MOSFET and

transformer, the Si9110/9111 can be used to implement

single-ended power converter topologies (i.e., flyback,

forward, and cuk).

Reference Selection

Si9110 - 1 %

Si9111 - 10 %

The Si9110/9111 are available in both standard and lead

(Pb)-free 14-pin plastic DIP and SOIC packages which are

specified to operate over the industrial temperature range of

- 40 °C to 85 °C.

FUNCTIONAL BLOCK DIAGRAM

OSC OSC

IN OUT

COMP DISCHARGE

Error

Amplifier

OSC

Clock ( /

f )

2 OSC

REF

4 V

2 V

Current-Mode

Comparator

Ref

Gen

OUTPUT

- V

C/L

Comparator

Current

BIAS

Sources

Internal

Circuits

1.2 V

SENSE

Undervoltage

Comparator

SHUTDOWN

RESET

8.1 V

8.6 V

Pre-Regulator/Start-Up

Document Number: 70004

S11-0975-Rev. I, 16-May-11

www.vishay.com

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Si9110, Si9111

Vishay Siliconix

ABSOLUTE MAXIMUM RATINGS

Parameter

Limit

Unit

Voltages Referenced to - V_IN(Note: V_CC< + V_IN+ 0.3 V)

V_CC

+V_IN

120

Logic Inputs (RESET, SHUTDOWN, OSC IN, OSC OUT)

- 0.3 to V_CC+ 0.3

Linear Inputs (FEEDBACK, SENSE, BIAS, V_REF

HV Pre-Regulator Input Current (continuous)

Storage Temperature

)

- 0.3 to V_CC+ 0.3

- 65 to 150

- 40 to 85

150

°C

Operating Temperature

Junction Temperature (T_J)

14-Pin Plastic DIP (J Suffix)^b

14-Pin SOIC (Y Suffix)^c

750

Power Dissipation (Package)^a

900

14-Pin Plastic DIP

167

Thermal Impedance (_JA

Notes:

)

°C/W

14-Pin SOIC

140

a. Device Mounted with all leads soldered or welded to PC board.

b. Derate 6 mW/°C above 25 °C.

c. Derate 7.2 mW/°C above 25 °C.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation

of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING RANGE

Parameter

Limit

Unit

Voltages Referenced to - V_IN

V_CC

9.5 to 13.5

10 to 120

+ V_IN

f_OSC

40 kHzto 1 MHz

25 kto 1 M

0 to V_CC- 3

0 to V_CC

R_OSC

Linear Inputs

Digital Inputs

SPECIFICATIONS

Test Conditions

Unless Otherwise Specified

DISCHARGE = - V_IN= 0 V

D Suffix

- 40 °C to 85 °C

V_CC= 10 V, + V_IN= 48 V

R_BIAS= 390 k, R_OSC= 330 k

Parameter

Reference

Symbol

Temp.^bMin.^d

Typ.^c

Max.^d

Unit

Si9110 Room

Si9111 Room

3.92

3.60

3.86

3.52

4.0

4.08

4.40

4.14

4.46

OSC IN = - V_IN

(OSC Disabled)

R_L= 10 M

V_R

Output Voltage

Si9110

Si9111

Full

Output Impedance^e

Short Circuit Current

Temperature Stability^e

Z_OUT

I_SREF

T_REF

Room

Full

100

0.5

k

µA

V_REF= - V_IN

130

1.0

mV/°C

Oscillator

Maximum Frequency^e

f_MAX

f_OSC

R_OSC= 0

Room

Full

MHz

kHz

R_OSC= 330 k, See Note f

R_OSC= 150 k, See Note f

100

200

120

240

Initial Accuracy

160

Voltage Stability

Temperature Coefficient^e

f/f

f/f = f(13.5 V) - f(9.5 V)/f(9.5 V)

T_OSC

200

500

ppm/°C

www.vishay.com

Document Number: 70004

S11-0975-Rev. I, 16-May-11

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Si9110, Si9111

Vishay Siliconix

SPECIFICATIONS

Test Conditions

D Suffix

- 40 °C to 85 °C

Unless Otherwise Specified

DISCHARGE = - V_IN= 0 V

_CC= 10 V, + V_IN= 48 V

Parameter

Symbol

Temp.^bMin.^d

Typ.^c

Max.^d

Unit

R_BIAS= 390 k, R_OSC= 330 k

Error Amplifier

Si9110 Room

3.96

3.60

4.00

4.04

4.40

500

FB Tied to COMP

V_FB

Feedback Input Voltage

OSC IN = - V_IN, (OSC Disabled)

Si9111 Room

Room

I_FB

V_OS

A_VOL

OSC IN = - V_IN, V_FB= 4 V

Input BIAS Current

Input OFFSET Voltage

Room

Open Loop Voltage Gain^e

Unity Gain Bandwidth^e

Dynamic Output Impedance^e

Room

OSC IN = - V_IN

(OSC Disabled)

Room

1.3

MHz



Z_OUT

Room

1000

- 2.0

0.15

2000

- 1.4

Source (V_FB= 3.4 V)

Sink (V_FB= 4.5 V)

Room

I_OUT

Output Current

Room

0.12

9.5 V  V_CC 13.5 V

Power Supply Rejection

Current Limit

PSRR

Room

V_SOURCE

t_d

V_FB= 0

Threshold Voltage

Room

1.0

1.2

1.4

Delay to Output^e

V_SENSE= 1.5 V, See Figure 1

100

150

Pre-Regulator/Start-Up

+ V_IN

+ I_IN

I_IN= 10 µA

Input Voltage

Room

120

V_CC 9.4 V

Input Leakage Current

Pre-Regulator Start-Up Current

µA

I_START

Pulse Width  300 µs, V_CC= V_ULVO

Room

_CCPre-Regulator Turn-Off

V_REG

I_{PRE-REGULATOR}= 10 µA

Room

7.8

8.6

9.4

8.9

Threshold Voltage

V_UVLO

V_DELTA

Undervoltage Lockout

Room

7.0

0.3

8.1

0.6

_REG- V_UVLO

Supply

I_CC

V_LOAD 75 pF (Pin 4)

Supply Current

Bias Current

Logic

Room

0.45

0.6

1.0

µA

I_BIAS

SHUTDOWN Delay^e

SHUTDOWN Pulse Width^e

RESET Pulse Width^e

Latching Pulse Width

SHUTDOWN and RESET Low^e

Input Low Voltage

t_SD

t_SW

t_RW

C_L= 500 pF, V_SENSE= - V_IN, See Figure 2

See Figure 3

Room

100

t_LW

See Figure 3

Room

V_IL

V_IH

I_IH

Room

2.0

Input High Voltage

8.0

V_IN= 10 V

V_IN= 0 V

Input Current Input Voltage High

Input Current Input Voltage Low

Output

µA

I_IL

- 35

- 25

Room

Full

Room

Full

Room

Full

9.7

9.5

V_OH

V_OL

I_OUT= - 10 mA

I_OUT= 10 mA

Output High Voltage

Output Low Voltage

Output Resistance

0.30

0.50

R_OUT

I_OUT= 10 mA, Source or Sink



Rise Time^e

Fall Time^e

t_r

t_f

Room

C_L= 500 pF

Notes:

a. Refer to PROCESS OPTION FLOWCHART for additional information.

b. Room = 25 °C, Full = as determined by the operating temperature suffix.

c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.

e. Guaranteed by design, not subject to production test.

f. C_STRAYPin 8 =  5 pF.

Document Number: 70004

S11-0975-Rev. I, 16-May-11

www.vishay.com

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Si9110, Si9111

Vishay Siliconix

TIMING WAVEFORMS

1.5 V

10 ns

90 %

≤

SHUTDOWN

50 %

10 ns

≤

50 %

SENSE

90 %

OUTPUT

0 -

Figure 2.

Figure 1.

t , t ≤ 10 ns

50 %

SHUTDOWN

50 %

RESET

Figure 3.

TYPICAL CHARACTERISTICS

1 M

140

= - V

120

100

100 k

10 k

100 k

1 M

(Ω)

+I (mA)

OSC

Figure 4. + V_INvs. + I_INat Start-Up

Figure 5. Output Switching Frequency

vs. Oscillator Resistance

www.vishay.com

Document Number: 70004

S11-0975-Rev. I, 16-May-11

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Si9110, Si9111

Vishay Siliconix

PIN CONFIGURATIONS AND ORDERING INFORMATION

Dual-In-Line and SOIC

ORDERING INFORMATION

Part Number

Temperature Range

Package

BIAS

Si9110DY

COMP

Si9110DY-T1

Si9110DY-T1-E3

Si9111DY

SENSE

RESET

SOIC-14

OUTPUT

SHUTDOWN

- V

REF

Si9111DY-T1

Si9111DY-T1-E3

Si9110DJ

- 40 °C to 85 °C

DISCHARGE

OSC IN

OSC OUT

Si9110DJ-E3

Si9111DJ

PDIP-14

Top View

Si9111DJ-E3

DETAILED DESCRIPTION

Pre-Regulator/Start-Up Section

sections and the pull-up current for the SHUDOWN and

RESET pins. The current flowing in the bias resistor is

nominally 15 µA.

Due to the low quiescent current requirement of the Si9110/

9111 control circuitry, bias power can be supplied from the

unregulated input power source, from an external regulated

low-voltage supply, or from an auxiliary "bootstrap" winding

on the output inductor or transformer.

Reference Section

The reference section of the Si9110 consists of a

temperature compensated buried zener and trimmable

divider network. The output of the reference section is

connected internally to the non-inverting input of the error

amplifier. Nominal reference output voltage is 4 V. The

trimming procedure that is used on the Si9110 brings the

output of the error amplifier (which is configured for unity gain

during trimming) to within 1 % of 4 V. This compensates for

input offset voltage in the error amplifier.

When power is first applied during start-up, + V_IN(pin 2) will

draw a constant current. The magnitude of this current is

determined by a high-voltage depletion MOSFET device

which is connected between + V_INand V_CC(pin 6). This

start-up circuitry provides initial power to the IC by charging

an external bypass capacitance connected to the V_CCpin.

The constant current is disabled when V_CCexceeds 8.6 V. If

V_CCis not forced to exceed the 8.6 V threshold, then V_CCwill

be regulated to a nominal value of 8.6 V by the pre-regulator

circuit.

The output impedance of the reference section has been

purposely made high so that a low impedance external

voltage source can be used to override the internal voltage

source, if desired, without otherwise altering the

performance of the device.

As the supply voltage rises toward the normal operating

conditions, an internal undervoltage (UV) lockout circuit

keeps the output driver disabled until V_CCexceeds the

undervoltage lockout threshold (typically 8.1 V). This

guarantees that the control logic will be functioning properly

and that sufficient gate drive voltage is available before the

MOSFET turns on. The design of the IC is such that the

undervoltage lockout threshold will be at least 300 mV less

than the pre-regulator turn-off voltage. Power dissipation can

be minimized by providing an external power source to V_CC

such that the constant current source is always disabled.

Applications which use a separate external reference, such

as non-isolated converter topologies and circuits employing

optical coupling in the feedback loop, do not require a

trimmed voltage reference with 1 % accuracy. The Si9111

accommodates the requirements of these applications at a

lower cost, by leaving the reference voltage untrimmed. The

10 % accurate reference thus provided is sufficient to

establish a dc bias point for the error amplifier.

Note: During start-up or when V_CCdrops below 8.6 V the

start-up circuit is capable of sourcing up to 20 mA. This may

lead to a high level of power dissipation in the IC (for a 48 V

input, approximately 1 W). Excessive start-up time caused

by external loading of the V_CCsupply can result in device

damage. Figure 6 gives the typical pre-regulator current at

BiC/DMOS as a function of input voltage.

Error Amplifier

Closed-loop regulation is provided by the error amplifier,

which is intended for use with "around-the-amplifier"

compensation. A MOS differential input stage provides for

low input current. The noninverting input to the error amplifier

(V_REF) is internally connected to the output of the reference

supply and should be bypassed with a small capacitor to

ground.

BIAS

To properly set the bias for the Si9110/9111, a 390 k

resistor should be tied from BIAS (pin 1) to - V_IN(pin 5). This

determines the magnitude of bias current in all of the analog

Document Number: 70004

S11-0975-Rev. I, 16-May-11

www.vishay.com

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Si9110, Si9111

Vishay Siliconix

DETAILED DESCRIPTION (CONT’D)

Oscillator Section

Table 1. Truth Table for the SHUTDOWN and RESET Pins

The oscillator consists of a ring of CMOS inverters,

capacitors, and a capacitor discharge switch. Frequency is

set by an external resistor between the OSC IN and OSC

OUT pins. (See Figure 5 for details of resistor value vs.

frequency.) The DISCHARGE pin should be tied to - V_INfor

normal internal oscillator operation. A frequency divider in

the logic section limits switch duty cycle to  50 % by locking

the switching frequency to one half of the oscillator

frequency.

SHUTDOWN

RESET

Output

Normal Operation

Normal Operation (No Change)

Off (Not Latched)

Off (Latched)

Off (Latched, No Change)

Both pins have internal current source pull-ups and should

be left disconnected when not in use. An added feature of the

current sources is the ability to connect a capacitor and an

open-collector driver to the SHUTDOWN or RESET pins to

provide variable shutdown time.

Remote synchronization is accomplished by capacitive

coupling of a positive SYNC pulse into the OSC IN (pin 8)

terminal. For a 5 V pulse amplitude and 0.5 µs pulse width,

typical values would be 100 pF in series with 3 k to pin 8.

SHUTDOWN and RESET

Output Driver

The push-pull driver output has a typical on-resistance of

20  . Maximum switching times are specified at 75 ns for a

500 pF load. This is sufficient to directly drive MOSFETs

such as the 2N7004, 2N7005, IRFD120 and IRFD220.

Larger devices can be driven, but switching times will be

longer, resulting in higher switching losses. In order to drive

large MOSPOWER devices, it is necessary to use an

external driver IC, such as the Vishay Siliconix D469A. The

D469A can switch very large devices such as the

SMM20N50 (500 V, 0.3 ) in approximately 100 ns.

SHUTDOWN (pin 11) and RESET (pin 12) are intended for

overriding the output MOSFET switch via external control

logic. The two inputs are fed through a latch preceding the

output switch. Depending on the logic state of RESET,

SHUTDOWN can be either a latched or unlatched input. The

output is off whenever SHUTDOWN is low. By

simultaneously having SHUTDOWN and RESET low, the

latch is set and SHUTDOWN has no effect until RESET goes

high. The truth table for these inputs is given in Table 1.

APPLICATIONS

1N5822

+ 5 V

GND

at 0.75 A

OSC SYNC PULSE

(If Needed)

220 µF

47 µF

3 k

Si9110

0.022 µF

100 pF

1N5819

0.1 µF

20 µF

- 5 V

240 k

at 0.25 A

150 k

FEEDBACK

1N4148

To Pin 6 V

2N7004

18 k

12 k

1 µF

Feedback

To Pin 14

0.1 µF

1 Ω

390 k

- 48 V

Figure 6. 5 Watt Power Supply for Telecom Applications

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see www.vishay.com/ppg?70004.

www.vishay.com

Document Number: 70004

S11-0975-Rev. I, 16-May-11

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Package Information

Vishay Siliconix

SOIC (NARROW): 14-LEAD (POWER IC ONLY)

MILLIMETERS

INCHES

Min

1.35

0.10

0.38

0.18

8.55

3.8

Max

1.75

0.20

0.51

0.23

8.75

4.00

Min

Max

0.069

0.008

0.020

0.009

0.344

0.157

Dim

A₁

0.053

0.004

0.015

0.007

0.336

0.149

1.27 BSC

0.050 BSC

5.80

0.50

6.20

0.93

0.228

0.020

0.244

0.037

ECN: S-40080—Rev. A, 02-Feb-04

DWG: 5914

ALL LEADS

0.101 mm

0.004″

Document Number: 72809

28-Jan-04

www.vishay.com

Package Information

Vishay Siliconix

PDIP: 14-LEAD (POWER IC ONLY)

15°

MAX

MILLIMETERS

INCHES

Min

Dim

A₁

B₁

Min

3.81

0.38

0.89

0.20

17.27

7.62

5.59

2.29

7.37

2.79

1.27

1.02

Max

5.08

1.27

0.51

1.65

0.30

19.30

8.26

7.11

2.79

7.87

3.81

2.03

Max

0.200

0.050

0.020

0.065

0.012

0.760

0.325

0.280

0.110

0.310

0.150

0.080

0.150

0.015

0.035

0.008

0.680

0.300

0.220

0.090

0.290

0.110

0.050

0.040

E₁

e₁

e_A

Q₁

ECN: S-40081—Rev. A, 02-Feb-04

DWG: 5919

Document Number: 72814

28-Jan-04

www.vishay.com

Legal Disclaimer Notice

Vishay

Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE

RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,

“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other

disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or

the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all

liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,

consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular

purpose, non-infringement and merchantability.

Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical

requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements

about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular

product with the properties described in the product specification is suitable for use in a particular application. Parameters

provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All

operating parameters, including typical parameters, must be validated for each customer application by the customer’s

technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,

including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining

applications or for any other application in which the failure of the Vishay product could result in personal injury or death.

Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree

to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and

damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay

or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to

obtain written terms and conditions regarding products designed for such applications.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by

any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000

Revision: 11-Mar-11

www.vishay.com

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