SI9243A_11 [VISHAY]

Single-Ended Bus Transceiver; 单端总线收发器
SI9243A_11
元器件型号: SI9243A_11
生产厂家: VISHAY TELEFUNKEN    VISHAY TELEFUNKEN
描述和应用:

Single-Ended Bus Transceiver
单端总线收发器

总线收发器
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Si9243A
Vishay Siliconix
Single-Ended Bus Transceiver
DESCRIPTION
The Si9243AEY is a monolithic bus transceiver designed to
provide bidirectional serial communication in automotive
diagnostic applications.
The device incorporates protection against overvoltages and
short circuits to V
BAT
. The transceiver pin is protected and
can be driven beyond the V
BAT
voltage.
The RX output is capable of driving CMOS or 1 x LSTTL
load.
The Si9243AEY is built on the Vishay Siliconix BiC/DMOS
process. This process supports bipolar transistors, CMOS,
and DMOS. An epitaxial layer prevents latchup.
The Si9243AEY is available in a 8-pin SO package and
operates over the automotive temperature range (- 40 °C to
125 °C). The Si9243AEY is available in both standard and
lead (Pb)-free packages.
FEATURES
• Operating Power Supply Range
6 V
V
BAT
36 V
• Reverse Battery Protection Down to V
BAT
-
24 V
• Standby Mode With Very Low Current Consumption
I
BAT(SB)
= 1 µA at V
DD
= 0.5 V
• Low Quiescent Current in OFF Condition
I
BAT
= 120 µA and I
DD
10 A
• ISO 9141 Compatible
• Overtemperature Shutdown Function For K Output
• Defined K Output OFF for Open GND
• Defined Receive Output Status for Open K Input
• Defined K Output OFF for TX Input Open
• Open Drain Fault Output
• 2 kV ESD
• Typical Transmit Speeds of 200 kBaud
PIN CONFIGURATION AND FUNCTIONAL BLOCK DIAGRAM
GND
V
DD
V
BAT
V
DD
RX
L
V
DD
+
L
-
L
RX
K
+
K
-
+
V
BAT
/2
-
V
DD
K
Logic and Fault Detect Circuitry
(See State Diagram and Truth Table)
K
TX
Document Number: 70788
S11-0975-Rev. F, 16-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si9243A
Vishay Siliconix
OUTPUT TABLE AND STATE DIAGRAMS
Over Temp
INPUTS
A=0
STATE
VARIABLE
A
1
1
1
1
0
1
1
1
B
1
1
1
1
1
0
1
1
OUTPUT
TABLE
K
0
1
0
1
HiZ
HiZ
1
0
RX
K
RX
L
0
1
0
1
K
K
1
0
0
1
1
0
L
L
1
0
Over Temp
Short Circuit
Receive Mode
Comments
Power On
A=1
Over Temp . TX
Short Circuit
TX
0
1
0
1
X
0
L
0
1
1
0
L
L
1
0
Power On
B=1
B=0
TX
Note: Over Temp is an internal condition, not meant
to be a logic signal.
1
1
X = "1" or "0"
HiZ = High Impedance State
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltages Referenced to Ground
Voltage On V
BAT
Voltage K, L
Voltage Difference V
(VBAT, K, L)
Voltage On Any Pin (Except V
BAT
, K, L) or Max. Current
Voltage on V
DD
K Pin Only, Short Circuit Duration (to V
BAT
or GND)
Operating Temperature (T
A
)
Junction and Storage Temperature
Thermal Impedance (
JA
)
- 24 to 45
- 16 to (V
BAT
+ 1)
55
- 0.3 V to (V
DD
+ 0.3 V) or 10
7
Continuous
- 40 to 125
- 55 to 150
125
°C
°C/W
mA
V
V
Limit
Unit
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Voltages Referenced to Ground
V
DD
V
BAT
K, L
Digital Inputs
4.5 to 5.5
6 to 36
6 to 36
0 to V
DD
V
Limit
Unit
www.vishay.com
2
Document Number: 70788
S11-0975-Rev. F, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si9243A
Vishay Siliconix
SPECIFICATIONS
Parameter
Transmitter and Logic Levels
TX Input Low Voltage
TX Input High Voltage
TX Input Capacitance
d
TX Input Pull-up Resistance
K Transmit
R
L
= 510
± 5 %, V
BAT
= 6 to 18
K Output Low Voltage
V
OLK
R
L
= 1 k ± 5 %, V
BAT
= 16 to 36
R
L
= 510
± 5 %, V
BAT
= 4.5
K Output High Voltage
K Rise, Fall Times
K Output Sink Resistance
K Output Capacitance
d
Receiver
L and K Input High Voltage
L and K Input Hysteresis
c, d
L and K Input Currents
RX
L
and RX
K
Output Low Voltage
RX
L
and RX
K
Pull-up Resistance
RX
K
Turn On Delay
V
OHK
t
r
,
tf
Rsi
C
O
V
IH
V
HYS
I
IH
V
OLR
R
RX
t
d(on)
R
L
= 510
± 5 %, V
BAT
= 6 V to 18 V
C
L
= 10 nF, See Test Circuit
R
L
= 1 k ± 5 %, V
BAT
= 16 V to 36 V
C
L
= 4.7 nF, See Test Circuit
R
L
= 510
± 5 %, V
BAT
= 6 V to 18 V
C
L
= 10 nF, See Test Circuit
R
L
= 1 k ± 5 %, V
BAT
= 16 V to 36 V
C
L
= 4.7 nF, See Test Circuit
TX = 0 V, V
BAT
16 V
V
IHT
V
TX
, V
IHK
V
K
, V
IHL
V
L
V
BAT
12 V
V
DD
0.5 V, V
BAT
12 V
V
DD
5.5 V, TX = 0 V
V
IHT
V
TX
, V
IHK
V
K
, V
IHL
V
L
V
BAT
12 V
R
L
= 510
,
C
L
= 10 nF
6 V < V
BAT
< 16 V, C
RX
= 20 pF
6 V < V
BAT
< 16 V, R
K
= 510
,
C
K
1.3 nF
Temperature Rising
TX = 4
V
IH
= V
BAT
V
ILK
, V
ILL
= 0.35 V
BAT
I
OLR
= 1 mA
R
L
= 510
± 5 %, V
BAT
= 4.5 to 18
R
L
= 1 k ± 5 %, V
BAT
= 16 to 36
See Test Circuit
TX = 0 V
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
5
3
3
3
3
0.65 V
BAT
0.05 V
BAT
20
0.4
20
10
10
µs
10
10
0.95 V
BAT
0.95 V
BAT
9.6
110
20
µs
pF
0.2 V
BAT
0.2 V
BAT
1.2
V
Symbol
Test Conditions Unless Specified
V
DD
= 4.5 V to 5.5 V
V
BAT
= 6 V to 36 V
Limits
- 40 to 125 °C
Temp.
Full
Full
Full
V
DD
= 5.5 V, TX = 1.5 V, 3.5 V
Full
10
20
3.5
10
40
a
Unit
Max.
1.5
b
Min.
b
Typ.
c
V
ILT
V
IHT
C
INT
R
TX
V
pF
k
V
µA
V
k
RX
K
Turn Off Delay
t
d(off)
Supplies
Bat Supply Current On
Bat Supply Current Off
Bat Supply Current Standby
Logic Supply Current On
Logic Supply Current Off
Miscellaneous
TX Transmit Baud Rate
RX
L
and RX
K
Receive Baud Rate
Transmission Frequency
TX Minimum Pulse Width
d, e
Over Temperature Shutdown
d
c
I
BAT(on)
I
BAT(off)
I
BAT(SB)
I
DD(on)
I
DD(off)
Full
Full
Full
Full
Full
1.2
120
<1
1.4
3
220
10
2.3
10
mA
µA
mA
µA
BR
T
BR
R
f
K-RXK
t
TX
T
SHUT
Full
Full
Full
Full
10.4
200
50
1
160
180
200
kBaud
kHz
µs
°C
30
Temperature Shutdown Hysteresis
c
T
HYST
Notes:
a. Room = 25 °C, Cold and Hot = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. Minimum pulse width to reset a fault condition.
Document Number: 70788
S11-0975-Rev. F, 16-May-11
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si9243A
Vishay Siliconix
PIN CONFIGURATION
Narrow Body
SO Package
RX
K
RX
L
V
DD
TX
1
2
3
4
8
7
6
5
L
V
BAT
K
GND
ORDERING INFORMATION
Part Number
Si9243AEY-T1
Si9243AEY-T1-E3 (Lead (Pb)-free)
Temperature Range
- 40 to 125 °C
Top View
PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
Symbol
RX
K
RX
L
V
DD
TX
GND
K
V
BAT
L
Description
K Receiver, Output
L Receiver, Output
Positive Power Supply
Transmit, Input
Ground Connection
K Transmit/Receive, Bidirectional
Battery Power Supply
L Transmit, Input
FUNCTIONAL DESCRIPTION
The Si9243AEY can be either in transmit or receive mode
and it contains over temperature, and short circuit V
BAT
fault
detection circuits.
output to protect the IC. The K pin will stay in high impedance
and RX
K
will follow the K pin. The fault will be reset when TX
is toggled high. RX
K
, RX
L
and TX pins have internal pull up
resistor to V
DD
while K and L pins have internal pull down
resistors. When any one of the TX, V
BAT
or GND pins is open
the K output is off.
The voltage on the K and L pins are internally compared to
V
BAT/2
. If the voltage on the K or L pin is less than V
BAT/2
then
RX
K
or RX
L
output will be "low". If the voltage on the K or L
pin is greater than V
BAT/2
then RX
K
or RX
L
output will be
"high".
When the TX pin is set "high" the Si9243AEY is in receive
mode and the internal MOSFET is turned off. RX
L
and RX
K
outputs will follow L and K inputs respectively.
In order to be in transmit mode, TX must be set "low". The TX
signal is then internally inverted and turns the MOSFET on,
causing the K pin to be "low". In transmit mode, the
processor monitors the RX
K
and TX. When the two mirror
each other there is no fault. In the event of over temperature,
or short circuit to V
BAT
, the Si9243AEY will turn off the K
www.vishay.com
4
Document Number: 70788
S11-0975-Rev. F, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
Si9243A
Vishay Siliconix
TEST CIRCUIT AND TIMING DIAGRAMS (TRANSMIT ONLY)
V
DD
V
BAT
V
DD
Si9243AEY
RX
K
t
d(off)
t
d(on)
L
RX
L
V
DD
V
BAT
+
-
TX
TX
min
V
BAT
RX
K
V
DD
+
-
V
+
-
R
L
K
80 %
80 %
C
L
TX
V
K
, V
L
t
r
t
f
20 %
20 %
GND
R
L
= 510
Ω
, C
L
= 10 nF, V
BAT
= 6 V to 18 V
R
L
= 1 kΩ, C
L
= 4.7 nF, V
BAT
= 16 V to 36 V
APPLICATIONS CIRCUIT
Diagnostic Tester
V
DD
ECU
Si9243AEY
V
B
L-Line
+
-
V
DD
I/Os
Microcontroller
510
Ω
+
0.4
Ω
V
-
V
DD
+
-
K-Line
V
BAT
V
DD
C1
0.1 µF
50 V
C1
0.1 µF
Bus
ECU = Electronic Control Unit
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see
www.vishay.com/ppg?70788.
Document Number: 70788
S11-0975-Rev. F, 16-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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