SIHF644NS [VISHAY]

Power MOSFET; 功率MOSFET
SIHF644NS
型号: SIHF644NS
厂家: VISHAY    VISHAY
描述:

Power MOSFET
功率MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
文件: 总8页 (文件大小:171K)
中文:  中文翻译
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IRF644N, IRF644NS, IRF644NL, SiHF644N, SiHF644NS, SiHF644NL  
Vishay Siliconix  
Power MOSFET  
FEATURES  
PRODUCT SUMMARY  
VDS (V)  
• Advanced Process Technology  
• Dynamic dV/dt Rating  
• 175 °C Operating Temperature  
• Fast Switching  
250 V  
Available  
RDS(on) (Ω)  
Qg (Max.) (nC)  
VGS = 10 V  
0.240  
RoHS*  
COMPLIANT  
54  
9.2  
26  
• Fully Avalanche Rated  
• Ease of Paralleling  
Q
Q
gs (nC)  
gd (nC)  
• Simple Drive Requirements  
• Lead (Pb)-free Available  
Configuration  
D2PAK (TO-263)  
Single  
D
DESCRIPTION  
Fifth generation Power MOSFETs from Vishay utilize  
advanced processing techniques to achieve extremely low  
on-resistance per silicon area. This benefit, combined with  
the fast switching speed and ruggedized device design that  
Power MOSFETs are well known for, provides the designer  
with an extremely efficient and reliable device for use in a  
wide variety of applications.  
The TO-220 package is universally preferred for all  
commercial-industrial applications at power dissipation  
levels to approximately 50 W. The low thermal resistance  
and low package cost of the TO-220 contribute to its wide  
acceptance throughout the industry.  
D
S
G
G
I2PAK (TO-262)  
TO-220  
S
N-Channel MOSFET  
S
D
The D2PAK is a surface mount power package capable of  
accommodating die sizes up to HEX-4. It provides the  
highest power capability and the lowest possible on  
resistance in any existing surface mount package. The  
D2PAK is suitable for high current applications because of its  
low internal connection resistance and can dissipate up to  
2.0 W in a typical surface mount application.  
G
ORDERING INFORMATION  
Package  
TO-220  
D2PAK (TO-263)  
IRF644NSPbF  
SiHF644NS-E3  
IRF644NS  
D2PAK (TO-263)  
IRF644NSTRLPbFa  
SiHF644NSTL-E3a  
IRF644NSTRLa  
D2PAK (TO-263)  
IRF644NSTRRPbFa  
SiHF644NSTR-E3a  
IRF644NSTRRa  
SiHF644NSTRa  
I2PAK (TO-262)  
IRF644NLPbF  
SiHF644NL-E3  
IRF644NL  
IRF644NPbF  
SiHF644N-E3  
IRF644N  
Lead (Pb)-free  
SnPb  
SiHF644N  
SiHF644NS  
SiHF644NSTLa  
SiHF644NL  
Note  
a. See device orientation.  
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted  
PARAMETER  
SYMBOL  
LIMIT  
20  
UNIT  
Gate-Source Voltage  
VGS  
V
TC = 25 °C  
TC =100°C  
14  
Continuous Drain Current  
VGS at 10 V  
ID  
9.9  
56  
A
Pulsed Drain Currenta  
IDM  
Linear Derating Factor  
Single Pulse Avalanche Energyb  
1.0  
180e  
8.4  
15  
W/°C  
mJ  
A
EAS  
IAR  
Avalanche Current  
Repetitive Avalanche Energy  
Maximum Power Dissipation  
Peak Diode Recovery dV/dtc  
EAR  
PD  
mJ  
W
T
C = 25 °C  
150  
7.9  
dV/dt  
V/ns  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 91038  
S-Pending-Rev. A, 19-Jun-08  
www.vishay.com  
1
WORK-IN-PROGRESS  
IRF644N, IRF644NS, IRF644NL, SiHF644N, SiHF644NS, SiHF644NL  
Vishay Siliconix  
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted  
PARAMETER  
SYMBOL  
LIMIT  
- 55 to + 175  
300d  
UNIT  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak Temperature)  
TJ, Tstg  
°C  
for 10 s  
10  
lbf · in  
N · m  
Mounting Torque  
6-32 or M3 screw  
1.1  
Notes  
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Starting TJ = 25 °C, L = 5.0 µH, RG = 25 Ω IAS = 8.4 A (see fig. 12).  
c. ISD 8.4 A, dI/dt 378 A/µs, VDD VDS, TJ 175 °C.  
d. 1.6 mm from case.  
e. This is a calculated value limited to TJ = 175 °C.  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
RthJA  
TYP.  
MAX.  
UNIT  
Maximum Junction-to-Ambientc  
Case-to-Sink, Flat, Greased Surfacec  
Maximum Junction-to-Case (Drain)  
Maximum Junction-to-Ambient (PCB Mount)d  
-
62  
-
RthCS  
0.50  
°C/W  
RthJC  
-
-
1.0  
40  
RthJA  
SPECIFICATIONS TJ = 25 °C, unless otherwise noted  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP. MAX. UNIT  
Static  
Drain-Source Breakdown Voltage  
VDS Temperature Coefficient  
Gate-Source Threshold Voltage  
Gate-Source Leakage  
VDS  
ΔVDS/TJ  
VGS(th)  
IGSS  
VGS = 0 V, ID = 250 µA  
Reference to 25 °C, ID = 1 mA  
VDS = VGS, ID = 250 µA  
VGS = 20 V  
250  
-
-
-
V
V/°C  
V
-
0.33  
2.0  
-
-
-
-
-
-
4.0  
100  
25  
-
nA  
VDS = 250 V, VGS = 0 V  
DS = 200 V, VGS = 0 V, TJ = 150 °C  
-
-
Zero Gate Voltage Drain Current  
IDSS  
µA  
V
250  
0.240  
-
Drain-Source On-State Resistance  
Forward Transconductance  
Dynamic  
RDS(on)  
gfs  
VGS = 10 V  
VDS = 50 V, ID = 8.4 Ab  
ID = 8.4 Ab  
-
Ω
8.8  
S
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
Turn-On Delay Time  
Rise Time  
Ciss  
Coss  
Crss  
Qg  
-
-
-
-
-
-
-
-
-
-
1060  
140  
38  
-
-
-
VGS = 0 V,  
V
DS = 25 V,  
pF  
nC  
f = 1.0 MHz, see fig. 5  
-
54  
9.2  
26  
-
ID = 8.4 A, VDS = 200 V,  
see fig. 6 and 13b  
Qgs  
Qgd  
td(on)  
tr  
V
GS = 10 V  
-
-
10  
21  
30  
17  
-
V
DD = 125 V, ID = 8.4 A,  
ns  
Turn-Off Delay Time  
Fall Time  
td(off)  
tf  
R
G = 6.2 Ω, VGS = 10 V, see fig. 10b  
-
-
D
Between lead,  
Internal Drain Inductance  
Internal Source Inductance  
LD  
LS  
-
-
4.5  
7.5  
-
-
6 mm (0.25") from  
package and center of  
die contact  
nH  
G
S
www.vishay.com  
2
Document Number: 91038  
S-Pending-Rev. A, 19-Jun-08  
IRF644N, IRF644NS, IRF644NL, SiHF644N, SiHF644NS, SiHF644NL  
Vishay Siliconix  
SPECIFICATIONS TJ = 25 °C, unless otherwise noted  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP. MAX. UNIT  
Drain-Source Body Diode Characteristics  
MOSFET symbol  
showing the  
integral reverse  
p - n junction diode  
D
Continuous Source-Drain Diode Current  
Pulsed Diode Forward Currenta  
IS  
-
-
-
-
14  
56  
A
G
ISM  
S
Body Diode Voltage  
VSD  
trr  
TJ = 25 °C, IS = 14 A, VGS = 0 Vb  
-
-
-
-
1.3  
250  
1.6  
V
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
Forward Turn-On Time  
165  
1.0  
ns  
µC  
TJ = 25 °C, IF = 14 A, dI/dt = 100 A/µsb  
Qrr  
ton  
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)  
Notes  
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Pulse width 300 µs; duty cycle 2 %.  
c. This is only applied to TO-220 package.  
d. When mounted on 1" square PCB (fr-4 or G-10 material).  
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted  
100  
100  
VGS  
VGS  
15V  
10V  
TOP  
15V  
TOP  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
10  
1
10  
1
BOTTOM  
BOTTOM  
4.5V  
4.5V  
20μs PULSE WIDTH  
Tj = 175°C  
20μs PULSE WIDTH  
Tj = 25°C  
0.1  
0.1  
0.1  
1
10  
100  
0.1  
1
10  
100  
VDS, Drain-to-Source Voltage (V)  
VDS, Drain-to-Source Voltage (V)  
Fig. 2 - Typical Output Characteristics  
Fig. 1 - Typical Output Characteristics  
Document Number: 91038  
S-Pending-Rev. A, 19-Jun-08  
www.vishay.com  
3
IRF644N, IRF644NS, IRF644NL, SiHF644N, SiHF644NS, SiHF644NL  
Vishay Siliconix  
100  
10000  
V
= 0V, f = 1 MHZ  
GS  
T = 175°C  
J
C
C
C
= C + C , C SHORTED  
iss  
gs gd ds  
= C  
gd  
rss  
oss  
= C + C  
ds gd  
Ciss  
1000  
100  
T = 25°C  
J
10  
Coss  
Crss  
V
= 50V  
DS  
20μs PULSE WIDTH  
10  
1
1
10  
, Drain-to-Source Voltage (V)  
100  
4
6
8
10  
11 13  
15  
VGS, Gate-to-Source Voltage (V)  
Fig. 3 - Typical Transfer Characteristics  
V
DS  
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage  
3.5  
3.0  
2.5  
2.0  
18  
I
= 14A  
D
I
= 8.4A  
D
V
V
V
= 200V  
= 125V  
= 50V  
DS  
DS  
DS  
16  
12  
8
1.5  
1.0  
4
0.5  
0.0  
V
= 10V  
GS  
0
-60 -40 -20  
0
20 40 60 80 100 120 140160180  
0
12  
24  
36  
48  
60  
T , Junction Temperature (°C)  
J
O , Total Gate Charge (nC)  
G
Fig. 4 - Normalized On-Resistance vs. Temperature  
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage  
www.vishay.com  
4
Document Number: 91038  
S-Pending-Rev. A, 19-Jun-08  
IRF644N, IRF644NS, IRF644NL, SiHF644N, SiHF644NS, SiHF644NL  
Vishay Siliconix  
100  
15  
12  
T = 175°C  
J
10  
1
9
6
3
0
T = 25°C  
J
V
= 0V  
GS  
0.1  
25  
50  
75  
100  
125  
150  
175  
0.0  
0.4  
0.8  
1.1  
1.5  
T
= Case Temperature (°C)  
C
V
, Source-to-Drain Voltage (V)  
SD  
Fig. 7 - Typical Source-Drain Diode Forward Voltage  
Fig. 9 - Maximum Drain Current vs. Case Temperature  
RD  
VDS  
1000  
100  
10  
VGS  
D.U.T.  
RG  
+
OPERATION THIS AREA  
LIMITED BY R (on)  
V
-
DD  
DS  
10 V  
Pulse width 1 µs  
Duty factor 0.1 %  
Fig. 10a - Switching Time Test Circuit  
100μsec  
1msec  
VDS  
1
90 %  
Tc = 25°C  
Tj = 175°C  
Single Pulse  
10msec  
0.1  
10 %  
VGS  
1000  
1
10  
100  
td(on) tr  
td(off) tf  
V
, Drain-to-Source Voltage (V)  
DS  
Fig. 8 - Maximum Safe Operating Area  
Fig. 10b - Switching Time Waveforms  
Document Number: 91038  
S-Pending-Rev. A, 19-Jun-08  
www.vishay.com  
5
IRF644N, IRF644NS, IRF644NL, SiHF644N, SiHF644NS, SiHF644NL  
Vishay Siliconix  
10  
1
D= 0.50  
0.20  
P
DM  
0.10  
0.05  
0.1  
t
1
SINGLE PULSE  
0.02  
0.01  
t
2
(THERMAL RESPONSE)  
Notes:  
1. Duty factor D= t / t  
1
2
2. Peak T = P  
x Z + T  
J
DM  
thJC C  
0.01  
0.00001  
0.001  
0.001  
0.01  
0.1  
1
t , Rectangular Pulse Duration (sec)  
1
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case  
VDS  
15 V  
tp  
Driver  
L
VDS  
D.U.T  
IAS  
RG  
+
-
V
A
DD  
IAS  
20 V  
0.01 Ω  
tp  
Fig. 12b - Unclamped Inductive Waveforms  
Fig. 12a - Unclamped Inductive Test Circuit  
300  
ID  
3.4A  
5.9A  
TOP  
BOTTOM 8.4A  
240  
180  
120  
60  
0
25  
50  
75  
100  
125  
150  
175  
Starting T , Junction Temperature (° C)  
J
Fig. 12c - Maximum Avalanche Energy vs. Drain Current  
www.vishay.com  
6
Document Number: 91038  
S-Pending-Rev. A, 19-Jun-08  
IRF644N, IRF644NS, IRF644NL, SiHF644N, SiHF644NS, SiHF644NL  
Vishay Siliconix  
Current regulator  
Same type as D.U.T.  
50 kΩ  
QG  
VGS  
0.2 µF  
12 V  
0.3 µF  
QGS  
QGD  
+
-
VDS  
D.U.T.  
VG  
VGS  
3 mA  
Charge  
IG  
Current sampling resistors  
Fig. 13b - Gate Charge Test Circuit  
ID  
Fig. 13a - Basic Gate Charge Waveform  
Peak Diode Recovery dV/dt Test Circuit  
+
Circuit layout considerations  
Low stray inductance  
Ground plane  
D.U.T  
Low leakage inductance  
current transformer  
-
+
-
-
+
RG  
+
-
VDD  
dV/dt controlled by RG  
ISD controlled by duty factor "D"  
D.U.T. - device under test  
Driver gate drive  
P.W.  
Period  
Period  
D =  
P.W.  
V
= 10 V*  
GS  
D.U.T. I waveform  
SD  
Reverse  
recovery  
current  
Body diode forward  
current  
dI/dt  
D.U.T. V waveform  
DS  
Diode recovery  
dV/dt  
V
DD  
Re-applied  
voltage  
Body diode forward drop  
Ripple 5 %  
Inductor current  
I
SD  
* VGS = 5 V for logic level devices and 3 V drive devices  
Fig. 14 - For N-Channel  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see http://www.vishay.com/ppg?91038.  
Document Number: 91038  
S-Pending-Rev. A, 19-Jun-08  
www.vishay.com  
7
Legal Disclaimer Notice  
Vishay  
Disclaimer  
All product specifications and data are subject to change without notice.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf  
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein  
or in any other disclosure relating to any product.  
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any  
information provided herein to the maximum extent permitted by law. The product specifications do not expand or  
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed  
therein, which apply to these products.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this  
document or by any conduct of Vishay.  
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless  
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such  
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting  
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding  
products designed for such applications.  
Product names and markings noted herein may be trademarks of their respective owners.  
Document Number: 91000  
Revision: 18-Jul-08  
www.vishay.com  
1

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