SIHL530S-E3 [VISHAY]

TRANSISTOR 15 A, 100 V, 0.16 ohm, N-CHANNEL, Si, POWER, MOSFET, ROHS COMPLIANT, SMD-220, 3 PIN, FET General Purpose Power;
SIHL530S-E3
型号: SIHL530S-E3
厂家: VISHAY    VISHAY
描述:

TRANSISTOR 15 A, 100 V, 0.16 ohm, N-CHANNEL, Si, POWER, MOSFET, ROHS COMPLIANT, SMD-220, 3 PIN, FET General Purpose Power

开关 脉冲 晶体管
文件: 总8页 (文件大小:1019K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IRL530S, SiHL530S  
Vishay Siliconix  
Power MOSFET  
FEATURES  
PRODUCT SUMMARY  
VDS (V)  
• Surface Mount  
100  
• Available in Tape and Reel  
• Dynamic dV/dt Rating  
RDS(on) (Ω)  
VGS = 5.0 V  
0.16  
Qg (Max.) (nC)  
28  
3.8  
• Repetitive Avalanche Rated  
• Logic Level Gate Drive  
• RDS(on) Specified at VGS = 4 V and 5 V  
• 175 °C Operating Temperature  
• Lead (Pb)-free Available  
Q
Q
gs (nC)  
gd (nC)  
14  
Configuration  
Single  
D
DESCRIPTION  
D2PAK (TO-263)  
Third generation Power MOSFETs from Vishay provide the  
designer with the best combination of fast switching,  
ruggedized device design, low on-resistance and  
cost-effectiveness.  
G
The D2PAK (TO-263) is a surface mount power package  
capable of accommodating die sizes up to HEX-4. It provides  
the highest power capability and the lowest possible on  
resistance in any existing surface mount package. The  
D2PAK (TO-263) is suitable for high current applications  
because of its low internal connection resistance and can  
dissipate up to 2.0 W in a typical surface mount application.  
D
G
S
S
N-Channel MOSFET  
ORDERING INFORMATION  
Package  
D2PAK (TO-263)  
-
-
IRL530S  
SiHL530S  
D2PAK (TO-263)  
IRL530STRRPbFa  
Lead (Pb)-free  
SnPb  
SiHL530STR-E3a  
-
-
Note  
a. See device orientation.  
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted  
PARAMETER  
SYMBOL  
LIMIT  
UNIT  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
VGS  
100  
10  
V
T
C = 25 °C  
15  
11  
60  
Continuous Drain Current  
V
GS at 5 V  
ID  
A
TC =100°C  
Pulsed Drain Currenta  
IDM  
Linear Derating Factor  
0.59  
0.025  
290  
15  
8.8  
W/°C  
Linear Derating Factor (PCB Mount)e  
Single Pulse Avalanche Energyb  
Repetitive Avalanche Currenta  
EAS  
IAR  
EAR  
mJ  
A
mJ  
Repetitive Avalanche Energya  
Maximum Power Dissipation  
Maximum Power Dissipation (PCB Mount)e  
Peak Diode Recovery dV/dtc  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak Temperature)  
TC = 25 °C  
TA = 25 °C  
88  
3.7  
5.5  
PD  
W
V/ns  
°C  
dV/dt  
TJ, Tstg  
- 55 to + 175  
300d  
for 10 s  
Notes  
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. VDD = 25 V, starting TJ = 25 °C, L = 1.9 mH, RG = 25 Ω, IAS = 15 A (see fig. 12).  
c. ISD 15 A, dI/dt 140 A/µs, VDD VDS, TJ 175 °C.  
d. 1.6 mm from case.  
e. When mounted on 1" square PCB (FR-4 or G-10 material).  
* Pb containing terminations are not RoHS compliant, exemptions may apply  
Document Number: 91342  
S09-0065-Rev. A, 02-Feb-09  
For technical questions, contact: hvmos.techsupport@vishay.com  
www.vishay.com  
1
IRL530S, SiHL530S  
Vishay Siliconix  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
TYP.  
MAX.  
62  
UNIT  
Maximum Junction-to-Ambient  
Maximum Junction-to Ambient (PCB mount)a  
Maximum Junction-to-Case (Drain)  
RthJA  
RthJA  
RthJC  
-
-
-
40  
°C/W  
1.7  
Note  
a. When mounted on 1" square PCB (FR-4 or G-10 material).  
SPECIFICATIONS TJ = 25 °C, unless otherwise noted  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX. UNIT  
Static  
Drain-Source Breakdown Voltage  
VDS Temperature Coefficient  
Gate-Source Threshold Voltage  
Gate-Source Leakage  
VDS  
ΔVDS/TJ  
VGS(th)  
IGSS  
VGS = 0 V, ID = 250 µA  
Reference to 25 °C, ID = 1 mA  
VDS = VGS, ID = 250 µA  
100  
-
-
V
V/°C  
V
-
0.14  
-
1.0  
-
-
-
-
-
-
-
2.0  
100  
25  
VGS  
VDS = 100 V, VGS = 0 V  
DS = 80 V, VGS = 0 V, TJ = 150 °C  
=
10 V  
-
nA  
-
Zero Gate Voltage Drain Current  
Drain-Source On-State Resistance  
IDSS  
µA  
V
-
-
250  
0.16  
0.22  
-
VGS = 5.0 V  
GS = 4.0 V  
ID = 9.0 Ab  
ID = 7.5 Ab  
RDS(on)  
gfs  
Ω
V
-
Forward Transconductance  
Dynamic  
VDS = 50 V, ID = 9.0 Ab  
6.4  
S
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
Turn-On Delay Time  
Rise Time  
Ciss  
Coss  
Crss  
Qg  
-
-
-
-
-
-
-
-
-
-
930  
250  
57  
-
-
-
VGS = 0 V,  
DS = 25 V,  
f = 1.0 MHz, see fig. 5  
V
pF  
nC  
-
28  
3.8  
14  
-
ID = 15 A, VDS = 80 V,  
see fig. 6 and 13b  
Qgs  
Qgd  
td(on)  
tr  
VGS = 5.0 V  
-
-
4.7  
100  
22  
48  
-
VDD = 50 V, ID = 15 A,  
G = 12 Ω, RD = 32 Ω, see fig. 10b  
ns  
Turn-Off Delay Time  
Fall Time  
td(off)  
tf  
-
R
-
D
Between lead,  
Internal Drain Inductance  
LD  
LS  
-
-
4.5  
7.5  
-
-
6 mm (0.25") from  
packageandcenterof  
die contact  
nH  
G
Internal Source Inductance  
S
Drain-Source Body Diode Characteristics  
Continuous Source-Drain Diode Current  
D
MOSFET symbol  
showing the  
integral reverse  
p - n junction diode  
IS  
-
-
-
-
15  
60  
A
G
Pulsed Diode Forward Currenta  
ISM  
S
Body Diode Voltage  
VSD  
trr  
TJ = 25 °C, IS = 15 A, VGS = 0 Vb  
-
-
-
-
2.5  
200  
1.4  
V
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
Forward Turn-On Time  
150  
0.93  
ns  
µC  
TJ = 25 °C, IF = 15 A, dI/dt = 100 A/µsb  
Qrr  
ton  
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)  
Notes  
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).  
b. Pulse width 300 µs; duty cycle 2 %.  
www.vishay.com  
2
For technical questions, contact: hvmos.techsupport@vishay.com  
Document Number: 91342  
S09-0065-Rev. A, 02-Feb-09  
IRL530S, SiHL530S  
Vishay Siliconix  
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted  
Fig. 1 - Typical Output Characteristics, TC = 25 °C  
Fig. 3 - Typical Transfer Characteristics  
Fig. 2 - Typical Output Characteristics, TC = 175 °C  
Fig. 4 - Normalized On-Resistance vs. Temperature  
Document Number: 91342  
S09-0065-Rev. A, 02-Feb-09  
For technical questions, contact: hvmos.techsupport@vishay.com  
www.vishay.com  
3
IRL530S, SiHL530S  
Vishay Siliconix  
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage  
Fig. 7 - Typical Source-Drain Diode Forward Voltage  
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage  
Fig. 8 - Maximum Safe Operating Area  
www.vishay.com  
4
For technical questions, contact: hvmos.techsupport@vishay.com  
Document Number: 91342  
S09-0065-Rev. A, 02-Feb-09  
IRL530S, SiHL530S  
Vishay Siliconix  
RD  
VDS  
VGS  
D.U.T.  
RG  
+
V
-
DD  
5 V  
Pulse width 1 µs  
Duty factor 0.1 %  
Fig. 10a - Switching Time Test Circuit  
VDS  
90 %  
10 %  
VGS  
td(on) tr  
td(off) tf  
Fig. 9 - Maximum Drain Current vs. Case Temperature  
Fig. 10b - Switching Time Waveforms  
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case  
L
V(BR)DSS  
VDS  
Vary tp to obtain  
required IAS  
tp  
VDD  
D.U.T  
RG  
+
-
VDD  
VDS  
IAS  
5 V  
0.01 Ω  
tp  
IAS  
Fig. 12a - Unclamped Inductive Test Circuit  
Fig. 12b - Unclamped Inductive Waveforms  
Document Number: 91342  
S09-0065-Rev. A, 02-Feb-09  
For technical questions, contact: hvmos.techsupport@vishay.com  
www.vishay.com  
5
IRL530S, SiHL530S  
Vishay Siliconix  
Fig. 12c - Maximum Avalanche Energy vs. Drain Current  
Current regulator  
Same type as D.U.T.  
50 kΩ  
QG  
5 V  
12 V  
0.2 µF  
0.3 µF  
QGS  
QGD  
+
-
VDS  
D.U.T.  
VG  
VGS  
3 mA  
Charge  
IG  
ID  
Current sampling resistors  
Fig. 13b - Gate Charge Test Circuit  
Fig. 13a - Basic Gate Charge Waveform  
www.vishay.com  
6
For technical questions, contact: hvmos.techsupport@vishay.com  
Document Number: 91342  
S09-0065-Rev. A, 02-Feb-09  
IRL530S, SiHL530S  
Vishay Siliconix  
Peak Diode Recovery dV/dt Test Circuit  
+
Circuit layout considerations  
Low stray inductance  
Ground plane  
D.U.T.  
Low leakage inductance  
current transformer  
-
+
-
-
+
RG  
dV/dt controlled by RG  
+
-
Driver same type as D.U.T.  
ISD controlled by duty factor "D"  
D.U.T. - device under test  
VDD  
Driver gate drive  
P.W.  
P.W.  
Period  
Period  
D =  
V
= 10 V*  
GS  
D.U.T. I waveform  
SD  
Reverse  
recovery  
current  
Body diode forward  
current  
dI/dt  
D.U.T. V waveform  
DS  
Diode recovery  
dV/dt  
V
DD  
Re-applied  
voltage  
Body diode forward drop  
Ripple 5 %  
Inductor current  
I
SD  
* VGS = 5 V for logic level devices  
Fig. 14 - For N-Channel  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see www.vishay.com/ppg?91342.  
Document Number: 91342  
S09-0065-Rev. A, 02-Feb-09  
For technical questions, contact: hvmos.techsupport@vishay.com  
www.vishay.com  
7
Legal Disclaimer Notice  
Vishay  
Disclaimer  
All product specifications and data are subject to change without notice.  
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf  
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein  
or in any other disclosure relating to any product.  
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any  
information provided herein to the maximum extent permitted by law. The product specifications do not expand or  
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed  
therein, which apply to these products.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this  
document or by any conduct of Vishay.  
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless  
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such  
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting  
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding  
products designed for such applications.  
Product names and markings noted herein may be trademarks of their respective owners.  
Document Number: 91000  
Revision: 18-Jul-08  
www.vishay.com  
1

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