SIHS36N50D-E3 [VISHAY]
TRANSISTOR POWER, FET, FET General Purpose Power;型号: | SIHS36N50D-E3 |
厂家: | VISHAY |
描述: | TRANSISTOR POWER, FET, FET General Purpose Power 开关 脉冲 晶体管 |
文件: | 总8页 (文件大小:174K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SiHS36N50D
Vishay Siliconix
www.vishay.com
D Series Power MOSFET
FEATURES
• Optimal Design
PRODUCT SUMMARY
VDS (V) at TJ max.
DS(on) max. at 25 °C ()
Qg max. (nC)
550
- Low Area specific On-Resistance
- Low Input Capacitance (Ciss
R
VGS = 10 V
0.130
)
125
23
- Reduced Capacitive Switching Losses
- High Body Diode Ruggedness
- Avalanche Energy Rated (UIS)
• Optimal Efficiency and Operation
- Low Cost
Q
gs (nC)
gd (nC)
Q
37
Configuration
Single
- Simple Gate Drive Circuitry
- Low Figure-Of-Merit (FOM): Ron x Qg
- Fast Switching
D
Super-247
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
S
G
D
G
APPLICATIONS
• Consumer Electronics
- Displays (LCD or Plasma TV
• Server and Telecom Power Supplies
- SMPS
S
N-Channel MOSFET
• Industrial
- Welding, Induction Heating, Motor Drives
• Battery Chargers
ORDERING INFORMATION
Package
Super-247
Lead (Pb)-free
SiHS36N50D-E3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
VDS
500
V
Gate-Source Voltage
30
VGS
Gate-Source Voltage AC (f > 1 Hz)
30
TC = 25 °C
C = 100 °C
36
23
Continuous Drain Current (TJ = 150 °C)
VGS at 10 V
ID
T
A
Pulsed Drain Currenta
IDM
112
Linear Derating Factor
Single Pulse Avalanche Energyb
3.6
W/°C
mJ
W
EAS
PD
332
Maximum Power Dissipation
446
Operating Junction and Storage Temperature Range
Drain-Source Voltage Slope
Reverse Diode dV/dtd
TJ, Tstg
- 55 to + 150
24
°C
TJ = 125 °C
dV/dt
V/ns
°C
0.1
300c
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. VDD = 50 V, starting TJ = 25 °C, L = 2.3 mH, Rg = 25 , IAS = 17 A.
c. 1.6 mm from case.
d. ISD ID, starting TJ = 25 °C.
S12-1457-Rev. A, 18-Jun-12
Document Number: 91514
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHS36N50D
Vishay Siliconix
www.vishay.com
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
RthJA
RthJC
-
-
40
°C/W
Maximum Junction-to-Case (Drain)
0.28
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate Threshold Voltage (N)
Gate-Source Leakage
VDS
VDS/TJ
VGS(th)
IGSS
VGS = 0 V, ID = 250 μA
500
-
-
-
V
V/°C
V
-
3.0
-
0.52
Reference to 25 °C, ID = 250 μA
VDS = VGS, ID = 250 μA
-
5.0
100
1
VGS
=
30 V
-
-
nA
VDS = 500 V, VGS = 0 V
-
Zero Gate Voltage Drain Current
IDSS
μA
V
DS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
10
0.130
-
Drain-Source On-State Resistance
Forward Transconductancea
RDS(on)
gfs
VGS = 10 V
ID = 18 A
-
0.105
12.8
VDS = 50 V, ID = 18 A
-
S
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Ciss
Coss
Crss
-
-
-
3233
285
25
-
-
-
VGS = 0 V,
V
DS = 100 V,
f = 1 MHz
pF
nC
Effective Output Capacitance, Energy
Relateda
Co(er)
Co(tr)
-
-
240
352
-
-
VGS = 0 V, VDS = 0 V to 400 V
Effective Output Capacitance, Time
Relatedb
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Qg
Qgs
Qgd
td(on)
tr
-
-
-
-
-
-
-
-
83
23
37
33
89
79
68
1.8
125
-
V
GS = 10 V
ID = 18 A, VDS = 400 V
-
66
134
119
102
-
V
V
DD = 400 V, ID = 18 A,
GS = 10 V, Rg = 9.1
ns
Turn-Off Delay Time
Fall Time
td(off)
tf
Gate Input Resistance
Rg
f = 1 MHz, open drain
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous Source-Drain Diode Current
IS
-
-
-
-
36
A
G
Pulsed Diode Forward Current
ISM
144
S
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
VSD
trr
TJ = 25 °C, IS = 18 A, VGS = 0 V
-
-
-
-
-
1.2
V
ns
μC
A
490
8.2
31
-
-
-
TJ = 25 °C, IF = IS = 18 A,
dI/dt = 100 A/μs, VR = 20 V
Qrr
IRRM
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
.
.
S12-1457-Rev. A, 18-Jun-12
Document Number: 91514
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHS36N50D
Vishay Siliconix
www.vishay.com
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
3
2.5
2
120
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9 V
TJ = 25 °C
ID = 18 A
90
60
30
0
8 V
7 V
6 V
BOTTOM 5 V
1.5
1
VGS = 10 V
0.5
0
- 60 - 40 - 20
0
20 40 60 80 100 120 140 160
0
5
10
15
20
25
30
TJ, Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
80
60
40
20
0
10 000
TOP
15 V
14 V
13 V
12 V
11 V
10 V
9 V
TJ = 150 °C
Ciss
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
1000
100
10
8 V
7 V
Coss = Cds + Cgd
6 V
BOTTOM 5 V
Coss
Crss
1
0
5
10
15
20
25
30
0
100
200
300
400
500
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
120
90
60
30
0
24
VDS = 400 V
VDS = 250 V
VDS = 100 V
TJ = 25 °C
20
16
12
8
TJ = 150 °C
4
0
0
5
10
15
20
25
0
30
60
90
120
150
VGS, Gate-to-Source Voltage (V)
Qg, Total Gate Charge (nC)
Fig. 3 - Typical Transfer Characteristics
S12-1457-Rev. A, 18-Jun-12
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91514
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHS36N50D
Vishay Siliconix
www.vishay.com
40
30
20
10
0
1000
ġ
100
ġ
T
= 150 °C
J
ġ
ġ
10
1
ġ
ġ
T
= 25 °C
J
V
= 0 V
ġ
GS
0.1
ġ
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
25
50
75
100
125
150
VSD, Source-Drain Voltage (V)
TJ, Case Temperature (°C)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 9 - Maximum Drain Current vs. Case Temperature
1000
625
600
575
550
525
IDM = Limited
Operation in this Area
Limited by RDS(on)
100
Limited by RDS(on)
*
10
1
100 μs
1 ms
T
T
= 25 °C
= 150 °C
10 ms
C
J
500
475
Single Pulse
BVDSS Limited
0.1
1
10
100
1000
- 60 - 40 - 20
0
20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is s
TJ, Junction Temperature (°C)
Fig. 8 - Maximum Safe Operating Area
Fig. 10 - Temperature vs. Drain-to-Source Voltage
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
Single Pulse
0.02
0.01
0.0001
0.001
0.01
0.1
1
Pulse Time (s)
Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case
S12-1457-Rev. A, 18-Jun-12
Document Number: 91514
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHS36N50D
Vishay Siliconix
www.vishay.com
RD
VDS
QG
10 V
VGS
D.U.T.
QGS
QGD
RG
+
-
V
DD
VG
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
Charge
Fig. 12 - Switching Time Test Circuit
Fig. 16 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
VDS
90 %
50 kΩ
12 V
0.2 μF
0.3 μF
+
-
VDS
10 %
VGS
D.U.T.
td(on) tr
td(off) tf
VGS
3 mA
Fig. 13 - Switching Time Waveforms
IG
ID
Current sampling resistors
Fig. 17 - Gate Charge Test Circuit
L
VDS
Vary tp to obtain
required IAS
D.U.T.
IAS
RG
+
-
VDD
10 V
0.01 Ω
tp
Fig. 14 - Unclamped Inductive Test Circuit
VDS
tp
VDD
VDS
IAS
Fig. 15 - Unclamped Inductive Waveforms
S12-1457-Rev. A, 18-Jun-12
Document Number: 91514
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHS36N50D
Vishay Siliconix
www.vishay.com
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
• Low stray inductance
• Ground plane
D.U.T.
• Low leakage inductance
current transformer
-
+
-
-
+
Rg
• dV/dt controlled by Rg
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
P.W.
D =
Period
Period
VGS = 10 Va
D.U.T. lSD waveform
D.U.T. VDS waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
VDD
Re-applied
voltage
Body diode forward drop
Inductor current
ISD
Ripple ≤ 5 %
Note
a. VGS = 5 V for logic level devices
Fig. 18 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91514.
S12-1457-Rev. A, 18-Jun-12
Document Number: 91514
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
TO-274AA (High Voltage)
A
A
B
E
D2
E1
E4
A1
R
D1
D
L1
L
Detail “A”
C
b
e
A2
0.10 (0.25) M
M
B A
b4
b2
Lead Tip
Detail “A”
Scale: 2:1
MILLIMETERS
MIN.
INCHES
MIN.
MILLIMETERS
INCHES
MIN.
DIM.
A
MAX.
MAX.
0.209
0.098
0.104
0.063
0.087
0.128
0.035
0.819
DIM.
D1
D2
E
MIN.
15.50
0.70
MAX.
MAX.
0.634
0.051
0.634
0.547
4.70
1.50
2.25
1.30
1.80
3.00
0.38
19.80
5.30
2.50
2.65
1.60
2.20
3.25
0.89
20.80
0.185
0.059
0.089
0.051
0.071
0.118
0.015
0.780
16.10
1.30
0.610
0.028
0.594
0.524
A1
A2
b
15.10
13.30
16.10
13.90
E1
e
b2
b4
c (1)
D
5.45 BSC
0.215 BSC
L
13.70
1.00
2.00
14.70
1.60
3.00
0.539
0.039
0.079
0.579
0.063
0.118
L1
R
ECN: X17-0056-Rev. B, 27-Mar-17
DWG: 5975
Notes
•
•
Dimensioning and tolerancing per ASME Y14.5M-1994
Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outer extremes of the plastic body
Outline conforms to JEDEC® outline to TO-274AA
Dimension measured at tip of lead
•
(1)
Revision: 27-Mar-17
Document Number: 91365
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document
or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
Document Number: 91000
1
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