SIHW21N80AE-GE3 [VISHAY]
Power Field-Effect Transistor,;型号: | SIHW21N80AE-GE3 |
厂家: | VISHAY |
描述: | Power Field-Effect Transistor, |
文件: | 总7页 (文件大小:128K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SiHW21N80AE
www.vishay.com
Vishay Siliconix
E Series Power MOSFET
FEATURES
D
• Low figure-of-merit (FOM) Ron x Qg
• Low effective capacitance (Co(er)
TO-247AD
)
• Reduced switching and conduction losses
• Avalanche energy rated (UIS)
G
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
G
D
S
S
APPLICATIONS
N-Channel MOSFET
• Server and telecom power supplies
• Switch mode power supplies (SMPS)
• Power factor correction power supplies (PFC)
• Lighting
PRODUCT SUMMARY
VDS (V) at TJ max.
850
R
DS(on) typ. () at 25 °C
VGS = 10 V
0.205
- High-intensity discharge (HID)
- Fluorescent ballast lighting
• Industrial
Qg max. (nC)
72
9
Q
gs (nC)
gd (nC)
Q
22
- Welding
Configuration
Single
- Induction heating
- Motor drives
- Battery chargers
- Solar (PV inverters)
ORDERING INFORMATION
Package
TO-247AD
Lead (Pb)-free and halogen-free
SiHW21N80AE-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-source voltage
Gate-source voltage
VDS
800
V
VGS
30
T
C = 25 °C
17.4
Continuous drain current (TJ = 150 °C)
VGS at 10 V
ID
TC = 100 °C
11
A
Pulsed drain current a
IDM
38
Linear derating factor
Single pulse avalanche energy b
1.4
W/°C
mJ
W
EAS
PD
32
Maximum power dissipation
32
-55 to +150
70
Operating junction and storage temperature range
Drain-source voltage slope
Reverse diode dv/dt d
TJ, Tstg
°C
TJ = 125 °C
For 10 s
dv/dt
V/ns
°C
39
Soldering recommendations (peak temperature) c
260
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 1.5 A
c. 1.6 mm from case
d. ISD ID, di/dt = 100 A/μs, starting TJ = 25 °C
S19-0401-Rev. A, 06-May-2019
Document Number: 92269
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHW21N80AE
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
40
UNIT
Maximum junction-to-ambient
Maximum junction-to-case (drain)
RthJA
RthJC
-
-
°C/W
0.7
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-source breakdown voltage
VDS
VGS = 0 V, ID = 250 μA
Reference to 25 °C, ID = 1 mA
VDS = VGS, ID = 250 μA
800
-
-
-
V
V/°C
V
VDS temperature coefficient
VDS/TJ
VGS(th)
-
2.0
-
0.8
Gate-source threshold voltage (N)
-
4.0
100
1
VGS
VGS
=
=
20 V
30 V
-
nA
μA
Gate-source leakage
IGSS
IDSS
-
-
-
VDS = 800 V, VGS = 0 V
VDS = 640 V, VGS = 0 V, TJ = 125 °C
VGS = 10 V ID = 11 A
VDS = 30 V, ID = 3 A
-
1
Zero gate voltage drain current
μA
-
-
10
0.235
-
Drain-source on-state resistance
Forward transconductance a
Dynamic
RDS(on)
gfs
-
0.205
4.0
-
S
Input capacitance
Ciss
Coss
Crss
-
-
-
1388
53
-
-
-
VGS = 0 V,
Output capacitance
V
DS = 100 V,
f = 1 MHz
Reverse transfer capacitance
5
pF
nC
Effective output capacitance, energy
related a
Co(er)
Co(tr)
-
-
43
-
-
VDS = 0 V to 480 V, VGS = 0 V
Effective output capacitance, time
276
related b
Total gate charge
Qg
Qgs
Qgd
td(on)
tr
-
-
48
9
72
-
Gate-source charge
Gate-drain charge
Turn-on delay time
Rise time
VGS = 10 V
ID = 11 A, VDS = 640 V
-
22
21
38
71
76
0.55
-
-
42
76
107
114
1.1
-
VDD = 640 V, ID = 11 A,
GS = 10 V, Rg = 20
ns
V
Turn-off delay time
Fall time
td(off)
tf
-
-
Gate input resistance
Drain-Source Body Diode Characteristics
Rg
f = 1 MHz, open drain
0.2
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous source-drain diode current
Pulsed diode forward current
IS
-
-
-
-
17.4
38
A
G
ISM
S
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
VSD
trr
TJ = 25 °C, IS = 11 A, VGS = 0 V
-
-
-
-
-
400
5
1.2
800
10
-
V
ns
μC
A
TJ = 25 °C, IF = IS = 11 A,
di/dt = 100 A/μs, VR = 25 V
Qrr
IRRM
20
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS
S19-0401-Rev. A, 06-May-2019
Document Number: 92269
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHW21N80AE
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Axis Title
Axis Title
40
30
20
10
0
10000
1000
100
3.0
2.5
2.0
1.5
1.0
0.5
0
10000
1000
100
ID = 3 A
TJ = 25 °C
15 V
14 V
13 V
12 V
11 V
10 V
9 V
7 V
8 V
6 V
VGS = 10 V
5 V
10
10
0
0
0
5
10
15
20
-60 -40 -20
0
20 40 60 80 100 120 140 160
VDS - Drain-to-Source Voltage (V)
TJ - Junction Temperature (°C)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Axis Title
Axis Title
24
18
12
6
10000
1000
100
100 000
10000
1000
100
VGS = 0 V, f = 1 MHz
TJ = 150 °C
15 V
C
C
iss = Cgs + Cgd, Cds shorted
rss = Cgd
14 V
13 V
12 V
11 V
10 V
9 V
10 000
1000
100
10
Coss = Cds + Cgd
Ciss
8 V
7 V
Coss
5 V
Crss
0
10
1
10
5
10
15
20
0
100
200
300
400
500
600
VDS - Drain-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Axis Title
Axis Title
50
40
30
20
10
0
10000
1000
100
100 000
10 000
1000
100
9
8
7
6
5
4
3
2
1
0
TJ = 25 °C
TJ = 150 °C
Coss
Eoss
VDS = 29.4 V
10
10
5
10
15
20
0
100
200
300
400
500
600
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - Coss and Eoss vs. VDS
S19-0401-Rev. A, 06-May-2019
Document Number: 92269
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHW21N80AE
www.vishay.com
Vishay Siliconix
Axis Title
Axis Title
12
9
10000
1000
100
20
15
10
5
10000
1000
100
VDS = 640 V
V
DS = 400 V
DS = 160 V
V
6
3
0
10
0
10
25
50
75
100
125
150
0
15
30
45
60
TC - Case Temperature (°C)
Qg - Total Gate Charge (nC)
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 10 - Maximum Drain Current vs. Case Temperature
Axis Title
Axis Title
100
10
1
10000
1000
100
1025
1000
975
950
925
900
875
850
825
800
10000
1000
100
TJ = 150 °C
TJ = 25 °C
VGS = 0 V
1.0
ID = 1 mA
0.1
10
10
0.2
0.4
0.6
0.8
1.2
-60 -40 -20
0
20 40 60 80 100 120 140 160
VSD - Source-Drain Voltage (V)
TJ - Junction Temperature (°C)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Fig. 11 - Temperature vs. Drain-to-Source Voltage
Axis Title
100
10
1
10000
Operation in this area
limited by RDS(on)
IDM limited
1000
100 µs
a
Limited by RDS(on)
100
TC = 25 °C,
J = 150 °C,
single pulse
T
1 ms
BVDSS limited
100
10 ms
0.1
1000
1
10
VDS - Drain-to-Source Voltage (V)
Fig. 9 - Maximum Safe Operating Area
Note
a. VGS > minimum VGS at which RDS(on) is specified
S19-0401-Rev. A, 06-May-2019
Document Number: 92269
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHW21N80AE
www.vishay.com
Vishay Siliconix
Axis Title
1
10000
1000
100
Duty cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single pulse
0.01
0.0001
10
1
0.001
0.01
0.1
Pulse Time (s)
Fig. 12 - Normalized Transient Thermal Impedance, Junction-to-Case
RD
VDS
VDS
tp
VGS
D.U.T.
VDD
Rg
+
V
-
DD
VDS
10 V
Pulse width ≤ 1 μs
Duty factor ≤ 0.1 %
IAS
Fig. 13 - Switching Time Test Circuit
Fig. 16 - Unclamped Inductive Waveforms
VDS
Qg
10 V
90 %
Qgs
Qgd
10 %
VGS
VG
td(on) tr
td(off) tf
Charge
Fig. 14 - Switching Time Waveforms
Fig. 17 - Basic Gate Charge Waveform
Current regulator
L
Same type as D.U.T.
VDS
Vary tp to obtain
required IAS
50 kΩ
12 V
0.2 μF
D.U.T.
Rg
+
-
0.3 μF
VDD
+
-
VDS
IAS
D.U.T.
10 V
tp
0.01 Ω
VGS
3 mA
Fig. 15 - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
Document Number: 92269
S19-0401-Rev. A, 06-May-2019
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiHW21N80AE
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dv/dt Test Circuit
+
Circuit layout considerations
D.U.T.
•
•
Low stray inductance
Ground plane
3
• Low leakage inductance
current transformer
-
+
2
4
-
+
-
1
Rg
• dv/dt controlled by Rg
+
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
VDD
-
• D.U.T. - device under test
1
Driver gate drive
P.W.
P.W.
Period
Period
D =
V
= 10 V a
GS
D.U.T. ISD waveform
D.U.T. VDS waveform
2
Reverse
recovery
current
Body diode forward
current
di/dt
3
Diode recovery
dv/dt
VDD
Re-applied
voltage
Body diode forward drop
Ripple ≤ 5 %
Inductor current
4
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 19 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?92138.
S19-0401-Rev. A, 06-May-2019
Document Number: 92269
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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© 2019 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 01-Jan-2019
Document Number: 91000
1
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