SIP2210DMP-DE-E3 [VISHAY]
IC VREG DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10, 3 X 3 MM, LEAD FREE, MLP-10, Fixed Positive Multiple Output LDO Regulator;
| 型号： | SIP2210DMP-DE-E3 |
| 厂家： | 
VISHAY |
| 描述： | IC VREG DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10, 3 X 3 MM, LEAD FREE, MLP-10, Fixed Positive Multiple Output LDO Regulator 光电二极管 输出元件 |
| 文件： | 总11页 (文件大小：218K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SiP2210
Vishay Siliconix
Dual Output 150/300-mA Low Dropout Regulator
DESCRIPTION
FEATURES
•
•
•
•
•
•
•
•
•
•
•
2.25 V to 5.5 V input voltage range
Two outputs - 150 mA and 300 mA
Low ground current of 48 µA
Open drain driver output sinking 150 mA
Low dropout voltage of 65 mV at 100 mA
ERR
Current limit
Thermal shutdown
MLP33-10 PowerPAK® package (fixed output)
MLP44-16 PowerPAK® package (adjustable output)
MIC2210 pin-for-pin replacement
SiP2210 is a dual output low dropout regulator capable of
supplying 150 mA from output 1 and 300 mA from output 2.
The SiP2210 has the outputs independently enabled. In
addition to the LDOs, an open drain output has been
included, which is capable of sinking 150 mA. SiP2210 offers
a low dropout, low ground current and extremely low noise
with the addition of a bypass capacitor.
Protection features include ERR, undervoltage lockout,
output current limit, and thermal shutdown.
The fixed output version of SiP2210 is available in a lead
(Pb)-free MLP33-10 PowerPAK package and the adjustable
version is available in a lead (Pb)-free MLP44-16 PowerPAK
package. Both packages ares specified to operate over the
range of - 40 °C to 85 °C.
APPLICATIONS
•
•
•
Cellular phones
Wireless modems
PDAs
TYPICAL APPLICATION CIRCUIT
V
IN
V
OUT1
V
OUT2
EN
1
EN
2
ERR
SiP2210
SW
BP
DRV
GND
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
www.vishay.com
1
SiP2210
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
- 0.3 to 7
1600
Unit
VIN, VEN, to GND
V
MLP33-10 PowerPAKb
MLP44-16 PowerPAKc
Power Dissipation
mW
1880
Storage Temperature
- 55 to 150
50
°C
Thermal Resistance (MLP10 PowerPAK)
°C/W
Notes:
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 20 mW/°C above 70 °C.
c. Derate 23.5 mW/°C above 70 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Limit
Unit
Input Voltage Range
2.25 to 5.5
0 to 5.5
V
Enable Voltage Range
Operating Temperature Range TA
Operating Temperature Range TJ
- 40 to 85
- 40 to 125
°C
SPECIFICATIONS
Test Conditions Unless Specified
VIN = VOUT + 1 Ve, COUT = 1 µF, IOUT = 100 µA,
TA = 25 °C
Limits
Temp.a Min.b Typ.c Max.b
Parameter
Regulators
Symbol
Unit
From Nominal VOUT
Room
Full
- 1
- 2
1
2
Output Voltage Accuracy
%
Output Voltage
Temperature Coefficient
Room
40
ppm/°C
Room
Full
- 0.3
- 0.6
0.2
0.3
0.6
1.0
1.5
190
250
340
420
65
Line Regulatione
VIN = VOUT + 1 V to 5.5 V
%
mV
µA
I
OUT = 100 µA to 150 mA (LDO 1 and 2)
Room
Room
Room
Full
0.2
120
240
48
Load Regulation
I
OUT = 100 µA to 300 mA (LDO 2)
IOUT = 150 mA (LDO 1 and 2)
Dropout Voltagef
VDROP
Room
Full
I
OUT = 300 mA (LDO 2)
IOUT1 = IOUT2 = 0 µA
IOUT1 = IOUT2 = 0 µA
Room
Full
80
IG
Ground Pin Current
I
OUT1 = 150 mA, IOUT2 = 300 mA
EN < 0.4 V
Room
Full
60
V
2.0
Sequence Time Delayd
Output Voltage Noise
tSEQ
Room
70
30
60
40
µs
CBP = 0.01 µF
µVrms
f = 1 kHz, COUT = 1 µF, CBP = 10 nF
f = 20 kHz, COUT = 1 µF, CBP = 10 nF
Room
Room
Ripple Rejection
Inputs
dB
VIL
VIH
IIL
Logic Low
Logic High
VIL < 0.6 V
VIH > 1.8 V
POR = High
Full
0.6
EN, SW Input Voltage
V
Full
1.8
- 1
- 1
Room
Room
Room
Room
0.01
0.01
1.25
1.25
1
1
EN, SW Input Current
µA
IIH
SET Pin Threshold Voltage
SET Pin Current Source
V
TH(set)
V
V
SET = 0 V
0.75
1.75
µA
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Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
SiP2210
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
IN = VOUT + 1 Ve, COUT = 1 µF, IOUT = 100 µA,
TA = 25 °C
Limits
V
Parameter
Symbol
Temp.a Min.b Typ.c Max.b
Unit
Error Flag Output (ERR)
VTHL
VTHH
VOL
Room
Room
Room
Room
90
% of Nominal VOUT2
Threshold
%
96
0.1
1
IL = 250 µA
ERR = High
Output Voltage
Leakage Current
Driver (DRV) Output
Output Voltage
Leakage Current
Protection
0.02
0.01
V
IERR
- 1
- 1
µA
VOL
IL = 150 mA
Full
0.2
0.6
1
V
IDRV = 0 mA, VDRV = 5.5 V, SW = 0 V
Room
0.01
µA
VOUT1 = 0 V
Room
150
300
280
460
700
IIL
Current Limit
mA
°C
VOUT1 = 0 V
Room
Room
Room
450
165
25
Thermal Shutdown Temperature
Thermal Hysteresis
Notes:
a. Room = 25 °C, Full = - 40 °C to 85 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Timing is measured from 90 % of LDO #1’s final value to 90 % of LDO #2’s final value.
e. For higher output of the regulator pair.
f. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2 % below the output voltage measured
with a 1 V differential, provided that VIN does not drop below 2.25 V. When VOUT(nom) is less than 2.25 V, the output will be in regulation when
2.25 V - VOUT(nom) is greater than the dropout voltage specified.
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
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SiP2210
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
V
V
V
IN
OUT1
LDO #1
EN
1
OUT2
LDO #2
EN
2
ERR
COMPARATOR
ERR
DRV
BP
Reference
SW
SW
LOGIC
GND
GND
SW
Fixed Voltage Version
V
V
OUT1
IN
LDO #1
EN
ADJ
1
1
V
OUT2
LDO #2
EN
2
ADJ
2
ERR
COMPARATOR
ERR
DRV
BP
Reference
SW
SW
LOGIC
GND
GND
SW
Adjustable Voltage Version
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Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
SiP2210
Vishay Siliconix
PIN CONFIGURATION AND ORDERING INFORMATION
PowerPAK MLP33-10 with Large Pad
VOLTAGE OPTIONS
Voltage
Adj
1.5
Code (x, z)
A
F
1
V
10
9
V
V
V
V
IN
OUT1
OUT1
10
9
1
2
V
IN
EN
EN
2
3
1
OUT2
OUT2
ERR
EN
EN
BP
1
1.6
W
G
D
Y
H
E
J
8
ERR
2
8
7
6
3
4
5
1.8
2
1.85
1.9
BP
4
5
7
6
DRV
GND
DRV
SW
GND
SW
2.0
2.1
Exposed Pad
Top View
Bottom View
2.5
2.6
K
L
2.7
2.8
M
N
O
P
Q
R
S
T
PowerPAK MLP44-16
2.85
2.9
3.0
3.1
13 14 15 16
3.2
3.3
ERR 12
DRV 11
1
2
3
4
EN
EN
BP
1
3.4
2
3.5
U
V
3.6
ADJ
10
9
2
GND
ADJ
1
SW
ORDERING INFORMATION
Part Number
Temp. Range
Package
Marking
8
7
6
5
PowerPAK
MLP33-10
SiP2210DMP-XZ-E3
10XZ
- 40 °C to 85 °C
PowerPAK
MLP44-16
SiP2210DLP-AA-E3
10AA
Bottom View
X: Output 1 voltage code.
Z: Output 2 voltage code.
PIN DESCRIPTION
Pin Number
Name
Function
MLP33-10 MLP44-16
1
2
15, 16
1
VIN
EN1
Input voltage for the power MOSFETs and their gate drive
Enables LDO #1 output.
6
NC
No Connect
3
4
2
EN2
Enables LDO #2 output.
3
BP
Bypass for noise reduction
Feedback connection for LDO #1
Control for open drain output
Ground
4
ADJ1
SW
5
6
5
7, 8
9
GND
GNDSW
ADJ2
DRV
ERR
VOUT2
VOUT1
Ground for the internal N-channel MOSFET switch
Feedback connection for LDO #2
Open drain output
10
11
12
13
14
7
8
ERROR flag output
9
Output of LDO #2 - 300 mA
Output of LDO #1 - 150 mA
10
The exposed pad on both packages must be connected externally to the GND pin.
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
www.vishay.com
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SiP2210
Vishay Siliconix
TYPICAL CHARACTERISTICS
3.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
2.5
100 µA
2.0
100 µA
1.5
150 mA
300 mA
1.0
0.5
0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Supply Voltage (V)
Supply Voltage (V)
Dropout Characteristics-Output 2
Dropout Characteristics-Output 1
350
300
250
200
150
100
50
150
130
110
90
300 mA Load
150 mA Load
70
50
30
10
0
- 10
- 40 - 20
0
20
Temperature (°C)
Dropout Voltage-Output 2
40
60
80 100 120 140
- 40 - 20
0
20
Temperature (°C)
Dropout Voltage-Output 1
40
60
80 100 120 140
60
50
40
30
20
10
0
60
Output 1 and 2
with 100 µA Load
50
40
30
20
10
0
0
20
40
Output 1 Load Current (mA)
Ground Current vs. Output 1 Current
60
80
100
120
140
0
1
2
3
4
5
6
Supply Voltage (V)
Ground Current vs. Supply Voltage
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Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
SiP2210
Vishay Siliconix
TYPICAL CHARACTERISTICS
60
50
40
30
20
10
0
60
1 mA
100 µA
0 µA
50
40
30
20
10
0
Load On Both Outputs
- 40 - 20
0
20 40 60 80 100 120 140 160
0
50
100
Output 2 Load Current (mA)
Ground Current vs. Output 2 Current
150
200
250
300
Temperature (°C)
Ground Pin Current
2.820
2.815
2.810
2.805
2.800
2.795
2.790
2.785
2.780
3.615
3.610
3.605
3.600
3.595
3.590
3.585
0
25
50
75
100
125
150
0
50
100
150
200
250
300
Output 1 Load Current (mA)
Output 2 Load Current (mA)
Output Voltage vs. Load Current-Output 1
Output Voltage vs. Load Current-Output 2
2.840
2.830
2.820
2.810
2.800
2.790
2.780
2.770
2.760
3.65
3.64
3.63
3.62
3.61
3.60
3.59
3.58
3.57
3.56
3.55
100 µA Load
100 µA Load
- 40 - 20
0
20
Temperature (°C)
Output Voltage 1 vs. Temperature
40
60
80 100 120 140
- 40 - 20
0
20
40
Temperature (°C)
Output Voltage 2 vs. Temperature
60
80 100 120 140
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
www.vishay.com
7
SiP2210
Vishay Siliconix
TYPICAL CHARACTERISTICS
1.5
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Drive Current = 1 mA
1.3
1.1
0.9
0.7
0.5
0.3
0.1
2.25
2.75
3.25
3.75
4.25
4.75
5.25
5.75
2.25
2.75
3.25
Supply Voltage (V)
Switch Threshold vs. Supply Voltage
3.75
4.25
4.75
5.25
Supply Voltage (V)
Enable Voltage Threshold vs. Supply Voltage
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Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
SiP2210
Vishay Siliconix
TYPICAL WAVEFORMS
10
10
µV/sqtHZ
µV/sqtHZ
0.01
0.01
10 Hz
1 MHz
10 Hz
1 MHz
Noise Spectrum Output 2
Noise Spectrum Output 1
150 mA
I
OUT1
100 mA/div
EN
1,2
2 V/div
V
OUT1
50 mV/div
V
OUT2
1 V/div
C
C
C
V
= 1 µF
OUT
= 0.01 µF
= 5 V
IN
= 1 µF
V
C
C
C
V
= 1 µF
= 1 µF
= 0.01 µF
BP
IN
OUT1
1 V/div
IN
OUT
BP
V
OUT2
50 mV/div
= 5 V
IN
100 µs/div
5 µs/div
Load Transient Response LDO1
Enable Sequence
300 mA
I
OUT1
200 mA/div
V
OUT2
50 mV/div
C
C
C
= 1 µF
= 1 µF
= 0.01 µF
IN
OUT
BP
V
= 5 V
IN
V
OUT1
50 mV/div
5 µs/div
Load Transient Response LDO2
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
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SiP2210
Vishay Siliconix
DETAILED OPERATION
The SiP2210 is a low dropout, low quiescent current
monolithic dual linear regulator, with power-on reset and
open drain driver output features. With output voltage range
from 1.25 V to 5 V, the first regulator can source 150 mA and
the second regulator can source 300 mA. The open drain
driver has the capability to drive LED’s for backlighting
applications.
Enable
The EN1 and EN2 pins control the turning on and off of their
respective regulators in the SiP2210. VOUT of both outputs
are guaranteed to be on when the Enable pin voltage is equal
or greater than 1.8 V. VOUT is guaranteed to be off when the
Enable pin voltage equals or is less than 0.6 V. To
automatically turn on VOUT whenever the input is applied, tie
the Enable pin to VIN.
VIN
VIN is the input supply pin for both LDO’s. The bypass
capacitor for this pin is not critical as long as the input supply
has low enough source impedance. For practical circuits, a
1.0 µF or larger ceramic capacitor is recommended. When
the source impedance is not low enough and/or the source is
several inches from the SiP2210, then a larger input bypass
capacitor is needed. When the source impedance, wire and
trace impedance are unknown, it is recommended that an
input bypass capacitor be used of a value that is equal to or
greater than the output capacitor.
ERROR Flag Output (ERR)
The ERR is an open drain output that goes low when VOUT2
is less than 5 % of its nominal value. As with any open drain
output, an external pull up resistor is needed. The ERR pin is
disconnected if not used.
OPEN-Drain Driver (DRV)
The SW pin a logic level input put that controls the DRV pin.
The switch pin is an active high input and should not be left
floating. The drive pin is an open drain output able to sink
150 mA of current.
VOUT1,2 (LDO Outputs)
The VOUT is the output voltage of the regulator. Connect a
bypass capacitor from VOUTx to ground. The output capacitor
can be any value from 1.0 µF to 10.0 µF. A ceramic capacitor
with X5R or X7R dielectric type is recommended for best
output noise, line transient, and load transient performance.
Bypass Capacitor
For low noise application and/or increase in power supply
rejection ration (PSRR) connect a high frequency ceramic
capacitor from BP to ground. A 0.01 µF X5R or X7R ceramic
capacitor is recommended.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73441.
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Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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1
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