SIP32409DNP-T1-GE4 [VISHAY]
Audio/Video Switch;
| 型号： | SIP32409DNP-T1-GE4 |
| 厂家： | 
VISHAY |
| 描述： | Audio/Video Switch 光电二极管 |
| 文件： | 总13页 (文件大小：228K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SiP32408, SiP32409
Vishay Siliconix
1.1 V to 5.5 V, Slew Rate Controlled Load Switch
DESCRIPTION
FEATURES
SiP32408 and SiP32409 are slew rate controlled load
switches designed for 1.1 V to 5.5 V operation.
These devices guarantee low switch on-resistance at 1.2 V
input. They feature a controlled soft-on slew rate of typical
2.5 ms that limits the inrush current for designs of heavy
capacitive load and minimizes the resulting voltage droop at
the power rails.
SiP32408 and SiP32409 feature a low voltage control logic
interface (On/Off interface) that can interface with low voltage
control signals without extra level shifting circuit.
Both SiP32408 and SiP32409 have exceptionally low
shutdown current and provide reverse blocking to prevent
high current flowing into the power source.
•
•
•
•
•
1.1 V to 5.5 V operation voltage range
Flat row RON down to 1.2 V
42 m typical from 1.5 V to 5 V
Slew rate controlled turn-on: 2.5 ms at 3.6 V
Low quiescent current < 1 µA when disabled
10.5 µA typical at VIN = 1.2 V
•
•
Reverse current blocking when switch is off
Output discharge (SiP32409)
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
SiP32409 integrates a output discharge circuit for fast turn
off.
Both SiP32408 and SiP32409 are available in TDFN4
package of 1.2 mm by 1.6 mm.
•
•
•
•
•
•
•
•
PDAs/smart phones
Notebook/netbook computers
Tablet PC
Portable media players
Digital camera
GPS navigation devices
Data storage devices
Optical, industrial, medical, and healthcare devices
TYPICAL APPLICATION CIRCUIT
V
IN
IN
OUT
V
OUT
SiP32408, SiP32409
C
C
IN
OUT
4.7 µF
0.1 µF
EN
GND
EN
GND
GND
Figure 1 - SiP32408, SiP32409 Typical Application Circuit
Document Number: 63717
S13-0971-Rev. F, 06-May-13
For technical questions, contact: powerictechsupport@vishay.com
This document is subject to change without notice.
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
ORDERING INFORMATION
Temperature Range
Package
Marking
Jx
Part Number
SiP32408DNP-T1-GE4
SiP32409DNP-T1-GE4
- 40 °C to 85 °C
TDFN4 1.2 mm x 1.6 mm
Kx
Notes:
x = Lot code
GE4 denotes halogen-free and RoHS compliant
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Unit
Supply Input Voltage (VIN
Enable Input Voltage (VEN
Output Voltage (VOUT
Maximum Continuous Switch Current (Imax.
)
- 0.3 to 6
- 0.3 to 6
- 0.3 to 6
3.5
)
V
)
c
)
Maximum Repetitive Pulsed Current (1 ms, 10 % Duty Cycle)c
6
A
Maximum Non-Repetitive Pulsed Current (100 µs, EN = Active)c
12
ESD Rating (HBM)
7000
V
Junction Temperature (TJ)
- 40 to 150
170
°C
a
°C/W
mW
Thermal Resistance (JA
Power Dissipation (PD)a,b
Notes:
)
735
a. Device mounted with all leads and power pad soldered or welded to PC board, see PCB layout.
b. Derate 5.9 mW/°C above TA = 25 °C, see PCB layout.
c. TA = 25 °C, see PCB layout
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Limit
Unit
V
Input Voltage Range (VIN
)
1.1 to 5.5
- 40 to 125
Operating Junction Temperature Range (TJ)
°C
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This document is subject to change without notice.
Document Number: 63717
S13-0971-Rev. F, 06-May-13
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
SPECIFICATIONS
Limits
- 40 °C to 85 °C
Test Conditions Unless Specified
IN = 5 V, TA = - 40 °C to 85 °C
V
Min.a
Typ.b
Max.a
(Typical values are at TA = 25 °C)
Parameter
Operating Voltagec
Symbol
VIN
Unit
V
1.1
-
5.5
VIN = 1.2 V, EN = active
VIN = 1.8 V, EN = active
VIN = 2.5 V, EN = active
VIN = 3.6 V, EN = active
VIN = 4.3 V, EN = active
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
10.5
17
30
50
90
110
180
1
21
34
Quiescent Current
IQ
54
68
µA
V
IN = 5 V, EN = active
105
IQ(off)
IDS(off)
IRB
Off Supply Current
EN = inactive, OUT = open
EN = inactive, OUT = GND
-
Off Switch Current
-
1
VOUT = 5 V, VIN = 0 V, VEN = inactive
VIN = 1.2 V, IL = 100 mA, TA = 25 °C
Reverse Blocking Current
-
10
52
50
50
50
50
50
-
45
V
IN = 1.8 V, IL = 100 mA, TA = 25 °C
42
VIN = 2.5 V, IL = 100 mA, TA = 25 °C
VIN = 3.6 V, IL = 100 mA, TA = 25 °C
VIN = 4.3 V, IL = 100 mA, TA = 25 °C
VIN = 5 V, IL = 100 mA, TA = 25 °C
42
RDS(on)
TCRDS
VIL
On-Resistance
m
42
42
44
On-Resistance Temp.-Coefficient
EN Input Low Voltagec
3300
ppm/°C
VIN = 1.2 V
-
0.3
0.4d
0.5d
0.6d
0.7d
0.8d
VIN = 1.8 V
-
VIN = 2.5 V
-
VIN = 3.6 V
-
VIN = 4.3 V
-
VIN = 5 V
-
V
0.9d
1.2d
1.4d
1.6d
1.7d
1.8
- 1
VIN = 1.2 V
-
-
VIN = 1.8 V
-
-
VIN = 2.5 V
-
-
EN Input High Voltagec
VIH
VIN = 3.6 V
-
-
-
VIN = 4.3 V
VIN = 5 V
-
-
-
ISINK
RPD
td(on)
t(on)
EN Input Leakage
VEN = 5.5 V
-
1
µA
Output Pulldown Resistance
Output Turn-On Delay Time
Output Turn-On Rise Time
Output Turn-Off Delay Time
EN = inactive, TA = 25 °C, (for SiP32409 only)
-
217
1.8
2.5
-
280
-
-
VIN = 3.6 V, RLOAD = 10 , TA = 25 °C
1.2
-
3.8
0.001
ms
td(off)
Notes:
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. For VIN outside this range consult typical EN threshold curve.
d. Not tested, guarantee by design.
Document Number: 63717
S13-0971-Rev. F, 06-May-13
For technical questions, contact: powerictechsupport@vishay.com
This document is subject to change without notice.
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
PIN CONFIGURATION
OUT
4
3
1
2
IN
GND
EN
GND
Bottom View
Figure 2 - TDFN4 1.2 mm x 1.6 mm Package
PIN DESCRIPTION
Pin Number
Name
IN
Function
This is the input pin of the switch
Ground connection
1
2
3
4
GND
EN
Enable input
OUT
This is the output pin of the switch
BLOCK DIAGRAM
Reverse
Blocking
IN
OUT
Charge
Pump
SiP32409 only
Turn On
Slew Rate Control
Output
Pulldown
Control
Logic
EN
GND
Figure 3 - Functional Block Diagram
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
140
120
100
80
120
100
80
60
40
20
0
VIN = 5 V
VIN = 3.6 V
60
40
VIN = 1.2 V
20
0
1.5
2.5
3.5
3
VIN (V)
1
2
4
4.5
5
5.5
- 40
- 20
0
20
40
60
80
100
Temperature (°C)
Figure 4 - Quiescent Current vs. Input Voltage
Figure 5 - Quiescent Current vs. Temperature
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This document is subject to change without notice.
Document Number: 63717
S13-0971-Rev. F, 06-May-13
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
100
SiP32408
10
SiP32408
VIN = 5 V
1
VIN = 3.6 V
0.1
0.01
0.001
0.0001
VIN = 1.2 V
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
- 40
- 20
0
20
40
60
80
100
VIN (V)
Temperature (°C)
Figure 6 - Off Supply Current vs. Input Voltage
Figure 9 - Off Supply Current vs. Temperature
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
1000
100
10
SiP32409
SiP32409
VIN = 5 V
VIN = 3.6 V
1
0.1
VIN = 1.2 V
0.01
0.001
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
- 40
- 20
0
20
40
60
80
100
VIN (V)
Temperature (°C)
Figure 7 - Off Supply Current vs. Input Voltage
Figure 10 - Off Supply Current vs. Temperature
1000
100
10
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
VIN = 5 V
1
VIN = 3.6 V
0.1
0.01
0.001
VIN = 1.2 V
- 40
- 20
0
20
40
60
80
100
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
Temperature (°C)
VIN (V)
Figure 8 - Off Switch Current vs. Input Voltage
Figure 11 - Off Switch Current vs. Temperature
Document Number: 63717
S13-0971-Rev. F, 06-May-13
For technical questions, contact: powerictechsupport@vishay.com
This document is subject to change without notice.
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
56
54
52
50
48
46
44
42
40
38
55
50
45
40
35
30
IO = 0.1 A
IN = 5 V
V
IO = 2.5 A
IO = 2.0 A
IO = 1.5 A
IO = 1.0 A
IO = 0.1 A
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
- 40
- 20
0
20
40
60
80
100
VIN (V)
Temperature (°C)
Figure 12 - RDS(on) vs. VIN
Figure 14 - RDS(on) vs. Temperature
240
900
800
700
600
500
400
300
200
100
0
SiP32409 only
OUT = VIN = 5 V
SiP32409 only
VOUT = VIN
V
235
230
225
220
215
210
205
200
- 40
- 20
0
20
40
60
80
100
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VIN (V)
Temperature (°C)
Figure 13 - Output Pulldown Resistance vs. Input Voltage
Figure 15 - Output Pulldown Resistance vs. Temperature
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For technical questions, contact: powerictechsupport@vishay.com
This document is subject to change without notice.
Document Number: 63717
S13-0971-Rev. F, 06-May-13
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
TYPICAL CHARACTERISTICS (internally regulated, 25 °C, unless otherwise noted)
0
- 2
2.2
2.0
1.8
1.6
1.4
1.2
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
- 4
- 6
VIN = 0 V
- 8
- 10
- 12
- 40
- 20
0
20
40
60
80
100
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
VOUT (V)
Temperature (°C)
Figure 16 - Reverse Blocking Current vs. Output Voltage
Figure 18 - Turn-On Delay Time vs. Temperature
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
3.25
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
VIN = 5 V
CL = 0.1 μF
RL = 10 Ω
3.00
2.75
2.50
2.25
2.00
1.75
- 40
- 20
0
20
40
60
80
100
- 40
- 20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
Figure 17 - Rise Time vs. Temperature
Figure 19 - Turn-Off Delay Time vs. Temperature
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
VIH
VIL
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
VIN (V)
Figure 20 - EN Threshold Voltage vs. Input Voltage
Document Number: 63717
S13-0971-Rev. F, 06-May-13
For technical questions, contact: powerictechsupport@vishay.com
This document is subject to change without notice.
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
TYPICAL WAVEFORMS
EN
EN
5VOUT
5VOUT
3.6VOUT
3.6VOUT
1.5VOUT
1.5VOUT
IOUT for 5VOUT
IOUT for 5VOUT
I
OUT for 3.6VOUT
I
OUT for 3.6VOUT
OUT for 1.5VOUT
I
OUT for 1.5VOUT
I
2 V/Div, 2 A/Div, 2 ꢀs/Div
Figure 24 - Typical Fall Time
OUT = 0.1 µF, CIN = 4.7 µF, IOUT = 1.5 A
2 V/Div, 2 A/Div, 2 ms/Div
Figure 21 - Typical Turn-on Delay, Rise Time
COUT = 0.1 µF, CIN = 4.7 µF, IOUT = 1.5 A
C
EN
EN
5VOUT
5VOUT
3.6VOUT
3.6VOUT
1.5VOUT
1.5VOUT
I
OUT for 5VOUT
OUT for 3.6VOUT
OUT for 1.5VOUT
I
OUT for 5VOUT
OUT for 3.6VOUT
OUT for 1.5VOUT
I
I
I
I
2 V/Div, 0.25 A/Div, 2 ms/Div
2 V/Div, 0.25 A/Div, 2 ꢀs/Div
Figure 25 - Typical Fall Time
COUT = 0.1 µF, CIN = 4.7 µF, ROUT = 10
Figure 22 - Typical Turn-on Delay, Rise Time
COUT = 0.1 µF, CIN = 4.7 µF, ROUT = 10
EN
EN
5VOUT
5VOUT
3.6VOUT
3.6VOUT
1.5VOUT
1.5VOUT
IOUT for 5VOUT
IOUT for 5VOUT
IOUT for 3.6VOUT
I
OUT for 3.6VOUT
IOUT for 1.5VOUT
I
OUT for 1.5VOUT
2 V/Div, 2 A/Div, 2 ms/Div
Figure 26 - Typical Fall Time
OUT = 200 µF, CIN = 4.7 µF, IOUT = 1.5 A
2 V/Div, 2 A/Div, 2 ms/Div
Figure 23 - Typical Turn-on Delay, Rise Time
OUT = 200 µF, CIN = 4.7 µF, IOUT = 1.5 A
C
C
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Document Number: 63717
S13-0971-Rev. F, 06-May-13
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
EN
EN
5VOUT
5VOUT
3.6VOUT
1.5VOUT
3.6VOUT
1.5VOUT
IOUT for 5VOUT
IOUT for 5VOUT
IOUT for 3.6VOUT
IOUT for 3.6VOUT
IOUT for 1.5VOUT
IOUT for 1.5VOUT
2 V/Div, 0.25 A/Div, 2 ms/Div
Figure 27 - Typical Turn-on Delay, Rise Time
OUT = 200 µF, CIN = 4.7 µF, ROUT = 10
2 V/Div, 0.25 A/Div, 2 ms/Div
Figure 28 - Typical Fall Time
OUT = 200 µF, CIN = 4.7 µF, ROUT = 10
C
C
DETAILED DESCRIPTION
SiP32408 and SiP32409 are advanced slew rate controlled
high side load switches consisted of a n-channel power
switch. When the device is enable the gate of the power
switch is turned on at a controlled rate to avoid excessive in-
rush current. Once fully on the gate to source voltage of the
power switch is biased at a constant level. The design gives
a flat on resistance throughout the operating voltages. When
the device is off, the reverse blocking circuitry prevents
current from flowing back to input if output is raised higher
than input. The reverse blocking mechanism also works in
case of no input applied.
Enable
The EN pin is compatible with both TTL and CMOS logic
voltage levels. Enable pin voltage can be above IN once it is
within the absolute maximum rating range.
For output voltage slew rate control, EN is required to have
at least 50 µs delay after the input voltage get ready to
enable the device.
Protection Against Reverse Voltage Condition
SiP32408 and SiP32409 contain a reverse blocking circuitry
to protect the current from going to the input from the output
in case where the output voltage is higher than the input
voltage when the main switch is off. Reverse blocking works
for input voltage as low as 0 V.
APPLICATION INFORMATION
Input Capacitor
SiP32408 and SiP32409 do not require an input capacitor.
To limit the voltage drop on the input supply caused by
transient inrush currents, an input bypass capacitor is
recommended. A 2.2 µF ceramic capacitor placed as close
to the VIN and GND should be enough. Higher values
capacitor can help to further reduce the voltage drop.
Ceramic capacitors are recommended for their ability to
withstand input current surge from low impedance sources
such as batteries in portable devices.
Thermal Considerations
SiP32408 and SiP32409 are designed to maintain a constant
output load current. Due to physical limitations of the layout
and assembly of the device the maximum switch current is
3.5 A, as stated in the Absolute Maximum Ratings table.
However, another limiting characteristic for the safe
operating load current is the thermal power dissipation of the
package. To obtain the highest power dissipation (and a
thermal resistance of 170 °C/W) the power pad of the device
should be connected to a heat sink on the printed circuit
board. Figure 21 shows a typical PCB layout. All copper
traces and vias for the IN and OUT pins should be sized
adequately to carry the maximum continuous current.
The maximum power dissipation in any application is
dependant on the maximum junction temperature,
TJ(max.) = 125 °C, the junction-to-ambient thermal resistance
for the TDFN4 1.2 mm x 1.6 mm package, J-A = 170 °C/W,
and the ambient temperature, TA, which may be formulaically
expressed as:
Output Capacitor
While these devices works without an output capacitor,
an 0.1 µF or larger capacitor across VOUT and GND is
recommended to accommodate load transient condition. It
also help to prevent parasitic inductance forces VOUT below
GND when switching off. Output capacitor has minimal affect
on device’s turn on slew rate time. There is no requirement
on capacitor type and its ESR.
TJ (max.) - T
125 - T
170
A
A
P (max.)
=
=
θ
J-
A
Document Number: 63717
S13-0971-Rev. F, 06-May-13
For technical questions, contact: powerictechsupport@vishay.com
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SiP32408, SiP32409
Vishay Siliconix
It then follows that, assuming an ambient temperature of
70 °C, the maximum power dissipation will be limited to about
324 mW.
5 A
So long as the load current is below the 3.5 A limit, the
maximum continuous switch current becomes a function of
two things: the package power dissipation and the RDS(on) at
the ambient temperature.
1 ms
180 mA
4.6 ms
As an example let us calculate the worst case maximum load
current at TA = 70 °C. The worst case RDS(on) at 25 °C occurs
at an input voltage of 1.2 V and is equal to 52 m. The
RDS(on) at 70 °C can be extrapolated from this data using the
following formula:
SiP32408 and SiP32409 can safely support 5 A pulse
current repetitively at 25 °C.
Switch Non-Repetitive Pulsed Current
RDS(on) (at 70 °C) = RDS(on) (at 25 °C) x (1 + TC x DT)
SiP32408 and SiP32409 can withstand inrush current of up
to 12 A for 100 µs at 25 °C when heavy capacitive loads are
connected and the part is already enabled.
Where TC is 3300 ppm/°C. Continuing with the calculation
we have
RDS(on) (at 70 °C) = 52 m x (1 + 0.0033 x (70 °C - 25 °C))
= 60 m
Recommended Board Layout
The maximum current limit is then determined by
For the best performance, all traces should be as short as
possible to minimize the inductance and parasitic effects.
The input and output capacitors should be kept as close
as possible to the input and output pins respectively.
Connecting the central exposed pad to GND, using wide
traces for input, output, and GND help reducing the case to
ambient thermal impedance.
P (max.)
I
(max.) <
LOAD
R
(
)
DS ON
which in this case is 2.3 A. Under the stated input voltage
condition, if the 2.3 A current limit is exceeded the internal die
temperature will rise and eventually, possibly damage the
device.
Reverse
Blocking
IN
OUT
Charge
Pump
Control Logic
Input Buffer
Control and Drive
EN
V
OUT > VIN
Detect
Pull Down
Circuit
When VOUT is 0.8 V above the VIN, pull down circuit
will be activated. It connects the EN to GND with a
resistance of around 1 kΩ.
Active EN Pull Down for Reverse Blocking
When an internal circuit detects the condition of VOUT 0.8 V
higher than VIN, it will turn on the pull down circuit connected
to EN, forcing the switching OFF. The pull down value is
about 1 k.
Pulse Current Capability
The device is mounted on the evaluation board shown in the
PCB layout section. It is loaded with pulses of 5 A and 1 ms
for periods of 4.6 ms.
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This document is subject to change without notice.
Document Number: 63717
S13-0971-Rev. F, 06-May-13
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SiP32408, SiP32409
Vishay Siliconix
EVALUATION BOARD LAYOUT
Top
Bottom
Figure 29 - Evaluation board Layout for TDFN4 1.2 mm x 1.6 mm (type: FR4, size: 1" x 1", thickness: 0.062", copper thickness: 2 oz.)
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?63717.
Document Number: 63717
S13-0971-Rev. F, 06-May-13
For technical questions, contact: powerictechsupport@vishay.com
This document is subject to change without notice.
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11
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
www.vishay.com
Vishay Siliconix
TDFN4 1.2 x 1.6 Case Outline
D
D2
b
3
4
3
Pin #1 ID
(Optional)
4
2
1
1
2
e
Index Area
(D/2 x E/2)
Bottom View
Top View
Side View
MILLIMETERS
NOM.
0.55
INCHES
DIM.
A
MIN.
0.50
0.00
MAX.
0.60
MIN.
0.020
0.00
NOM.
0.022
-
MAX.
0.024
0.002
A1
A3
b
-
0.05
0.15 REF.
0.25
0.006
0.010
0.047
0.034
0.020
0.063
0.020
0.010 TYP.
0.012
0.20
1.15
0.81
0.30
1.25
0.91
0.008
0.045
0.032
0.012
0.049
0.036
D
1.20
D2
e
0.86
0.50 BSC
1.60
E
1.55
0.45
1.65
0.55
0.061
0.018
0.065
0.022
E2
K
0.50
0.25 TYP.
0.30
L
0.25
0.35
0.010
0.014
ECN: S11-2099-Rev. B, 07-Nov-11
DWG: 5995
Revision: 07-Nov-11
Document Number: 65734
1
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Vishay
Disclaimer
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conform to JEDEC JS709A standards.
Revision: 02-Oct-12
Document Number: 91000
1
相关型号：
SIP32416DNP-T1-GE4
IC 2.4 A DUAL SWITCHING CONTROLLER, PDSO8, 2 X 2 MM, HALOGEN FREE AND ROHS COMPLIANT, TDFN-8, Switching Regulator or Controller
VISHAY
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