SQ1431EH-T1_GE3 [VISHAY]

Small Signal Field-Effect Transistor;
SQ1431EH-T1_GE3
型号: SQ1431EH-T1_GE3
厂家: VISHAY    VISHAY
描述:

Small Signal Field-Effect Transistor

文件: 总12页 (文件大小:253K)
中文:  中文翻译
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SQ1912EH  
Vishay Siliconix  
www.vishay.com  
Automotive Dual N-Channel 20 V (D-S) 175 °C MOSFET  
FEATURES  
• TrenchFET® power MOSFET  
SOT-363  
SC-70 Dual (6 leads)  
S2  
4
• AEC-Q101 qualified  
G2  
5
• 100 % Rg tested  
D1  
6
• Material categorization:  
for definitions of compliance please see  
www.vishay.com/doc?99912  
3
D2  
2
G1  
1
D
D
2
S1  
1
Top View  
Marking Code: 9H  
PRODUCT SUMMARY  
VDS (V)  
G
G
2
1
20  
R
R
R
DS(on) () at VGS = 4.5 V  
DS(on) () at VGS = 2.5 V  
DS(on) () at VGS = 1.8 V  
0.280  
0.360  
0.450  
0.8  
S
S
2
1
ID (A)  
Configuration  
Package  
Dual  
SC-70  
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
LIMIT  
20  
UNIT  
Drain-source voltage  
Gate-source voltage  
VDS  
V
VGS  
8
TC = 25 °C  
0.8  
0.8  
0.8  
3
Continuous drain current a  
ID  
T
C = 125 °C  
Continuous source current (diode conduction) a  
Pulsed drain current b  
IS  
A
IDM  
IAS  
EAS  
Single pulse avalanche current  
Single pulse avalanche energy  
3.8  
7.2  
1.5  
0.5  
L = 0.1 mH  
mJ  
W
TC = 25 °C  
TC = 125 °C  
Maximum power dissipation b  
PD  
Operating junction and storage temperature range  
TJ, Tstg  
-55 to +175  
°C  
THERMAL RESISTANCE RATINGS  
PARAMETER  
SYMBOL  
RthJA  
LIMIT  
220  
UNIT  
Junction-to-ambient  
PCB mount c  
°C/W  
Junction-to-foot (drain)  
RthJF  
100  
Notes  
a. Package limited  
b. Pulse test; pulse width 300 μs, duty cycle 2 %  
c. When mounted on 1" square PCB (FR4 material)  
S17-0425 Rev. B, 27-Mar-17  
Document Number: 67394  
1
For technical questions, contact: automostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
SQ1912EH  
Vishay Siliconix  
www.vishay.com  
SPECIFICATIONS (TC = 25 °C, unless otherwise noted)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN.  
TYP.  
MAX. UNIT  
Static  
Drain-source breakdown voltage  
Gate-source threshold voltage  
Gate-source leakage  
VDS  
VGS(th)  
IGSS  
VGS = 0, ID = 250 μA  
20  
-
-
V
VDS = VGS, ID = 250 μA  
0.45  
0.6  
1.5  
VDS = 0 V, VGS  
=
8 V  
-
-
-
100  
1
nA  
μA  
A
VGS = 0 V  
VDS = 20 V  
VDS = 20 V, TJ = 125 °C  
VDS = 20 V, TJ = 175 °C  
VDS 5 V  
-
Zero gate voltage drain current  
On-state drain current a  
IDSS  
V
GS = 0 V  
GS = 0 V  
-
-
50  
V
-
-
-
150  
-
ID(on)  
VGS = 4.5 V  
VGS = 4.5 V  
1.5  
-
ID = 1.2 A  
0.200  
-
0.280  
0.423  
0.510  
0.360  
0.450  
-
V
V
V
V
GS = 4.5 V  
GS = 4.5 V  
GS = 2.5 V  
GS = 1.8 V  
ID = 1.2 A, TJ = 125 °C  
ID = 1.2 A, TJ = 175°C  
ID = 1 A  
-
Drain-source on-state resistance a  
RDS(on)  
-
-
S
-
0.261  
0.320  
2.6  
ID = 0.2 A  
-
Forward transconductance b  
Dynamic b  
gfs  
VDS = 10 V, ID = 0.5 A  
-
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Total gate charge c  
Gate-source charge c  
Gate-drain charge c  
Gate resistance d  
Turn-on delay time c  
Rise time c  
Ciss  
Coss  
Crss  
Qg  
-
-
49  
22  
75  
32  
12  
1.15  
-
V
GS = 0 V  
VDS = 10 V, f = 1 MHz  
pF  
-
8
-
0.76  
0.13  
0.33  
11.1  
3
Qgs  
Qgd  
Rg  
VGS = 4.5 V  
VDS = 10 V, ID = 1.2 A  
f = 1 MHz  
-
nC  
-
-
5.5  
-
22.2  
5
td(on)  
tr  
td(off)  
tf  
-
21  
31  
29  
25  
VDD = 10 V, RL = 20   
ID 0.5 A, VGEN = 4.5 V, Rg = 1   
ns  
Turn-off delay time c  
Fall time c  
-
19  
-
17  
Source-Drain Diode Ratings and Characteristics b  
Pulsed current a  
ISM  
-
-
-
3
A
V
Forward voltage  
VSD  
IF = 0.5 A, VGS = 0  
0.8  
1.2  
Notes  
a. Pulse test; pulse width 300 μs, duty cycle 2 %  
b. Guaranteed by design, not subject to production testing  
c. Independent of operating temperature  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation  
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect device reliability.  
S17-0425 Rev. B, 27-Mar-17  
Document Number: 67394  
2
For technical questions, contact: automostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
SQ1912EH  
Vishay Siliconix  
www.vishay.com  
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
VGS = 5 V thru 1.5 V  
TC = 25 °C  
VGS = 1 V  
TC = 125 °C  
VGS = 0.5 V  
TC = - 55 °C  
1.5  
0.0  
0.0  
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.0  
20  
0.0  
0.5  
1.0  
2.0  
2.5  
2.0  
0.8  
VGS - Gate-to-Source Voltage (V)  
VDS - Drain-to-Source Voltage (V)  
Output Characteristics  
Transfer Characteristics  
5
4
3
2
1
0
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
TC = - 55 °C  
TC = 25 °C  
VGS = 1.8 V  
VGS = 2.5 V  
TC = 125 °C  
VGS = 4.5 V  
0.2  
0.4  
0.6  
0.8  
0.0  
0.4  
0.8  
1.2  
1.6  
ID - Drain Current (A)  
ID - Drain Current (A)  
Transconductance  
On-Resistance vs. Drain Current  
5
4
3
2
1
0
80  
60  
40  
20  
0
ID = 1.2 A  
VDS = 10 V  
Ciss  
Coss  
Crss  
0.0  
0.2  
0.4  
0.6  
5
10  
15  
VDS - Drain-to-Source Voltage (V)  
Qg - Total Gate Charge (nC)  
Capacitance  
Gate Charge  
S17-0425 Rev. B, 27-Mar-17  
Document Number: 67394  
3
For technical questions, contact: automostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
SQ1912EH  
Vishay Siliconix  
www.vishay.com  
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)  
2.0  
1.7  
1.4  
1.1  
0.8  
0.5  
10  
ID = 1.2 A  
1
VGS = 2.5 V  
TJ = 150 °C  
0.1  
VGS = 4.5 V  
TJ = 25 °C  
0.01  
0.001  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
- 50 - 25  
0
25  
50  
75 100 125 150 175  
VSD - Source-to-Drain Voltage (V)  
TJ - Junction Temperature (°C)  
On-Resistance vs. Junction Temperature  
Source Drain Diode Forward Voltage  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
0.5  
0.3  
0.1  
ID = 5 mA  
- 0.1  
- 0.3  
- 0.5  
TJ = 150 °C  
ID = 250 μA  
TJ = 25 °C  
- 50 - 25  
0
25  
50  
75 100 125 150 175  
0
1
2
3
4
5
TJ - Temperature (°C)  
VGS - Gate-to-Source Voltage (V)  
On-Resistance vs. Gate-to-Source Voltage  
Threshold Voltage  
100  
10  
26  
25  
24  
23  
22  
21  
20  
ID = 10 mA  
IDM Limited  
Limited by RDS(on)  
*
1
10 ms  
100 ms  
1 s, 10 s, DC  
0.1  
0.01  
BVDSS Limited  
TC = 25 °C  
Single Pulse  
0.01  
0.1  
1
10  
100  
- 50 - 25  
0
25  
50  
75 100 125 150 175  
VDS - Drain-to-Source Voltage (V)  
* VGS > minimum VGS at which RDS(on) is specified  
TJ - Junction Temperature (°C)  
Drain Source Breakdown vs. Junction Temperature  
Safe Operating Area  
S17-0425 Rev. B, 27-Mar-17  
Document Number: 67394  
4
For technical questions, contact: automostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
SQ1912EH  
Vishay Siliconix  
www.vishay.com  
THERMAL RATINGS (TA = 25 °C, unless otherwise noted)  
2
1
Duty Cycle = 0.5  
0.2  
0.1  
Notes:  
P
DM  
0.1  
0.05  
t
1
t
2
t
1
1. Duty Cycle, D =  
t
2
0.02  
2. Per Unit Base = R  
= 220 °C/W  
thJA  
(t)  
3. T - T = P  
JM  
Z
A
DM thJA  
Single Pulse  
4. Surface Mounted  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
1
10  
100  
600  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Ambient  
2
1
Duty Cycle = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
Single Pulse  
0.01  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
1
10  
Square Wave Pulse Duration (s)  
Normalized Thermal Transient Impedance, Junction-to-Foot  
Note  
The characteristics shown in the two graphs  
- Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C)  
- Normalized Transient Thermal Impedance Junction-to-Foot (25 °C)  
are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single  
pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part  
mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities  
can widely vary depending on actual application parameters and operating conditions.  
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon  
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  
reliability data, see www.vishay.com/ppg?67394.  
S17-0425 Rev. B, 27-Mar-17  
Document Number: 67394  
5
For technical questions, contact: automostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Ordering Information  
www.vishay.com  
Vishay Siliconix  
SC-70  
Ordering codes for the SQ rugged series power MOSFETs in the SC-70 package:  
DATASHEET PART NUMBER  
SQ1421EDH  
SQ1431EH  
OLD ORDERING CODE a  
NEW ORDERING CODE  
SQ1421EDH-T1_GE3  
SQ1431EH-T1_GE3  
SQ1440EH-T1_GE3  
SQ1470AEH-T1_GE3  
SQ1539EH-T1_GE3  
SQ1563AEH-T1_GE3  
SQ1902AEL-T1_GE3  
SQ1912AEEH-T1_GE3  
SQ1912EH-T1_GE3  
-
SQ1431EH-T1-GE3  
SQ1440EH  
-
-
-
-
-
-
-
SQ1470AEH  
SQ1539EH  
SQ1563AEH  
SQ1902AEL  
SQ1912AEEH  
SQ1912EH  
Note  
a. Old ordering code is obsolete and no longer valid for new orders  
Revision: 01-Jul-16  
Document Number: 65839  
1
For technical questions, contact: automostechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Package Information  
Vishay Siliconix  
SCĆ70: 6ĆLEADS  
MILLIMETERS  
INCHES  
Dim Min  
Nom Max Min Nom Max  
6
1
5
2
4
3
0.90  
1.10  
0.10  
1.00  
0.30  
0.25  
2.20  
2.40  
1.35  
0.035  
0.043  
0.004  
0.039  
0.012  
0.010  
0.087  
0.094  
0.053  
A
E
E
1
A1  
0.80  
0.031  
0.006  
0.004  
0.071  
0.071  
0.045  
A2  
0.15  
b
-B-  
0.10  
c
e
b
1.80  
2.00  
2.10  
1.25  
0.65BSC  
1.30  
0.20  
7_Nom  
0.079  
0.083  
0.049  
0.026BSC  
0.051  
0.008  
7_Nom  
D
e
1
1.80  
E
-A-  
D
1.15  
E1  
c
e
1.20  
1.40  
0.30  
0.047  
0.004  
0.055  
0.012  
A
e1  
A
2
1
0.10  
L
L
A
ECN: S-03946—Rev. B, 09-Jul-01  
DWG: 5550  
Document Number: 71154  
06-Jul-01  
www.vishay.com  
1
Application Note 826  
Vishay Siliconix  
RECOMMENDED MINIMUM PADS FOR SC-70: 6-Lead  
0.067  
(1.702)  
0.016  
0.026  
0.010  
(0.406)  
(0.648)  
(0.241)  
Recommended Minimum Pads  
Dimensions in Inches/(mm)  
Return to Index  
www.vishay.com  
18  
Document Number: 72602  
Revision: 21-Jan-08  
VISHAY SILICONIX  
www.vishay.com  
Power MOSFETs  
Application Note AN917  
Dual-Channel LITTLE FOOT® 6-Pin SC-70 MOSFET Copper Leadframe Version  
Recommended Pad Pattern and Thermal Performance 175 °C Rated Part  
INTRODUCTION  
87 (mil)  
The new dual 6-pin SC-70 package with a copper leadframe  
enables improved on-resistance values and enhanced  
26 (mil)  
thermal performance as compared to the existing 3-pin and  
6-pin packages with Alloy 42 leadframes. These devices are  
intended for small to medium load applications where a  
6
5
4
miniaturized package is required. Devices in this package  
come in a range of on-resistance values, in n-channel and  
p-channel versions. This technical note discusses pin-outs,  
package outlines, pad patterns, evaluation board layout,  
and thermal performance for the dual-channel version.  
96 (mil)  
71 (mil)  
48 (mil)  
61 (mil)  
23 (mil)  
PIN-OUT  
1
2
3
Figure  
1 shows the pin-out description and pin 1  
identification for the dual-channel SC-70 device in the 6-pin  
configuration. Both n-and p-channel devices are available in  
this package – the drawing example below illustrates the  
p-channel device.  
0.0 (mil)  
8 (mil)  
26 (mil)  
SOT-363  
SC-70 (6-LEADS)  
16 (mil)  
Fig. 2 SC-70 (6 leads) Dual  
S
G
D
1
2
3
6
5
D
1
1
1
2
EVALUATION BOARD FOR THE DUAL-CHANNEL  
SC70-6  
G
2
2
The 6-pin SC-70 evaluation board (EVB) shown in figure 3  
measures 0.6 in. by 0.5 in. The copper pad traces are the  
same as described in the previous section, Basic Pad  
Patterns. The board allows for examination from the outer  
pins to the 6-pin DIP connections, permitting test sockets to  
be used in evaluation testing.  
4
S
Top View  
Fig. 1  
For package dimensions see outline drawing SC-70  
(6-Leads) (www.vishay.com/doc?71154)  
The thermal performance of the dual 6-pin SC-70 has been  
measured on the EVB, comparing both the copper and Alloy  
42 leadframes. This test was then repeated using the  
1-inch2 PCB with dual-side copper coating.  
BASIC PAD PATTERNS  
See Application Note 826, Recommended Minimum Pad  
Patterns With Outline Drawing Access for Vishay Siliconix  
MOSFETs, (www.vishay.com/doc?72286) for the SC-70  
6-pin basic pad layout and dimensions. This pad pattern is  
sufficient for the low-power applications for which this  
package is intended. Increasing the drain pad pattern  
(figure 2) yields a reduction in thermal resistance and is a  
preferred footprint.  
A helpful way of displaying the thermal performance of the  
6-pin SC-70 dual copper leadframe is to compare it to the  
traditional Alloy 42 version.  
Revision: 15-Apr-13  
Document Number: 75130  
1
For technical questions, contact: powermosfettechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Application Note AN917  
www.vishay.com  
Vishay Siliconix  
Dual-Channel LITTLE FOOT® 6-Pin SC-70 MOSFET Copper Leadframe Version  
Recommended Pad Pattern and Thermal Performance 175 °C Rated Part  
Front of Board SC70-6  
Back of Board SC70-6  
S1  
D1  
G2  
S2  
G1  
D2  
vishay.com  
SC70−6 DUAL  
Fig. 3  
THERMAL PERFORMANCE  
COOPER LEADFRAME  
Junction-to-Foot Thermal Resistance  
(the Package Performance)  
ROOM AMBIENT 25 °C  
ELEVATED AMBIENT 60 °C  
TJ(max.) - TA  
TJ(max.) - TA  
Thermal performance for the dual SC-70 6-pin package is  
measured as junction-to-foot thermal resistance, in which  
the “foot” is the drain lead of the device as it connects with  
the body. The junction-to-foot thermal resistance for this  
device is typically 80 °C/W, with a maximum thermal  
resistance of approximately 100 °C/W. This data compares  
favorably with another compact, dual-channel package  
- the dual TSOP-6 - which features a typical thermal  
resistance of 75 °C/W and a maximum of 90 °C/W.  
PD  
PD  
R
R
JA  
JA  
175 °C - 25 °C  
PD  
175 °C - 60 °C  
224 °C/W  
PD  
PD  
224 °C/W  
513 mW  
PD  
669 mW  
Although they are intended for low-power applications,  
devices in the 6-pin SC-70 dual-channel configuration will  
handle power dissipation in excess of 0.5 W.  
Power Dissipation for 175 °C Rated Part  
The typical RJA for the dual-channel 6-pin SC-70 with a  
copper leadframe is 224 °C/W steady-state, compared to  
413 °C/W for the Alloy 42 version. All figures are based on  
the 1-inch2 FR4 test board. The following example shows  
how the thermal resistance impacts power dissipation  
for the dual 6-pin SC-70 package at varying ambient  
temperatures.  
TESTING  
To further aid the comparison of copper and Alloy 42  
leadframes, Figures 4 and 5 illustrate the dual-channel 6-pin  
SC-70 thermal performance on two different board sizes  
and pad patterns. The measured steady-state values of  
RJA for the dual 6-pin SC-70 with varying leadframes are as  
follows:  
Alloy 42 Leadframe  
ALLOY 42 LEADFRAME  
LITTLE FOOT 6-PIN SC-70  
ALLOY 42  
COPPER  
ROOM AMBIENT 25 °C  
ELEVATED AMBIENT 60 °C  
1) Minimum recommended pad  
pattern on the EVB board (see fig. 3).  
2) Industry standard 1-inch2 PCB  
with maximum copper both sides.  
518 °C/W  
344 °C/W  
TJ(max.) - TA  
TJ(max.) - TA  
PD  
PD  
R
R
JA  
JA  
413 °C/W  
224 °C/W  
175 °C - 25 °C  
PD  
175 °C - 60 °C  
PD  
413 °C/W  
413 °C/W  
The results indicate that designers can reduce thermal  
resistance (JA) by 34 % simply by using the copper  
leadframe device as opposed to the Alloy 42 version. In this  
example, a 174 °C/W reduction was achieved without an  
increase in board area. If an increase in board size is  
feasible, a further 120 °C/W reduction can be obtained by  
utilizing a 1-inch2. PCB area.  
PD  
278 mW  
PD  
363 mW  
Revision: 15-Apr-13  
Document Number: 75130  
2
For technical questions, contact: powermosfettechsupport@vishay.com  
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT  
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
Application Note AN917  
www.vishay.com  
Vishay Siliconix  
Dual-Channel LITTLE FOOT® 6-Pin SC-70 MOSFET Copper Leadframe Version  
Recommended Pad Pattern and Thermal Performance 175 °C Rated Part  
The dual copper leadframe versions have the following  
suffix:  
Dual:  
Sx19xxEDH or Sx19xxEEH  
Sx15xxEDH or Sx15xxEEH  
Compl.:  
500  
400  
300  
500  
400  
300  
Alloy  
42  
Alloy 42  
200  
100  
200  
100  
Copper  
Copper  
10  
0
0
-5  
-4  
-3  
-2  
-1  
-5  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
10  
1
10  
100  
1000  
10  
10  
10  
10  
10  
1
100  
1000  
Time (s)  
Time (s)  
Fig. 4 Dual SC70-6 Thermal Performance on EVB  
Fig. 5 Dual SC70-6 Comparison on 1-inch2 PCB  
Revision: 15-Apr-13  
Document Number: 75130  
3
For technical questions, contact: powermosfettechsupport@vishay.com  
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000  
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ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE  
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Revision: 13-Jun-16  
Document Number: 91000  
1

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