ST110S16P1VPBF [VISHAY]
Phase Control Thyristors (Stud Version), 110 A; 相位控制晶闸管(梭哈版) , 110一型号: | ST110S16P1VPBF |
厂家: | VISHAY |
描述: | Phase Control Thyristors (Stud Version), 110 A |
文件: | 总10页 (文件大小:166K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ST110SPbF Series
Vishay Semiconductors
Phase Control Thyristors (Stud Version), 110 A
FEATURES
• Center gate
• International standard case TO-209AC (TO-94)
• Compression bonded encapsulation for heavy
duty operations such as severe thermal cycling
• Hermetic glass-metal case with ceramic insulator
(Glass-metal seal over 1200 V)
• Compliant to RoHS directive 2002/95/EC
• Designed and qualified for industrial level
TO-209AC (TO-94)
TYPICAL APPLICATIONS
• DC motor controls
PRODUCT SUMMARY
IT(AV)
110 A
• Controlled DC power supplies
• AC controllers
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
TEST CONDITIONS
VALUES
110
UNITS
A
IT(AV)
TC
90
°C
IT(RMS)
175
50 Hz
60 Hz
50 Hz
60 Hz
2700
A
ITSM
2830
36.4
I2t
kA2s
33.2
V
DRM/VRRM
400 to 1600
100
V
tq
Typical
μs
°C
TJ
- 40 to 125
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
DRM/VRRM, MAXIMUM
REPETITIVE PEAK
VRSM, MAXIMUM
I
DRM/IRRM MAXIMUM
VOLTAGE
CODE
NON-REPETITIVE
PEAK VOLTAGE
V
TYPE NUMBER
AT TJ = TJ MAXIMUM
mA
AND OFF-STATE VOLTAGE
V
04
08
12
16
400
800
500
900
ST110S
20
1200
1600
1300
1700
Document Number: 94393
Revision: 17-Aug-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
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1
ST110SPbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 110 A
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
IT(AV)
IT(RMS)
TEST CONDITIONS
180° conduction, half sine wave
DC at 85 °C case temperature
VALUES
110
UNITS
A
Maximum average on-state current
at case temperature
90
°C
Maximum RMS on-state current
175
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
2700
2830
2270
2380
36.4
33.2
25.8
23.5
364
No voltage
reapplied
A
Maximum peak, one-cycle
non-repetitive surge current
ITSM
100 % VRRM
reapplied
Sinusoidal half wave,
initial TJ = TJ maximum
No voltage
reapplied
Maximum I2t for fusing
I2t
kA2s
100 % VRRM
reapplied
Maximum I2t for fusing
I2t
VT(TO)1
VT(TO)2
rt1
t = 0.1 to 10 ms, no voltage reapplied
kA2s
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
(16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum
(I > x IT(AV)), TJ = TJ maximum
0.90
0.92
1.79
1.81
1.52
600
V
(16.7 % x x IT(AV) < I < x IT(AV)), TJ = TJ maximum
(I > x IT(AV)), TJ = TJ maximum
m
V
rt2
VTM
IH
Ipk = 350 A, TJ = TJ maximum, tp = 10 ms sine pulse
Maximum holding current
TJ = 25 °C, anode supply 12 V resistive load
mA
Typical latching current
IL
1000
SWITCHING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum non-repetitive rate of
rise of turned-on current
Gate drive 20 V, 20 , tr 1 μs
TJ = TJ maximum, anode voltage 80 % VDRM
dI/dt
500
A/μs
Gate current 1 A, dIg/dt = 1 A/μs
Vd = 0.67 % VDRM, TJ = 25 °C
Typical delay time
td
tq
2.0
μs
ITM = 100 A, TJ = TJ maximum, dI/dt = 10 A/μs,
Typical turn-off time
100
V
R = 50 V, dV/dt = 20 V/μs, gate 0 V 100 , tp = 500 μs
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum critical rate of rise of
off-state voltage
dV/dt
TJ = TJ maximum linear to 80 % rated VDRM
TJ = TJ maximum, rated VDRM/VRRM applied
500
V/μs
Maximum peak reverse and
off-state leakage current
IRRM
,
20
mA
IDRM
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Document Number: 94393
Revision: 17-Aug-10
ST110SPbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 110 A
TRIGGERING
VALUES
UNITS
PARAMETER
SYMBOL
TEST CONDITIONS
TYP.
MAX.
Maximum peak gate power
PGM
PG(AV)
IGM
TJ = TJ maximum, tp 5 ms
5
W
A
Maximum average gate power
TJ = TJ maximum, f = 50 Hz, d% = 50
1
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
2.0
20
5.0
+ VGM
- VGM
TJ = TJ maximum, tp 5 ms
V
TJ = - 40 °C
TJ = 25 °C
180
90
-
150
-
DC gate current required to trigger
DC gate voltage required to trigger
IGT
mA
V
Maximum requiredgatetrigger/
TJ = 125 °C
TJ = - 40 °C
TJ = 25 °C
TJ = 125 °C
40
current/voltage are the lowest
value which will trigger all units
6 V anode to cathode applied
2.9
1.8
1.2
-
VGT
3.0
-
Maximum gate current/voltage
not to trigger is the maximum
TJ = TJ maximum value which will not trigger any
unit with rated VDRM anode to
cathode applied
DC gate current not to trigger
DC gate voltage not to trigger
IGD
10
mA
V
VGD
0.25
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum operating junction
temperature range
TJ
- 40 to 125
- 40 to 150
0.195
°C
Maximum storage temperature range
TStg
Maximum thermal resistance,
junction to case
RthJC
DC operation
K/W
Maximum thermal resistance,
case to heatsink
RthCS
Mounting surface, smooth, flat and greased
0.08
Non-lubricated threads
Lubricated threads
15.5 (137)
14 (120)
130
Nm
(lbf · in)
Mounting torque, 10 %
Approximate weight
Case style
g
See dimensions - link at the end of datasheet
TO-209AC (TO-94)
Document Number: 94393
Revision: 17-Aug-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
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3
ST110SPbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 110 A
RthJC CONDUCTION
CONDUCTION ANGLE
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
TEST CONDITIONS
UNITS
180°
120°
90°
0.035
0.041
0.052
0.076
0.126
0.025
0.042
0.056
0.079
0.127
TJ = TJ maximum
K/W
60°
30°
Note
The table above shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC
•
130
120
110
100
90
130
120
110
100
90
ST110S Series
(DC) = 1.95 K/W
ST110S Series
(DC) = 0.195 K/W
R
R
thJC
thJC
Conduction Period
Conduction Angle
30°
60°
30°
90°
120°
60°
60
90°
120°
180°
DC
180°
80
80
0
20
40
80
100 120
0
20 40 60 80 100 120 140 160 180
Average On-state Current (A)
Average On-state Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 2 - Current Ratings Characteristics
160
180°
0
.
3
120°
K
140
/
W
90°
0
.
5
60°
K
/
120
W
30°
100
0
RMS Limit
.
8
K
/
W
1
80
60
40
20
0
K
/
W
Conduction Angle
ST110S Series
T
= 125°C
J
0
20
40
60
80
100
1
2
0
50
75
100
125
Average On-state Current (A)
Maximum Allowable Ambient Temperature (°C)
Fig. 3 - On-State Power Loss Characteristics
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Document Number: 94393
Revision: 17-Aug-10
ST110SPbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 110 A
220
200
180
160
140
120
100
80
R
DC
180°
120°
90°
t
h
S
A
=
0
.
1
K/
W
-
0
60°
D
.
4
e
K
/
l
t
a
30°
W
R
RMS Limit
Conduction Period
ST110S Series
60
40
T
= 125°C
20
J
0
0
20 40 60 80 100 120 140 160 1
8
0
50
75
100
125
Average On-state Current (A)
Maximum Allowable Ambient Temperature (°C)
Fig. 4 - On-State Power Loss Characteristics
2800
2600
2400
2200
2000
1800
1600
1400
1200
1000
2400
2200
2000
1800
1600
1400
1200
1000
Maximum Non Repetitive Surge Current
Versus Pulse Train Duration. Control
Of Conduction May Not Be Maintained.
At Any Rated Load Condition And With
Rated V
RRM
Applied Following Surge.
Initial T = 125°C
J
Initial T = 125°C
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100 s
J
No Voltage Reapplied
Rated V
Reapplied
RRM
ST110S Series
ST110S Series
0.1
1
10
100
0.01
1
10
Number Of Equal Amplitude Half Cycle Current Pulses (N)
Pulse Train Duration (s)
Fig. 5 - Maximum Non-Repetitive Surge Current
Fig. 6 - Maximum Non-Repetitive Surge Current
10000
1000
100
Tj = 25˚C
Tj = 125˚C
ST110S Series
10
0.5
1.5
2.5
3.5
4.5
Instantaneous On-state Voltage (V)
Fig. 7 - On-State Voltage Drop Characteristics
Document Number: 94393
Revision: 17-Aug-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
5
ST110SPbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 110 A
1
Steady State Value
= 0.195 K/W
R
thJC
(DC Operation)
0.1
0.01
ST110S Series
0.001
0.001
0.01
0.1
1
10
Square Wave Pulse Duration (s)
Fig. 8 - Thermal Impedance ZthJC Characteristic
100
10
1
Rectangular gate pulse
(1) PGM = 10W, tp = 4ms
(2) PGM = 20W, tp = 2ms
(3) PGM = 40W, tp = 1ms
a) Recommended load line for
rated di/dt : 20V, 10ohms; tr<=1 µs
b) Recommended load line for
<=30% rated di/dt : 10V, 10ohms
tr<=1 µs
(4) PGM = 60W, tp = 0.66ms
(a)
(b)
(3)
(1) (2)
(4)
VGD
IGD
Frequency Limited by PG(AV)
10
Device: ST110S Series
0.1
0.1
0.001
0.01
1
100
Instantaneous Gate Current (A)
Fig. 9 - Gate Characteristics
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Document Number: 94393
Revision: 17-Aug-10
ST110SPbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 110 A
ORDERING INFORMATION TABLE
Device code
ST
11
0
S
16
P
0
V
L
PbF
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
-
-
-
Thyristor
Essential part marking
0 = Converter grade
-
-
-
-
S = Compression bonding stud
Voltage code x 100 = VRRM (see Voltage Ratings table)
P = Stud base 20UNF threads
0 = Eyelet terminals (gate and auxiliary cathode leads)
1 = Fast-on terminals (gate and auxiliary cathode leads)
2 = Flag terminals (for cathode and gate terminals)
8
9
-
V = Glass-metal seal (only up to 1200 V)
None = Ceramic housing (over 1200 V)
Critical dV/dt:
-
-
None = 500 V/µs (standard value)
L = 1000 V/µs (special selection)
10
Lead (Pb)-free
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95078
Document Number: 94393
Revision: 17-Aug-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
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Outline Dimensions
Vishay Semiconductors
TO-209AC (TO-94) for ST110S Series
DIMENSIONS in millimeters (inches)
Glass metal seal
2.6 (0.10) MAX.
16.5 (0.65) MAX.
Ø 8.5 (0.33)
) MIN.
Ø 4.3 (0.17)
9.5 (0.37
Flexible lead
20 (0.79) MIN.
C.S. 16 mm2
(0.025 s.i.)
C.S. 0.4 mm2
(0.0006 s.i.)
Red silicon rubber
Red cathode
157 (6.18)
170 (6.69)
215 10
(8.46 0.39)
White gate
Fast-on terminals
Red shrink
70 (2.75)
MIN.
AMP. 280000-1
REF-250
White shrink
29 (1.14)
MAX.
Ø 23.5 (0.93) MAX.
12.5 (0.49) MAX.
21 (0.83)
MAX.
SW 27
1/2"-20UNF-2A
29.5 (1.16) MAX.
Document Number: 95078
Revision: 23-Sep-08
For technical questions, contact: indmodules@vishay.com
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Outline Dimensions
Vishay Semiconductors
TO-209AC (TO-94) for ST110S Series
DIMENSIONS in millimeters (inches)
Ceramic housing
2.6 (0.10) MAX.
16.5 (0.65) MAX.
Ø 8.5 (0.33)
Ø 4.3 (0.17)
9.5 (0.37) MIN.
Flexible lead
20 (0.79) MIN.
C.S. 16 mm2
(0.025 s.i.)
C.S. 0.4 mm2
(0.0006 s.i.)
Red silicon rubber
Red cathode
157 (6.18)
215 10
(8.46 0.39)
170 (6.69)
White gate
Red shrink
70 (2.75)
MIN.
White shrink
Ø 22.5 (0.88) MAX.
29 (1.14)
MAX.
12.5 (0.49) MAX.
21 (0.83)
MAX.
SW 27
1/2"-20UNF-2A
29.5 (1.16) MAX.
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For technical questions, contact: indmodules@vishay.com
Document Number: 95078
Revision: 23-Sep-08
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Vishay
Disclaimer
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
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liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
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provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
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Document Number: 91000
Revision: 11-Mar-11
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