VS-VSKH91/16 [VISHAY]
Silicon Controlled Rectifier,;型号: | VS-VSKH91/16 |
厂家: | VISHAY |
描述: | Silicon Controlled Rectifier, |
文件: | 总9页 (文件大小:330K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
VS-VSKT91.., VS-VSKH91.., VS-VSKL91.., VS-VSKN91.. Series
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Vishay Semiconductors
ADD-A-PAK Generation VII Power Modules
Thyristor/Diode and Thyristor/Thyristor, 95 A
FEATURES
• High voltage
• Industrial standard package
• Low thermal resistance
• UL approved file E78996
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
ADD-A-PAK
BENEFITS
• Excellent thermal performances obtained by the usage of
exposed direct bonded copper substrate
PRODUCT SUMMARY
IT(AV) or IF(AV)
95 A
• Up to 1600 V
Type
Modules - Thyristor, Standard
• High surge capability
• Easy mounting on heatsink
MECHANICAL DESCRIPTION
The ADD-A-PAK Generation VII, new generation of
ADD-A-PAK module, combines the excellent thermal
performances obtained by the usage of exposed direct
bonded copper substrate, with advanced compact simple
package solution and simplified internal structure with
minimized number of interfaces.
ELECTRICAL DESCRIPTION
These modules are intended for general purpose high
voltage applications such as high voltage regulated power
supplies, lighting circuits, temperature and motor speed
control circuits, UPS and battery charger.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
CHARACTERISTICS
VALUES
95
UNITS
IT(AV) or IF(AV)
85 °C
IO(RMS)
As AC switch
50 Hz
210
A
2000
ITSM,
IFSM
60 Hz
2094
50 Hz
20
I2t
kA2s
60 Hz
18.26
I2t
VRRM
TStg
TJ
200
kA2s
V
Range
400 to 1600
-40 to 125
-40 to 125
°C
°C
Revision: 24-Mar-14
Document Number: 94632
1
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
VRRM, MAXIMUM
REPETITIVE PEAK
REVERSE VOLTAGE
V
V
RSM, MAXIMUM
VDRM, MAXIMUM REPETITIVE
I
RRM, IDRM
VOLTAGE
TYPE NUMBER
CODE
NON-REPETITIVE PEAK
PEAK OFF-STATE VOLTAGE,
AT 125 °C
mA
REVERSE VOLTAGE
V
GATE OPEN CIRCUIT
V
04
06
08
400
600
500
700
400
600
800
900
800
VS-VSK.91
10
12
14
16
1000
1200
1400
1600
1100
1300
1500
1700
1000
1200
1400
1600
15
ON-STATE CONDUCTION
PARAMETER
SYMBOL
IT(AV)
TEST CONDITIONS
180° conduction, half sine wave,
C = 85 °C
VALUES
UNITS
Maximum average on-state current (thyristors)
Maximum average forward current (diodes)
95
T
IF(AV)
Maximum continuous RMS on-state current,
as AC switch
or
IO(RMS)
210
I(RMS)
I(RMS)
A
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
2000
2094
1682
1760
20
No voltage
reapplied
ITSM
or
IFSM
Sinusoidal
half wave,
initial TJ = TJ maximum
Maximum peak, one-cycle non-repetitive
on-state or forward current
100 % VRRM
reapplied
No voltage
reapplied
18.26
14.14
12.91
Maximum I2t for fusing
I2t
Initial TJ = TJ maximum
kA2s
100 % VRRM
reapplied
t = 0.1 ms to 10 ms, no voltage reapplied
TJ = TJ maximum
Maximum I2t for fusing
I2t (1)
200
kA2s
Low level (3)
0.97
1.1
(2)
Maximum value or threshold voltage
VT(TO)
TJ = TJ maximum
V
High level (4)
Low level (3)
2.76
2.38
Maximum value of on-state
slope resistance
(2)
rt
TJ = TJ maximum
m
High level (4)
VTM
VFM
ITM = x IT(AV)
TJ = 25 °C
Maximum peak on-state or forward voltage
1.73
150
V
IFM = x IF(AV)
Maximum non-repetitive rate of rise of
turned on current
TJ = 25 °C, from 0.67 VDRM,
ITM = x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
dI/dt
A/μs
TJ = 25 °C, anode supply = 6 V,
resistive load, gate open circuit
Maximum holding current
Maximum latching current
IH
IL
250
400
mA
TJ = 25 °C, anode supply = 6 V, resistive load
Notes
(1)
(2)
(3)
(4)
I2t for time tx = I2t x tx
Average power = VT(TO) x IT(AV) + rt x (IT(RMS)
16.7 % x x IAV < I < x IAV
2
)
I > x IAV
Revision: 24-Mar-14
Document Number: 94632
2
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TRIGGERING
PARAMETER
SYMBOL
PGM
TEST CONDITIONS
VALUES
12
UNITS
Maximum peak gate power
Maximum average gate power
Maximum peak gate current
Maximum peak negative gate voltage
W
A
PG(AV)
IGM
3.0
3.0
- VGM
10
TJ = -40 °C
TJ = 25 °C
TJ = 125 °C
TJ = -40 °C
TJ = 25 °C
TJ = 125 °C
4.0
V
Anode supply = 6 V
resistive load
Maximum gate voltage required to trigger
Maximum gate current required to trigger
VGT
2.5
1.7
270
150
80
Anode supply = 6 V
resistive load
IGT
mA
Maximum gate voltage that will not trigger
Maximum gate current that will not trigger
VGD
IGD
TJ = 125 °C, rated VDRM applied
TJ = 125 °C, rated VDRM applied
0.25
6
V
mA
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum peak reverse and off-state
leakage current at VRRM, VDRM
IRRM,
IDRM
TJ = 125 °C, gate open circuit
15
mA
3000 (1 min)
3600 (1 s)
Maximum RMS insulation voltage
VINS
50 Hz
V
Maximum critical rate of rise of off-state voltage
dV/dt
TJ = 125 °C, linear to 0.67 VDRM
1000
V/μs
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Junction operating and storage
temperature range
TJ, TStg
-40 to 125
°C
Maximum internal thermal resistance,
junction to case per leg
RthJC
RthCS
DC operation
0.22
0.1
°C/W
Nm
Typical thermal resistance,
case to heatsink per module
Mounting surface flat, smooth and greased
A mounting compound is recommended and
the torque should be rechecked after a period of
3 hours to allow for the spread of the compound.
to heatsink
busbar
4
3
Mounting torque 10 %
75
g
Approximate weight
Case style
2.7
oz.
JEDEC®
AAP GEN VII (TO-240AA)
R CONDUCTION PER JUNCTION
SINE HALF WAVE CONDUCTION
RECTANGULAR WAVE CONDUCTION
DEVICES
UNITS
180°
120°
90°
60°
30°
180°
120°
90°
60°
30°
VSK.91..
0.04
0.048
0.063
0.085
0.125
0.033
0.052
0.067
0.088
0.127
°C/W
Note
•
Table shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC
Revision: 24-Mar-14
Document Number: 94632
3
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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130
120
110
100
90
220
RthJC (DC) = 0.22°C/W
180°
120°
90°
200
180
160
140
120
100
80
60°
DC
30°
RMS limit
180°
60
120°
90°
60°
30°
40
80
20
Per leg, Tj = 125°C
70
0
0
20
40
60
80
100
0
20 40 60 80 100 120 140 160
Average on-state current (A)
Average on-state current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - On-State Power Loss Characteristics
130
120
110
100
90
1800
At any rated load condition and with
rated Vrrm applied following surge
RthJC (DC) = 0.22°C/W
Initial Tj = Tj max
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100s
1600
1400
1200
1000
800
DC
180°
120°
90°
60°
30°
80
Per leg
70
0
20 40 60 80 100 120 140 160
Average on-state current (A)
1
10
100
Number of equal amplitude half cycle current pulses (N)
Fig. 2 - Current Ratings Characteristics
Fig. 5 - Maximum Non-Repetitive Surge Current
160
140
120
100
80
2000
180°
120°
90°
Maximum Non-repetitive Surge Current
Versus Pulse Train Duration. Control
of conduction may not be maintained.
Initial Tj = 125°C
1800
1600
1400
1200
1000
800
60°
30°
No Voltage Reapplied
RMS limit
Rated Vrrm reapplied
60
40
20
Per leg
Per leg, Tj = 125°C
0
0.01
0.1
1
0
20
Average on-state current (A)
Fig. 3 - On-State Power Loss Characteristics
40
60
80
100
Pulse train duration (s)
Fig. 6 - Maximum Non-Repetitive Surge Current
Revision: 24-Mar-14
Document Number: 94632
4
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKT91.., VS-VSKH91.., VS-VSKL91.., VS-VSKN91.. Series
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Vishay Semiconductors
400
RthSA = 0.1 °C/W
0.2 °C/W
350
300
250
200
150
100
50
180°
120°
90°
0.3 °C/W
0.5 °C/W
0.7 °C/W
1 °C/W
1.5 °C/W
3 °C/W
60°
30°
VSK.91 Series
Per module
Tj = 125°C
0
0
0
0
40
80
120 160 200 2040 20 40 60 80 100 120 140
Total RMS output current (A)
Maximum allowable ambient temperature (°C)
Fig. 7 - On-State Power Loss Characteristics
700
600
500
400
300
200
100
0
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
1 °C/W
180°
(sine)
180°
(rect)
2 °C/W
∼
2 x VSK.91 Series
single phase bridge connected
Tj = 125°C
0
200
20 40 60 80 100 120 140
50
100
150
Maximum allowable ambient temperature (°C)
Total output current (A)
Fig. 8 - On-State Power Loss Characteristics
900
800
700
600
500
400
300
200
100
0
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
1 °C/W
120°
(rect)
3 x VSK.91 Series
three phase bridge connected
Tj = 125°C
0
120 160 200 240
20 40 60 80 100 120 140
40
80
Maximum allowable ambient temperature (°C)
Total output current (A)
Fig. 9 - On-State Power Loss Characteristics
Revision: 24-Mar-14
Document Number: 94632
5
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKT91.., VS-VSKH91.., VS-VSKL91.., VS-VSKN91.. Series
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1000
Per leg
100
10
Tj = 125°C
Tj = 25°C
1
0.5
1.0
Instantaneous on-state voltage (V)
Fig. 10 - On-State Voltage Drop Characteristics
1.5
2.0
2.5
3.0
3.5
1
0.1
Steady state value
RthJC = 0.22 °C/W
(DC operation)
Per leg
0.01
0.001
0.001
0.01
0.1
1
10
Square wave pulse duration (s)
Fig. 11 - Thermal Impedance ZthJC Characteristics
100
10
1
Rectangular gate pulse
(1) PGM = 200 W, tp = 300 µs
(2) PGM = 60 W, tp = 1 ms
(3) PGM = 30 W, tp = 2 ms
(4) PGM = 12 W, tp = 5 ms
a)Recommended load line for
rated di/dt: 20 V, 20ohms
tr = 0.5µs, tp >= 6µs
b)Recommended load line for
<= 30%rated di/ dt: 15 V, 40 ohms
tr = 1 µs, tp >= 6 µs
(a)
(b)
(4) (3) (2)
(1)
VGD
IGD
V
S
K
.91.. Series Fre q ue n c y Lim it e d b y PG ( A V )
0.1
0.001
0.01
0.1
1
10 100
1000
Instantaneous gate current (A)
Fig. 12 - Gate Characteristics
Revision: 24-Mar-14
Document Number: 94632
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For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKT91.., VS-VSKH91.., VS-VSKL91.., VS-VSKN91.. Series
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ORDERING INFORMATION TABLE
Device code
VS-VS
K
T
91
/
16
1
2
3
4
5
1
2
3
4
5
-
Vishay Semiconductors product
Module type
-
-
-
-
Circuit configuration (see Circuit Configuration table)
Current code (95 A)
Voltage code (see Voltage Ratings table)
Note
•
To order the optional hardware go to www.vishay.com/doc?95172
CIRCUIT CONFIGURATION
CIRCUIT
CIRCUIT DESCRIPTION
CIRCUIT DRAWING
CONFIGURATION CODE
(1)
~
1
VSKT
+
2
(2)
Two SCRs doubler circuit
T
H
L
3
4
5
7
6
-
(3)
G1 K1 K2 G2
(4) (5) (7) (6)
(1)
~
1
VSKH
+
2
3
(2)
SCR/diode doubler circuit, positive control
4
5
-
(3)
G1 K1
(4) (5)
(1)
~
1
VSKL
+
2
(2)
SCR/diode doubler circuit, negative control
3
6
7
-
(3)
K2 G2
(7) (6)
(1)
-
1
VSKN
+
2
3
(2)
SCR/diode common anodes
N
4
5
+
(3)
G1 K1
(4) (5)
LINKS TO RELATED DOCUMENTS
7
Dimensions
Revision: 24-Mar-14
www.vishay.com/doc?95368
Document Number: 94632
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Outline Dimensions
Vishay Semiconductors
ADD-A-PAK Generation VII - Thyristor
DIMENSIONS in millimeters (inches)
Fast-on tab ꢀ.8 x 0.8 (0.110 x 0.03ꢁ
Viti M5 x 0.8
Screws M5 x 0.8
15.5 0.5
(0.6 0.0ꢀ0ꢁ
18 (0.7ꢁ REF.
80 0.3 (3.15 0.01ꢀꢁ
15 0.5 (0.59 0.0ꢀ0ꢁ
ꢀ0 0.5 (0.79 0.0ꢀ0ꢁ
ꢀ0 0.5 (0.79 0.0ꢀ0ꢁ
9ꢀ 0.75 (3.6 0.030ꢁ
Document Number: 95368
Revision: 11-Nov-08
For technical questions, contact: indmodules@vishay.com
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1
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Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.
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© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
Document Number: 91000
1
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