TT31F476Z100CG [WALSIN]
Low Profile Series;
| 型号： | TT31F476Z100CG |
| 厂家： | 
Walsin Technology |
| 描述： | Low Profile Series |
| 文件： | 总9页 (文件大小：2904K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Multilayer Ceramic Capacitors
Approval Sheet
MULTILAYER CERAMIC CAPACITORS
Low Profile Series
0402 to 1210 Sizes
X7R, X5R & Y5V Dielectrics
Halogen Free & RoHS Compliance
*Contents in this sheet are subject to change without prior notice.
Page 1 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
Approval Sheet
1. DESCRIPTION
MLCC consists of a conducting material and electrodes. To manufacture a chip-type SMT and achieve miniaturization,
high density and high efficiency, ceramic condensers are used.
WTC TT series MLCC is used in product having thickness concerned generally have high capacitance and thinner
product thickness. The high dielectric constant material X7R, X5R and Y5V are used for this series product.
2. FEATURES
3. APPLICATIONS
a. Standard size with thin thickness.
a. For LCD panels.
b. Small size with high capacitance.
b. For PCMCA cards.
c. Capacitor with lead-free termination (pure Tin).
c. For IC packaging and modules.
d. Any thickness concerned products.
4. HOW TO ORDER
TT
15
X
475
M
6R3
C
T
Series
Size
Dielectric Capacitance
Tolerance
Rated voltage
Termination
Packaging
TT=Low profile 15=0402 (1005) B=X7R
18=0603 (1608) X=X5R
21=0805 (2012) F=Y5V
31=1206 (3216)
Two significant
K=±10%
Two significant
C=Cu/Ni/Sn T=7” reeled
G=13” reeled
digits followed by M=±20%
digits followed by
no. of zeros. And Z=-20/+80% no. of zeros. And
R is in place of
decimal point.
R is in place of
decimal point.
32=1210 (3225)
eg.:
6R3=6.3 VDC
100=10 VDC
160=16 VDC
250=25 VDC
500=50 VDC
101=100 VDC
475=47x105
=4,700,000pF
=4.7µF
Page 2 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
Approval Sheet
5. EXTERNAL DIMENSIONS
Size
Inch (mm)
L (mm)
W (mm)
0.5±0.2
T (mm)/Symbol
MB (mm)
0.25±0.10
0.40±0.15
0.50±0.20
L
0402 (1005)
1.00±0.2
0.30±0.03
L
H
T
T
0603 (1608)
0805 (2012)
1.6+0.15/-0.10 0.8+0.15/-0.10 0.50±0.10
W
2.00±0.20
3.20±0.20
1.25±0.20
1.60±0.20
0.85±0.10
MB
MB
0.85±0.10
1.15±0.15
0.85±0.10
2.00±0.20
T
J
1206 (3216)
1210 (3225)
0.60±0.20
0.75±0.25
Fig. 1 The outline of MLCC
T
K
3.20±0.30
2.50±0.20
* Reflow soldering process only is recommended.
6. GENERAL ELECTRICAL DATA
Dielectric
X7R
X5R
Y5V
Size
0402, 0603, 0805, 1206, 1210
Capacitance range*
Capacitance tolerance**
Rated voltage (WVDC)
Operating temperature
Capacitance characteristic
Termination
1µF to 10µF
0.22µF to 22µF
1µF to 10µF
Z (-20/+80%)
10V, 16V, 25V, 50V
-25 to +85°C
K (±10%), M (±20%)
10V, 16V, 25V, 50V, 100V
-55 to +125°C
6.3V, 10V, 16V, 25V
-55 to +85°C
±15%
Ni/Sn (lead-free termination)
+30/-80%
* Measured at 1.0±0.2Vrms, 1.0kHz±10%, 30~70% related humidity, 25°C ambient temperature for X7R, X5R and at 20°C for Y5V.
** Preconditioning for Class II MLCC: Perform a heat treatment at 150±10°C for 1 hour, then leave in a mbient condition for 24±2 hours
before measurement.
Page 3 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
Approval Sheet
7. CAPACITANCE RANGE
7-1 X7R dielectric
Dielectric
X7R
16
Size
0805
1206
1210
16
Rated voltage (VDC)
1.0µF (105)
10
16
25
50
10
25
50
10
100
T
1.5µF (155)
2.2µF (225)
T
T
T
K
3.3µF (335)
4.7µF (475)
T
T
6.8µF (685)
10µF (106)
T
22µF (226)
7-2 X5R dielectric
Dielectric
X5R
Size
0402
0603
0805
1206
16
1210
16
Rated voltage (VDC) 6.3 10
0.22uF (224)
25
L
10
16
6.3
10
16
25
6.3 10
25
50
10
25
H
H
0.47uF (474)
1.0µF (105)
1.5µF (155)
2.2µF (225)
3.3µF (335)
4.7µF (475)
6.8µF (685)
10µF (106)
22uF (226)
47uF (476)
L
L
L
H
H
H
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
L
L
T
T
T
T
T
T
T
T
T
T
T
T
J
T
T
J/T
T
T
T
T
T
7-3 Y5V dielectric
Dielectric
Y5V
Size
0805
1206
1210
Rated voltage (VDC)
1.0µF (105)
10
16
25
50
10
16
25
50
10
16
T
1.5µF (155)
2.2µF (225)
T
T
T
T
T
T
T
3.3µF (335)
T
T
4.7µF (475)
T
T
T
6.8µF (685)
10µF (106)
T
T
22µF (226)
8. PACKAGING STYLE AND QUANTITY
7” reel
Size
Thickness Max (mm)/Symbol
Paper tape
Plastic tape
0402 (1005)
0603 (1608)
0805 (2012)
0.33
0.60
0.95
0.95
1.30
L
H
T
T
J
15k
4k
4k
4k
-
-
-
-
-
1206 (3216)
1210 (3225)
3k
3k
0.95
2.00
T
-
K
-
1k
Unit: pieces
Page 4 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
Approval Sheet
9. RELIABILITY TEST CONDITIONS AND REQUIREMENTS
No.
Item
Test Condition
Requirements
* No remarkable defect.
* Dimensions to conform to individual specification sheet.
1. Visual and
Mechanical
2. Capacitance
3. Q/ D.F.
---
Cap≤10µF, 1.0±0.2Vrms, 1kHz±10%
Cap>10µF, 0.5±0.2Vrms, 120Hz±20%**
** Test condition: 0.5±0.2Vrms，1KHz±10%
TT18X≧475(10V) , TT15X series
* Shall not exceed the limits given in the detailed spec.
X7R/X5R:
Rated vol.
100V
D.F.
≤5%
(Dissipation
50V, 25V, 16V, 10V
6.3V
≤10%
≤15%
Factor)
*Before initial measurement (Class II only): To apply de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
Y5V:
Rated vol.
50V
D.F.
≤7%
25V
≤9%
16V/10V
≤12.5%
* To apply voltage: 250% rated voltage.
* Duration: 1 to 5 sec.
* Charge and discharge current less than 50mA.
* To apply rated voltage for max. 120 sec.
4. Dielectric
Strength
* No evidence of damage or flash over during test.
5. Insulation
Resistance
≥10GΩ or RxC≥100Ω-F whichever is smaller.
With no electrical load.
6. Temperature
Coefficient
T.C.
X7R
X5R
Y5V
Operating Temp
-55~125°C at 25°C
-55~85°C at 25°C
-25~85°C at 20°C
T.C.
X7R
X5R
Y5V
Capacitance Change
Within ±15%
Within ±15%
*Before initial measurement (Class II only):
To apply de-aging at 150°C for 1hr then set for 24± 2 hrs at
room temp.
Within +30%/-80%
01005
Cap≤0.01µF: 0.5V
0201
Cap<0.1µF:1V
Cap>0.01µF: 0.2V
0.1µF*≤Cap<1µF: 0.2V
Cap≥1µF: 0.1V
*0201X104/16V: 0.5V
0603
Cap≤1µF: 1V
0402
Cap<1µF: 1V
Cap=1µF: 0.5V
1µF<Cap<10µF: 0.2V
Cap≥10µF: 0.1V
0805
Cap<10µF: 1V
Cap=10µF: 0.5V
Cap>10µF: 0.2V
1µF<Cap≤4.7µF: 0.5V
Cap>4.7µF: 0.2V
1206/1210
Cap≤10µF: 1V
10µF<Cap≤100µF: 0.5V
Cap>100µF: 0.2V
* Pressurizing force：5N (≤0603) and 10N (>0603)
* Test time: 10±1 sec.
7. Adhesive
Strength of
Termination
8. Vibration
Resistance
* No remarkable damage or removal of the terminations.
* Vibration frequency: 10~55 Hz/min.
* Total amplitude: 1.5mm
* Test time: 6 hrs. (Two hrs each in three mutually
perpendicular directions.)
* No remarkable damage.
* Cap change and Q/D.F.: To meet initial spec.
* Before initial measurement (Class II only):
To apply de-aging at 150°C for 1hr then set for 24± 2 hrs at
room temp.
* Cap./DF(Q) Measurement to be made after de-aging at
150°C for 1hr then set for 24±2 hrs at room temp.
* Solder temperature: 235±5°C
9. Solderability
10. Bending Test
95% min. coverage of all metalized area.
* Dipping time: 2±0.5 sec.
* The middle part of substrate shall be pressurized by means
of the pressurizing rod at a rate of about 1 mm per second until
the deflection becomes 1 mm and then the pressure shall be
maintained for 5±1 sec.
* No remarkable damage.
* Cap change：
X7R/X5R: within ±12.5%
* Before initial measurement (Class II only):
To apply de-aging at 150°C for 1hr then set for 24± 2 hrs at
room temp.
* Measurement to be made after keeping at room temp. for
24±2 hrs.
Y5V: within ±30%
(This capacitance change means the change of capacitance under
specified flexure of substrate from the capacitance measured before
the test.)
* Solder temperature: 260±5°C
* Dipping time: 10±1 sec
* Preheating: 120 to 150°C for 1 minute before imme rse the
capacitor in a eutectic solder.
11. Resistance to
Soldering Heat
* No remarkable damage.
* Cap change:
X7R/X5R: within ±7.5%
*Before initial measurement (Class II only): To apply de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
*Cap. / DF(Q) / I.R. Measurement to be made after de-aging at
150°C for 1hr then set for 24±2 hrs at room temp.
Y5V: within ±20%
* Q/D.F., I.R. and dielectric strength: To meet initial requirements.
* 25% max. leaching on each edge.
Page 5 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
Approval Sheet
No.
Item
Test Condition
Requirements
12. Temperature
Cycle
* Conduct the five cycles according to the temperatures and * No remarkable damage.
time.
Step
* Cap change：
Temp. (°C)
Min. operating temp. +0/-3
Room temp.
Time (min.)
30±3
X7R/X5R: within ±7.5%
Y5V: within ±20%
1
2
3
4
2~3
* Q/D.F., I.R. and dielectric strength: To meet initial requirements.
Max. operating temp. +3/-0
Room temp.
30±3
2~3
* Before initial measurement (Class II only): To apply de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
* Cap. / DF(Q) / I.R. Measurement to be made after de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
* Test temp.: 40±2°C
*No remarkable damage.
*Cap change： X7R/X5R: within ±25%
Y5V: within ±30%; 6.3V, within +30/-40%
13. Humidity
(Damp Heat)
Steady State
* Humidity: 90~95% RH
*Q/D.F. value:
X7R/X5R:
* Test time: 500+24/-0hrs.
* Before initial measurement (Class II only): To apply de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
Rated vol.
100V
D.F.
≤7.5%
≤15%
≤20%
≤30%
* Cap. / DF(Q) / I.R. Measurement to be made after de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
25V, 16V
10V
50V, 6.3V
Y5V:
Rated vol.
50V
D.F.
≤10%
≤15%
≤20%
25V
16V, 10V
*I.R.: 1GΩ or RxC
≧
10 Ω-F whichever is smaller.
*No remarkable damage.
*Cap change: X7R/X5R: within ±25%
14. Humidity
(Damp Heat)
Load
* Test temp.: 40±2°C
* Humidity: 90~95%RH
* Test time: 500+24/-0 hrs.
Y5V: within ±30%; 6.3V, within +30/-40%
*Q/D.F. value:
X7R/X5R:
Rated vol.
100V
* To apply voltage：Rated voltage.
* Before initial measurement (Class II only): To apply de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
D.F.
≤7.5%
≤15%
≤20%
≤30%
* Cap. / DF(Q) / I.R. Measurement to be made after de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
25V, 16V
10V
50V, 6.3V
Y5V:
Rated vol.
50V
D.F.
≤10%
≤15%
≤20%
25V
16V, 10V
*I.R.: 500MΩ or RxC≧5 Ω-F whichever is smaller.
* Test temp.：
NP0, X7R/X7E: 125±3°C
X5R, Y5V: 85±3°C
* Test time: 1000+24/-0 hrs.
* To apply voltage: 150% of rated voltage.
**100% of rated voltage for below range.
15. High
Temperature
Load
*No remarkable damage.
*Cap change: X7R/X5R: within ±25%
Y5V: within ±30%; 6.3V, within +30/-40%
*Q/D.F. value:
(Endurance)
X7R/X5R:
Rated vol.
100V
D.F.
Rated
Capacitance
range
Size
Dielectric
voltage
≤7.5%
≤15%
≤20%
≤30%
TT15
TT18
X5R
Y5V
Y5V
6.3V
6.3V,10V
6.3V
C≧1.0µF
C≧2.2µF
25V, 16V
10V
C
C
C
≧
≧
≧
10µF
10µF
22µF
TT21
TT31
50V, 6.3V
X5R/X7R/X6S
Y5V
≦
10V
6.3V
Y5V:
Rated vol.
50V
D.F.
*Before initial measurement (Class II only): To apply de-aging
at 150°C for 1hr then set for 24±2 hrs at room temp .
* Cap. / DF(Q) / I.R. Measurement to ©r de-aging at 150°C for
1hr then set for 24±2 hrs at room temp.
≤10%
≤15%
≤20%
25V
16V, 10V
*I.R.: 1GΩ or RxC≧10 Ω-F whichever is smaller.
Page 6 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
APPENDIXES
Approval Sheet
◙ Tape & reel dimensions
Fig. 2 The dimension of paper tape
Fig. 3 The dimension of plastic tape
Size
0402
L
0603
H
0805
T
1206
1210
Thickness
T
J
T
K
0.70
+/-0.2
1.20
1.05
+/-0.30
1.80
1.50
+/-0.20
2.30
1.90
+/-0.50
3.50
1.05
+/-0.30
1.80
< 2.00
< 3.05
A0
B0
T
< 3.70
< 3.80
+/-0.2
+/-0.30
+/-0.20
+/-0.50
+/-0.30
0.23
+/-0.1
0.23
+/-0.1
≦0.80
≦1.20
≦1.20
≦1.20
≦1.20
-
-
-
-
< 2.50
< 1.50
-
K0
W
8.00
+/-0.30
4.00
+/-0.10
40.00
+/-0.20
2.00
8.00
+/-0.30
4.00
+/-0.10
40.00
+/-0.20
4.00
8.00
+/-0.30
4.00
+/-0.10
40.00
+/-0.20
4.00
8.00
+/-0.30
4.00
+/-0.10
40.00
+/-0.20
4.00
8.00
+/-0.30
4.00
+/-0.10
40.00
+/-0.20
4.00
8.00
+/-0.30
4.00
+/-0.10
40.00
+/-0.20
4.00
8.00
+/-0.30
4.00
+/-0.10
40.00
+/-0.20
4.00
P0
10xP0
P1
+/-0.10
+/-0.10
+/-0.10
+/-0.10
+/-0.10
+/-0.10
+/-0.10
2.00
+/-0.05
1.50
2.00
+/-0.05
1.50
2.00
+/-0.05
1.50
2.00
+/-0.05
1.50
2.00
+/-0.05
1.50
+0.1/-0
1.00
+/-0.10
1.75
+/-0.10
3.50
+/-0.05
2.00
+/-0.05
1.50
+0.1/-0
1.00
+/-0.10
1.75
+/-0.10
3.50
+/-0.05
2.00
+/-0.05
1.50
P2
D0
D1
E
+0.1/-0
+0.1/-0
+0.1/-0
+0.1/-0
+0.1/-0
-
-
-
-
-
1.75
+/-0.10
3.50
1.75
+/-0.10
3.50
1.75
+/-0.10
3.50
1.75
+/-0.10
3.50
1.75
+/-0.10
3.50
F
+/-0.05
+/-0.05
+/-0.05
+/-0.05
+/-0.05
Size
0402, 0603, 0805, 1206, 1210
10”
Reel size
7”
13”
C
W1
A
13.0+0.5/-0.2
8.4+1.5/-0
178.0±1.0
60.0+1.0/-0
13.0+0.5/-0.2
8.4+1.5/-0
13.0+0.5/-0.2
8.4+1.5/-0
330.0±1.0
100±1.0
250.0±1.0
N
100.0±1.0
Fig. 4 The dimension of reel
Page 7 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
Approval Sheet
◙ Example of customer label
a. Customer name
b. WTC order series and item number
c. Customer P/O
d. Customer P/N
e. Description of product
f. Quantity
g. Bar code including quantity & WTC P/N or customer
h. WTC P/N
i. Shipping date
j. Order bar code including series and item numbers
k. Serial number of label
*Customized label is available upon request
◙ Constructions
No.
1
2
3
4
5
Name
X7R, X5R, Y5V
Ceramic material
Inner electrode
BaTiO3 based
Ni
Cu
Inner layer
Termination
Middle layer
Outer layer
Ni
Fig. 5 The construction of MLCC
Sn (Matt)
◙ Storage and handling conditions
(1) To store products at 5 to 40°C ambient temperature and 20 to 70%. related humidity conditions.
(2) The product is recommended to be used within one year after shipment. Check solderability in case of shelf life
extension is needed.
Cautions:
a. The corrosive gas reacts on the terminal electrodes of capacitors, and results in the poor solderability.
Do not store the capacitors in the ambience of corrosive gas (e.g., hydrogen sulfide, sulfur dioxide,
chlorine, ammonia gas etc.)
b. In corrosive atmosphere, solderability might be degraded, and silver migration might occur to cause low
reliability.
c. Due to the dewing by rapid humidity change, or the photochemical change of the terminal electrode by
direct sunlight,the solderability and electrical performance may deteriorate. Do not store capacitors under
direct sunlight or dewing condition. To store products on the shelf and avoid exposure to moisture.
Page 8 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
Multilayer Ceramic Capacitors
Approval Sheet
◙ Recommended soldering conditions
The lead-free termination MLCCs are not only to be used on SMT against lead-free solder paste, but also suitable
against lead-containing solder paste. If the optimized solder joint is requested, increasing soldering time, temperature and
concentration of N2 within oven are recommended.
Fig. 6 Recommended reflow soldering profile for SMT process
with SnAgCu series solder paste.
Fig. 7 Recommended wave soldering profile for SMT process
with SnAgCu series solder.
Page 9 of 9
ASC_ Low Profile_(TT)_009Q_AS
Dec. 2018
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