5962-9207806HXX [WEDC]
SRAM Module, 512KX8, 45ns, CMOS, DIP-32;
| 型号： | 5962-9207806HXX |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | SRAM Module, 512KX8, 45ns, CMOS, DIP-32 静态存储器 内存集成电路 |
| 文件： | 总20页 (文件大小：159K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
B
C
D
E
F
Changes in accordance with NOR 5962-R109-94.
Add case outline Y.
94-01-25
94-09-02
95-07-19
96-12-16
97-02-24
98-06-23
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
Added device type 09. Made changes to table I.
Changes in accordance with NOR 5962-R153-97.
Add case outline T.
Table I; Changed the max limit for ICC for device types 06 trough 09
from 200 mA to 210 mA. Changes the max limit for ICCDR for device
types 06 through 09 from 10.4 mA to 12.8 mA. -sld
G
H
Added note to paragraph 1.2.2 and table I to regarding the 4
transistor design. Added thermal resistance ratings for all case
outlines to paragraph 1.3. Editorial changes throughout. -sld
00-07-03
01-04-09
Raymond Monnin
Raymond Monnin
Table I, tOH, change minimum limit for device types 01 through 03
from 15 ns to 5 ns.
REV
SHEET
REV
H
H
H
H
SHEET
15
16
17
18
REV STATUS
OF SHEETS
REV
SHEET
H
1
H
2
H
3
H
4
H
5
H
6
H
7
H
8
H
9
H
H
H
H
H
10
11
12
13
14
PMIC N/A
PREPARED BY
Steve L. Duncan
DEFENSE SUPPLY CENTER COLUMBUS
POST OFFICE BOX 3990
STANDARD
MICROCIRCUIT
DRAWING
CHECKED BY
Michael C. Jones
COLUMBUS, OHIO 43216-5000
http://www.dscc.dla.mil
APPROVED BY
Kendall A. Cottongim
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
MICROCIRCUIT, HYBRID, MEMORY,
DIGITAL, STATIC RANDOM ACCESS
MEMORY, CMOS, 512K x 8-BIT
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
93-01-25
AMSC N/A
REVISION LEVEL
H
SIZE
A
CAGE CODE
5962-92078
67268
SHEET
1 OF 18
DSCC FORM 2233
APR 97
5962-E329-01
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1. SCOPE
1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A
choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When
available, a choice of radiation hardness assurance levels are reflected in the PIN.
1.2 PIN. The PIN shall be as shown in the following example:
5962
-
92078
01
H
T
X
Federal
stock class
designator
\
RHA
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
designator
(see 1.2.1)
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA
levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type 1/
Generic number
Circuit function
Access time
01
02
03
04
05
06
07
08
09
WS512K8-120CQ
WS512K8-100CQ
WS512K8-85CQ
WS512K8-70CQ
WS512K8-55CQ
WS512K8-45CQ
WS512K8-35CQ
WS512K8-25CQ
WS512K8-20CQ
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
SRAM, 512K x 8-bit
120 ns
100 ns
85ns
70ns
55ns
45ns
35ns
25ns
20ns
1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level.
All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K,
and E) or QML Listing (Class G and D). The product assurance levels are as follows:
Device class
K
Device performance documentation
Highest reliability class available. This level is intended for use in space
applications.
H
G
Standard military quality class level. This level is intended for use in applications
where non-space high reliability devices are required.
Reduced testing version of the standard military quality class. This level uses the
Class H screening and In-Process Inspections with a possible limited temperature
range, manufacturer specified incoming flow, and the manufacturer guarantees (but
may not test) periodic and conformance inspections (Group A, B, C, and D).
E
D
Designates devices which are based upon one of the other classes (K, H, or G)
with exception(s) taken to the requirements of that class. These exception(s) must
be specified in the device acquisition document; therefore the acquisition document
should be reviewed to ensure that the exception(s) taken will not adversely affect
system performance.
Manufacturer specified quality class. Quality level is defined by the manufacturers
internal, QML certified flow. This product may have a limited temperature range.
1/ Due to the nature of the 4 transistor design of the die in these device types, topologically pure testing is important,
particularly for high reliability applications. The device manufacturer should be consulted concerning their testing
methods and algorithms.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
2
DSCC FORM 2234
APR 97
1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
Outline letter
Descriptive designator
Terminals
Package style
T
See figure 1
See figure 1
See figure 1
32
32
32
Dual-in-line, single cavity
X
Dual-in-line, dual cavity
Y 1/
Dual-in-line, dual cavity, gull wing leads
1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534.
1.3 Absolute maximum ratings. 2/
Supply voltage range (VCC)........................................................
Signal voltage range (any pin)...................................................
Power dissipation (PD) ...............................................................
Thermal resistance, junction- to case ( JC):
Case outline T ........................................................................
Case outline X .......................................................................
Case outline Y........................................................................
Storage temperature range........................................................
Lead temperature (soldering, 10 seconds)................................
-0.5 V dc to +7.0 V dc
-0.5 V dc to +7.0 V dc
1 W
3.113 C/W
10 C/W
9.76 C/W
-65 C to +150 C
+300 C
1.4 Recommended operating conditions.
Supply voltage range (VCC)........................................................
Input low voltage range (VIL)......................................................
Input high voltage range (VIH)....................................................
Output low voltage, maximum (VOL)...........................................
Output high voltage, minimum (VOH)..........................................
Case operating temperature range (TC).....................................
+4.5 V dc to +5.5 V dc
-0.5 V dc to +0.8 V dc
+2.2 V dc to VCC +0.3 V dc
+0.4 V dc
+2.4 V dc
-55 C to +125 C
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38534 - Hybrid Microcircuits, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard For Electronic Component Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
1/ The case outline Y is no longer available.
2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
SIZE
STANDARD
5962-92078
A
MICROCIRCUIT DRAWING
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
3
DSCC FORM 2234
APR 97
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be in
accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as
designated in the device manufacturer's Quality Management (QM) plan or as designated for the applicable device class.
Therefore, the tests and inspections herein may not be performed for the applicable device class (see MIL-PRF-38534).
Furthermore, the manufacturers may take exceptions or use alternate methods to the tests and inspections herein and not
perform them. However, the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device
class.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38534 and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.
3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4 and 5.
3.2.5 Block diagram. The block diagram shall be as specified on figure 6.
3.2.6 Output load circuit. The output load circuit shall be as specified on figure 7.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full specified operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
3.5 Marking of device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked
with the PIN listed in 1.2 herein. In addition, the manufacturer's vendor similar PIN may also be marked.
3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the device described
herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot
sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for
those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer
and be made available to the preparing activity (DSCC-VA) upon request.
3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this
drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturer's product meets
the performance requirements of MIL-PRF-38534 and herein.
3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of
microcircuits delivered to this drawing.
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as
modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the
form, fit, or function as described herein.
SIZE
STANDARD
5962-92078
A
MICROCIRCUIT DRAWING
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
4
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions 1/ 2/
-55 C TC +125 C
Group A
subgroups
Device
types
Limits
Unit
Min
Max
VSS = 0 V dc
+4.5 V dc VCC +5.5 V dc
unless otherwise specified
DC PARAMETERS
Operating supply current
ICC
CS = VIL, OE = VIH,
f = 5 MHz, CMOS
compatible, VCC = +5.5 V dc
1,2,3
1,2,3
01,02
03
04
05
06-09
70
80
120
165
210
mA
Standby current
ISB
CS = VCC, OE = VIH,
f = 5 MHz, CMOS
01,02
03
2.5 mA
4.0
compatible, VCC = +5.5 V dc
04
45
05
06
07,08
09
50
55
60
80
Input leakage current
Output leakage current
ILI
VCC = +5.5 V dc,
VIN = GND or VCC
1,2,3
1,2,3
All
All
15
15
A
A
ILO
CS = VIH, OE = VIH,
VOUT = GND or VCC
Input low voltage
Input high voltage
Output low voltage
VIL
1,2,3
1,2,3
1,2,3
All
All
All
0.8
V
VIH
VOL
2.2
V
V
Device types 01 through 05,
0.4
I
OL = 2.1 mA
Device types 06 through 09
OL = 8.0 mA
I
V
Output high voltage
VOH
Device types 01 through 05
OH = -1.0 mA
1,2,3
All
2.4
I
Device types 06 through 09
OH = -4.0 mA
I
See footnotes at end of table.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55 C TC +125 C
Group A
subgroups
Device
types
Limits
Unit
Min
Max
VSS = 0 V dc
+4.5 V dc VCC +5.5 V dc
unless otherwise specified
DATA RETENTION
Data retention supply
voltage
VDR
1,2,3
1,2,3
All
2.0
5.5
V
CS VCC - 0.2 V dc
VCC = 3.0 V dc
Data retention current 3/
ICCDR
01,02
03
1.1
1.6
mA
04
3.0
05
06-09
10.4
12.8
CAPACITANCE
Input capacitance 4/
CIN
VIN =0 V dc, f = 1 MHz
4
4
01-05
06-09
40
45
pF
pF
Output capacitance 4/
COUT
VOUT = 0 V dc, f = 1 MHz
01-05
06-09
40
45
FUNCTIONAL TESTING
Functional tests
See 4.3.1c
7,8A,8B
9,10,11
All
READ CYCLE AC TIMING
Read cycle time
tRC
See figure 4
01
02
03
04
05
06
07
08
09
120
100
85
ns
70
55
45
35
25
20
See footnotes at end of table.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55 C TC +125 C
Group A
subgroups
Device
types
Limits
Unit
Min
Max
VSS = 0 V dc
+4.5 V dc VCC +5.5 V dc
unless otherwise specified
READ CYCLE AC TIMING - Continued.
Address access time
tAA
See figure 4
9,10,11
01
02
03
04
05
06
07
08
09
120
100
85
70
55
45
35
25
20
ns
Output hold from address
change
tOH
See figure 4
See figure 4
9,10,11
9,10,11
01-04
05-09
5
3
ns
ns
Chip select access time
tACS
01
02
03
04
05
06
07
08
09
120
100
85
70
55
45
35
25
20
Output enable to output
valid
tOE
See figure 4
9,10,11
01,02
03
04
05
06
60
55
50
40
35
25
10
ns
07
08,09
Chip select to output in
low impedance
tCLZ
See figure 4
See figure 4
9,10,11
9,10,11
01-03
04,05
06-09
10
5
3
ns
ns
Output enable to output in
low impedance
tOLZ
01-04
05-09
5
0
See footnotes at end of table.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
7
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55 C TC +125 C
Group A
subgroups
Device
types
Limits
Unit
Min
Max
VSS = 0 V dc
+4.5 V dc VCC +5.5 V dc
unless otherwise specified
READ CYCLE AC TIMING - Continued.
Chip select to output
in high impedance
tCHZ
See figure 4
9,10,11
01,02
03
04
05
06
07
08
09
50
45
40
35
30
20
17
15
ns
Output enable to output
in high impedance
tOHZ
See figure 4
9,10,11
01,02
03
04
05
06
07
08
09
50
45
40
30
25
20
15
12
ns
WRITE CYCLE AC TIMING
Address setup time
Write cycle time
tAS
See figure 5
See figure 5
9,10,11
9,10,11
All
2
ns
ns
tWC
01
02
03
04
05
06
07
08
09
120
100
85
70
55
45
35
25
20
Write pulse width
tWP
See figure 5
9,10,11
01
02
03
04,05
06
07
80
70
65
40
30
25
20
16
ns
08
09
Write recovery time
tWR
See figure 5
9,10,11
All
2
ns
See footnotes at end of table.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
8
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55 C TC +125 C
Group A
subgroups
Device
types
Limits
Unit
Min
Max
VSS = 0 V dc
+4.5 V dc VCC +5.5 V dc
unless otherwise specified
WRITE CYCLE AC TIMING - Continued.
Data valid to end of write
tDW
9,10,11
01,02
03
04
05
06
50
45
40
30
25
20
15
ns
See figure 5
07
08,09
Data hold time
tDH
See figure 5
See figure 5
9,10,11
9,10,11
01-04
05-09
0
1
ns
ns
Address valid to end of
write
tAW
01
02,03
04,05
06
07
08
85
75
50
30
25
20
16
09
1/ Unless otherwise specified, the AC test conditions are as follows:
Input pulse levels: V = 0 V and V = 3.0 V
IL
IH
Input rise and fall times: 5 nanoseconds
Input and output timing reference level: 1.5 V
Output loading: see Figure 7.
Unless otherwise specified, the DC test conditions are as follows:
V
= 0.3 V and V = V
- 0.3 V
IL
IH
CC
2/ Due to the nature of the 4 transistor design of the die used in these device types, topologically pure testing is important,
particularly for high reliability applications. The device manufacturer should be consulted concerning their testing
methods and algorithms.
3/ For device types 01 and 02, the maximum limit for data retention current is 200 A at +70 C.
4/ Parameters shall be tested as part of device characterization and after design and process change. Parameters shall be
guaranteed to the limits specified in table I for all lots not specifically tested.
SIZE
STANDARD
5962-92078
A
MICROCIRCUIT DRAWING
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
9
DSCC FORM 2234
APR 97
Case outline T.
Symbol
Millimeters
Inches
Min
Min
Max
5.13
Max
.202
A
b
3.56
0.41
.140
.016
0.51
.020
C
0.23
0.30
.009
.012
D
42.01
37.90
14.73
42.82
38.30
15.34
1.654
1.492
.580
1.686
1.508
.604
D1
E
e
2.54 BSC
.100 BSC
eA
L
14.99
3.18
0.48
15.49
4.90
1.19
.590
.125
.019
.610
.193
.047
Q
NOTES:
1. The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound
units shall rule.
2. Pin numbers are for reference only.
FIGURE 1. Case outline(s).
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
10
DSCC FORM 2234
APR 97
Case outline X.
Symbol
Millimeters
Inches
Min
Min
Max
5.08
Max
.200
.020
.055
.012
1.616
.588
A
b
3.68
0.41
.145
.016
.045
.009
1.584
.542
0.51
b2
C
1.14
1.40
0.30
0.23
D
40.23
13.77
41.05
14.17
E
e
2.54 BSC
.100 BSC
eA
L
14.99
3.18
0.64
0.13
15.49
1.52
.590
.125
.025
.005
.610
.060
Q
S1
NOTES:
1.The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound
units shall rule.
FIGURE 1. Case outline(s) - Continued.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
11
DSCC FORM 2234
APR 97
Case outline Y.
Symbol
Millimeters
Inches
Min
Max
Min
Max
A
b
C
D
E
3.35
1.14
0.23
40.23
13.81
17.91
4.29
1.40
0.30
41.05
14.12
18.42
.132
.045
.009
1.584
.544
.705
.169
.055
.012
1.616
.556
.725
HE
e
2.54 BSC
.100 BSC
eA
L
15.67
16.59
.617
.0425 TYP
.653
1.079 TYP
L1
L2
Q
1.02
0.698 TYP
0.08
1.27
.040
.0275 TYP
.003
.050
0.28
.011
R
R1
S1
1.02 TYP
0.508
0.13
.040 TYP
.020 TYP
.005
NOTES:
1.The U.S. preferred system of measurement is the metric SI. This item was designed using inch-pound units of
measurement. In case of problems involving conflicts between the metric and inch-pound units, the inch-pound
units shall rule.
FIGURE 1. Case outline(s) - Continued.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
12
DSCC FORM 2234
APR 97
Device
types
01-09
All
Device
types
01-09
All
Case
Case
outlines
outlines
Terminal
number
Terminal
symbol
Terminal
number
Terminal
symbol
1
2
A18
A16
A14
A12
A7
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I/O3
I/O4
I/O5
I/O6
I/O7
CS
3
4
5
6
A6
7
A5
A10
OE
8
A4
9
A3
A11
A9
10
11
12
13
14
15
16
A2
A1
A8
A0
A13
WE
A17
A15
VCC
I/O0
I/O1
I/O2
VSS
FIGURE 2. Terminal connections.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
13
DSCC FORM 2234
APR 97
CS
H
OE
X
WE
X
A0-A18
X
Mode
Data I/O
Device
Standby
Read
High Z
Data out
Data in
High Z
Standby
Active
Active
Active
L
L
L
L
X
H
H
L
Stable
Stable
Stable
Write
H
Out disable
NOTES:
1. H = VIH = High logic level
2. L = VIL = Low logic level
3. X = Do not care (either high or low)
4. High Z = High impedance state
FIGURE 3. Truth table.
FIGURE 4. Read cycle timing diagram.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
14
DSCC FORM 2234
APR 97
FIGURE 5. Write cycle timing diagram.
FIGURE 6. Block diagram.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
15
DSCC FORM 2234
APR 97
NOTES:
1. V is programmable from -2 V to +7 V. I
and IOH are programmable from 0 to 16 mA.
OL
Z
2. Tester impedance is Z = 75 ohms.
0
3. VZ is typically the midpoint of V and V , approximately 1.5 V.
OL
OH
4. C includes tester jig capacitance.
L
FIGURE 7. Output load circuit.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-92078
A
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
16
DSCC FORM 2234
APR 97
TABLE II. Electrical test requirements.
MIL-PRF-38534 test requirements
Subgroups
(in accordance with
MIL-PRF-38534, group
A test table)
Interim electrical parameters
Final electrical parameters
Group A test requirements
1,4,7,9
1*,2,3,4,7*,8A,8B,9,10, 11
1,2,3,4,7,8A,8B,9,10,11
1,2,3,4,7,8A,8B,9,10,11
Not applicable
Group C end-point electrical
parameters
End-point electrical parameters for
radiation hardness assurance
(RHA) devices
* PDA applies to subgroup 1 and 7.
4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition B. The test circuit shall be maintained by the manufacturer under document revision level control
and shall be made available to either DSCC-VA or the acquiring activity upon request. Also, the test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015 of MIL-STD-883.
(2) T as specified in accordance with table I of method 1015 of MIL-STD-883.
A
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Conformance and periodic inspections. Conformance inspection (CI) and periodic inspection (PI) shall be in accordance
with MIL-PRF-38534 and as specified herein.
4.3.1 Group A inspection (CI). Group A inspection shall be in accordance with MIL-PRF-38534 and as follows:
a. Tests shall be as specified in table II herein.
b. Subgroups 5 and 6 shall be omitted.
c. Subgroups 7, 8A, and 8B shall include verification of the truth table on figure 3.
4.3.2 Group B inspection (PI). Group B inspection shall be in accordance with MIL-PRF-38534.
SIZE
STANDARD
5962-92078
A
MICROCIRCUIT DRAWING
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
17
DSCC FORM 2234
APR 97
4.3.3 Group C inspection (PI). Group C inspection shall be in accordance with MIL-PRF-38534 and as follows:
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test, method 1005 of MIL-STD-883.
(1) Test condition B. The test circuit shall be maintained by the manufacturer under document revision level control
and shall be made available to either DSCC-VA or the acquiring activity upon request. Also, the test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1005 of MIL-STD-883.
(2) T as specified in accordance with table I of method 1005 of MIL-STD-883.
A
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.3.4 Group D inspection (PI). Group D inspection shall be in accordance with MIL-PRF-38534.
4.3.5 Radiation hardness assurance (RHA) insepction. RHA inspection is not currently applicable to this drawing.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38534.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated as specified in MIL-PRF-
38534.
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus when a system application
requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for
coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962)
should contact DSCC-VA, telephone (614) 692-0544.
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, P. O. Box 3990, Columbus, Ohio 43216-5000,
or telephone (614) 692-0512.
6.6 Sources of supply. Sources of supply are listed in MIL-HDBK-103 and QML-38534. The vendors listed in MIL-HDBK-
103 and QML-38534 have submitted a certificate of compliance (see 3.7 herein) to DSCC-VA and have agreed to this drawing.
SIZE
STANDARD
5962-92078
A
MICROCIRCUIT DRAWING
REVISION LEVEL
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
H
18
DSCC FORM 2234
APR 97
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 01-04-09
Approved sources of supply for SMD 5962-92078 are listed below for immediate acquisition information only and shall be
added to MIL-HDBK-103 and QML-38534 during the next revision. MIL-HDBK-103 and QML-38534 will be revised to include
the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has
been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and
QML-38534.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-9207801HTA
5962-9207801HTC
5962-9207801HXA
5962-9207801HXC
5962-9207801HYA
5962-9207801HYC
54230
54230
54230
54230
3/
WS512K8-120CQA
WS512K8-120CQ
WS512K8-120CQA
WS512K8-120CQ
WS512K8-120CLQA
WS512K8-120CLQ
3/
5962-9207802HTA
5962-9207802HTC
5962-9207802HXA
5962-9207802HXC
5962-9207802HYA
5962-9207802HYC
54230
54230
54230
54230
3/
WS512K8-100CQA
WS512K8-100CQ
WS512K8-100CQA
WS512K8-100CQ
WS512K8-100CLQA
WS512K8-100CLQ
3/
5962-9207803HTA
5962-9207803HTC
5962-9207803HXA
5962-9207803HXC
5962-9207803HYA
5962-9207803HYC
54230
54230
54230
54230
3/
WS512K8-85CQA
WS512K8-85CQ
WS512K8-85CQA
WS512K8-85CQ
WS512K8-85CLQA
WS512K8-85CLQ
3/
5962-9207804HTA
5962-9207804HTC
5962-9207804HXA
5962-9207804HXC
5962-9207804HYA
5962-9207804HYC
54230
54230
54230
54230
3/
WS512K8-70CQA
WS512K8-70CQ
WS512K8-70CQA
WS512K8-70CQ
WS512K8-70CLQA
WS512K8-70CLQ
3/
5962-9207805HTA
5962-9207805HTC
5962-9207805HXA
5962-9207805HXC
5962-9207805HYA
5962-9207805HYC
54230
54230
54230
54230
3/
WS512K8-55CQA
WS512K8-55CQ
WS512K8-55CQA
WS512K8-55CQ
WS512K8-CLQA
WS512K8-CLQ
3/
See footnotes at end of table.
1 of 2
STANDARD MICROCIRCUIT DRAWING BULLETIN - CONTINUED.
DATE: 01-04-09
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-9207806HTA
5962-9207806HTC
5962-9207806HXA
5962-9207806HXC
5962-9207806HYA
5962-9207806HYC
54230
54230
54230
54230
3/
WS512K8-45CQA
WS512K8-45CQ
WS512K8-45CQA
WS512K8-45CQ
WS512K8-45CLQA
WS512K8-45CLQ
3/
5962-9207807HTA
5962-9207807HTC
5962-9207807HXA
5962-9207807HXC
5962-9207807HYA
5962-9207807HYC
54230
54230
54230
54230
3/
WS512K8-35CQA
WS512K8-35CQ
WS512K8-35CQA
WS512K8-35CQ
WS512K8-35CLQA
WS512K8-35CLQ
3/
5962-9207808HTA
5962-9207808HTC
5962-9207808HXA
5962-9207808HXC
5962-9207808HYA
5962-9207808HYC
54230
54230
54230
54230
3/
WS512K8-25CQA
WS512K8-25CQ
WS512K8-25CQA
WS512K8-25CQ
WS512K8-25CLQA
WS512K8-25CLQ
3/
5962-9207809HTA
5962-9207809HTC
5962-9207809HXA
5962-9207809HXC
5962-9207809HYA
5962-9207809HYC
54230
54230
54230
54230
3/
WS512K8-20CQA
WS512K8-20CQ
WS512K8-20CQA
WS512K8-20CQ
WS512K8-20CLQA
WS512K8-20CLQ
3/
1/ The lead finish shown for each PIN, representing a hermetic package, is the most readily available from the
manufacturer listed for that part. If the desired lead finish is not listed contact the Vendor to determine availability.
2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance
requirements of this drawing.
3/ This part is no longer available.
Vendor CAGE
number
Vendor name
and address
54230
White Electronic Designs Corporation
3601 East University Drive
Phoenix, AZ 85034-7217
The information contained herein is disseminated for convenience only and the Government
assumes no liability whatsoever for any inaccuracies in this information bulletin.
2 of 2
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