5962-9760902HXX [WEDC]
Flash, 2MX8, 120ns, CDSO56, 0.520 INCH, HERMETIC SEALED, CERAMIC, SOP-56;
| 型号： | 5962-9760902HXX |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | Flash, 2MX8, 120ns, CDSO56, 0.520 INCH, HERMETIC SEALED, CERAMIC, SOP-56 CD |
| 文件： | 总14页 (文件大小：436K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WMF2M8-XXX5
White Electronic Designs
2Mx8 MONOLITHIC FLASH, SMD 5962-97609
FEATURES
ꢀ
ꢀ
Low Power CMOS
ꢀ
Access Times of 90, 120, 150ns
Data# Polling and Toggle Bit feature for detection of
program or erase cycle completion.
ꢀ
Packaging:
• 56 lead, Hermetic Ceramic, 0.520" CSOP
ꢀ
ꢀ
ꢀ
Supports reading or programming data to a sector
not being erased.
(Package 207). Fits standard 56 SSOP footprint.
• 44 pin Ceramic LCC**
RESET# pin resets internal state machine to the
read mode.
ꢀ
Sector Architecture
• 32 equal size sectors of 64KBytes each
Multiple Ground Pins for Low Noise Operation
• Any combination of sectors can be erased. Also
supports full chip erase.
* This data sheet describes a product that is subject to change without
notice.
ꢀ
ꢀ
ꢀ
100,000 Write/Erase Cycles Minimum
Organized as 2Mx8
** Package to be developed.
Note: For programming information refer to Flash Programming 16M5 Application Note.
Commercial, Industrial, and Military Temperature
Ranges
ꢀ
5V Read and Write. 5V ± 10% Supply.
Fig. 1 – Pin Configuration for WMF2M8-XXX5
56 CSOP
Top View
44 CLCC**
Top View
Pin Description
I/O0-7
A0-20
WE#
CS#
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Select
CS#
A12
A13
A14
A15
NC
1
2
3
4
5
6
7
8
56
NC
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
RESET#
A11
A10
A9
A1
A2
A3
A4
A5
A6
A7
GND
A8
VCC
NC
I/O1
NC
I/O0
A0
NC
NC
NC
44 43 42 41 40
5 4 3 2 1
6
7
8
9
39
38
37
36
35
34
33
32
31
30
29
A7
A6
A5
A16
A17
A18
A19
NC
NC
NC
A20
OE#
Output Enable
Power Supply
Ground
NC
NC
VCC
GND
10
11
12
13
14
15
16
17
A4
A20
A19
A18
A17
A16
VCC
GND
I/O6
NC
I/O7
NC
RY/BY#
OE#
WE#
NC
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NC
NC
NC
A3
A2
A1
RY/BY# Ready/Busy
RESET# Reset
WE#
OE#
RY/BY#
A0
18 19 20 21 22 23 24 25 26 27 28
NC
I/O5
NC
I/O4
VCC
I/O2
NC
I/O3
NC
GND
** Package to be developed.
May 2004
Rev. 6
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
CAPACITANCE
TA = +25°C
Parameter
Symbol Ratings
Unit
V
Parameter
Symbol
Conditions
I/O = 0 V, f = 1.0MHz 12 pF
IN = 0 V, f = 1.0MHz 12 pF
Max Unit
Voltage on Any Pin Relative to VSS
Power Dissipation
VT
PT
-2.0 to +7.0
8
Address Input capacitance
Output Enable capacitance
Write Enable capacitance
Chip Select capacitance
Data I/O capacitance
CAD
COE
V
W
V
Storage Temperature
TSTG -65 to +125 °C
IOS 100 mA
100,000 min cycles
20 years
CWE VIN = 0 V, f = 1.0MHz 12 pF
CCS VIN = 0 V, f = 1.0MHz 12 pF
CI/O VI/O = 0 V, f = 1.0MHz 12 pF
Short Circuit Output Current
Endurance - Write/Erase Cycles (Mil Temp)
Data Retention (Mil Temp)
This parameter is guaranteed by design but not tested.
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Symbol Min Typ
Max
5.5
Unit
V
Supply Voltage
VCC
VSS
VIH
VIL
TA
4.5
0
5.0
Ground
0
-
0
V
Input High Voltage
Input Low Voltage
Operating Temperature (Mil.)
Operating Temperature (Ind.)
2.0
-0.5
-55
-40
VCC + 0.5
+0.8
+125
+85
V
-
V
-
°C
°C
TA
-
DC CHARACTERISTICS — CMOS COMPATIBLE
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol Conditions
Min
Max
10
Unit
μA
μA
mA
mA
mA
V
Input Leakage Current
Output Leakage Current
VCC Active Current for Read (1)
ILI
VCC = 5.5, VIN = GND to VCC
VCC = 5.5, VIN = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz
CS# = VIL, OE# = VIH
ILO
10
ICC1
ICC2
ICC3
VOL
VOH
VLKO
40
VCC Active Current for Program or Erase (2)
CC Standby Current
60
V
VCC = 5.5, CS# = VIH, f = 5MHz, RESET# = Vcc ± 0.3V
IOL = 12.0 mA, VCC = 4.5
2.0
0.45
Output Low Voltage
Output High Voltage
Low VCC Lock-Out Voltage
IOH = -2.5 mA, VCC = 4.5
0.85xVCC
3.2
V
4.2
V
NOTES:
1. The Icc current listed includes both the DC operating current and the frequency
dependent component (@ 5MHz). The frequency component typically is less than
2mA/MHz, with OE# at VIH
.
2. Icc active while Embedded Algorithm (program or erase) is in progress.
3. DC test conditions VIL = 0.3V, VIH = VCC - 0.3V
May 2004
Rev. 6
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS – WE# CONTROLLED
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-90
-120
-150
Unit
Min
90
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tWC
tCS
tWP
tAS
ns
ns
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
tELWL
tWLWH
tAVWL
45
0
50
0
50
0
ns
ns
Data Setup Time
tDVWH
tWHDX
tWLAX
tWHWL
tWHWH1
tWHWH2
tGHWL
tVCS
tDS
45
0
50
0
50
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
45
20
50
20
50
20
ns
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase (2)
tWPH
ns
300
15
300
15
300
15
μs
sec
μs
μs
sec
sec
ns
Read Recovery Time before Write
VCC Setup Time
0
0
0
50
50
50
Chip Programming Time
Chip Erase Time (3)
44
44
44
256
256
256
Output Enable Hold Time (4)
RESET# Pulse Width
tOEH
tRP
10
10
10
500
500
500
ns
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
AC CHARACTERISTICS – READ-ONLY OPERATIONS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-90
-120
-150
Unit
Min
Max
Min
Max
Min
Max
Read Cycle Time
tAVAV
tRC
tACC
tCE
90
120
150
ns
ns
ns
ns
ns
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Output Enable Hold Time
tAVQV
tELQV
tGLQV
90
90
40
120
120
50
150
150
55
tOE
Read
0
0
0
Toggle &
tOEH
10
10
10
ns
Data Polling
tEHQZ
Chip Select High to Output High Z (1)
Output Enable High to Output High Z (1)
tDF
tDF
tOH
20
20
30
30
35
35
ns
ns
ns
tGHQZ
Output Hold from Addresses, CS# or OE# Change,
whichever is First
tAXQX
0
0
0
RESET# Low to Read Mode (1)
1. Guaranteed by design, not tested.
tReady
20
20
20
μs
May 2004
Rev. 6
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED
VCC = 5.0V, VSS = 0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-90
-120
-150
Unit
Min
90
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tWLEL
tELEH
tWC
tWS
tCP
ns
ns
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
45
0
50
0
50
0
ns
tAVEL
tAS
ns
Data Setup Time
tDVEH
tEHDX
tELAX
tDS
45
0
50
0
50
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
45
20
50
20
50
20
ns
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time
tEHEL
tCPH
ns
tWHWH1
tWHWH2
tGHEL
300
15
300
15
300
15
μs
sec
μs
sec
sec
ns
0
0
0
Chip Programming Time
Chip Erase Time (3)
44
44
44
256
256
256
Output Enable Hold Time (4)
tOEH
10
10
10
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
FIGURE 2 – AC TEST CIRCUIT
AC Test Conditions
Parameter
Typ
Unit
V
IOL
Current Source
Input Pulse Levels
Input Rise and Fall
VIL = 0, VIH = 3.0
5
ns
V
Input and Output Reference Level
1.5
1.5
VZ = 1.5V
(Bipolar Supply)
Output Timing Reference Level
V
D.U.T.
Ceff = 50 pf
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
.
IOL
Current Source
HARDWARE RESET (RESET#)
Parameter
Std
tREADY
tREADY
tRP
Description
Test Setup
Max
All Speed Options
Unit
RESET Pin Low (During Embedded Algorithms) to Read or Write (See Note)
RESET Pin Low (Not During Embedded Algorithms) to Read or Write (See Note)
RESET Pulse Width
20
500
500
50
μs
ns
ns
ns
ns
Max
Min
tRH
RESET High Time Before Read (See Note)
Min
tRB
RY/BY Recovery Time
Min
0
May 2004
Rev. 6
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIGURE 3 – RESET# TIMING
RY/BY#
CS#, OE#
t
RH
RESET#
t
RP
t
Ready
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
t
Ready
RY/BY#
t
RB
CS#, OE#
RESET#
t
RP
May 2004
Rev. 6
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIGURE 4 – AC WAVEFORMS FOR READ OPERATIONS
t
RC
Addresses Stable
Addresses
CS#
t
ACC
t
DF
t
OE
OE#
WE#
t
OEH
t
CE
t
OH
HIGH Z
HIGH Z
Output Valid
Outputs
RESET#
RY/BY#
0 V
May 2004
Rev. 6
6
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIGURE 5 – WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED
Read Status Data (last two cycles)
Program Command Sequence (last two cycles)
t
t
AS
WC
Addresses
PA
PA
555h
PA
t
AH
CS#
OE#
t
CH
t
t
WHWH1
WP
WE#
t
WPH
t
CS
t
DS
t
DH
D
PD
A0h
OUT
Status
Data
t
t
BUSY
RB
RY/BY#
t
VCS
V
CC
Notes:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device.
4. Dout is the output of the data written to the device.
5. Figure indicates last two bus cycles of a four bus cycle sequence.
May 2004
Rev. 6
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIGURE 6 – AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS
t
t
WC
2AAh
AS
SA
555h for chip erase
VA
VA
Addresses
CS#
t
AH
t
CH
OE#
WE#
tWP
t
t
WHWH2
WPH
t
tC
CS
t
DS
t
DH
In
Data
Complete
55h
30h
Progress
10 for CHip Erase
t
t
BUSY
RB
RY/BY#
t
VCS
V
CC
Notes: SA is the sector address for Sector Erase.
May 2004
Rev. 6
8
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIG. 7 – AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALIGORITHM OPERATIONS
t
RC
Addresses
CS#
VA
VA
VA
t
ACC
t
CE
t
CH
t
OE
OE#
WE#
t
t
DF
OEH
t
OH
High Z
High Z
DQ7
Valid Data
Valid Data
Complement
True
Complement
DQ0-DQ6
True
Status Data
Status Data
t
BUSY
RY/BY#
Notes: VA = Valid Address. Illustration shows first status cycle after command sequence, last status read cycle and array data read cycle.
May 2004
Rev. 6
9
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIGURE 8 – ALTERNATE CS# CONTROLLED PROGRAMMING OPERATION TIMINGS
XXX for program PA for program
SA for sector erase
XXX for chip erase
XXX for erase
Data Polling
PA
Addresses
t
t
WC
AS
tAH
t
WH
WE#
OE#
t
GHEL
t
WHWH1 or 2
t
CP
CS#
Data
t
t
WS
CPH
t
BUSY
t
DS
t
DH
D
DQ7
OUT
t
RH
AO for program
55 for erase
PD for program
30 for sector erase
10 for chip erase
RESET#
RY/BY#
Notes:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device.
4. Dout is the output of the data written to the device.
5. Figure indicates last two bus cycles of a four bus cycle sequence.
May 2004
Rev. 6
10
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIGURE 9 – TOGGLE BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
t
RC
Addresses
CS#
VA
VA
VA
VA
t
ACC
t
CE
t
CH
t
OE
OE#
WE#
t
t
DF
OEH
t
OH
High Z
DQ6-DQ2
RY/BY#
Valid Status
Valid Status
Valid Status
(first read)
Valid Data
(second read)
(stops toggling)
t
BUSY
Notes:
VA = Valid address; not required for DQ6. Illustration shows first two status cycle after
command sequence, last status read cycle and array data read cycle.
May 2004
Rev. 6
11
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
FIGURE 10 – DQ2 VS. DQ6
Enter
Embedded
Erasing
Enter
Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
WE#
Erase
Complete
Erase Suspend
Read
Erase
Erase
Erase
Erase Suspend
Read
Suspend
Program
DQ6
DQ2
Note:
The system may use OE# or CS# to toggle DQ2 and DQ6. DQ6 toggles only when read
at an address within the erase-suspended sector.
TEMPORARY SECTOR UNPROTECTED
Parameter
Std
tVIDR
tRSP
Description
All Speed Options
Unit
ns
VID Rise and Fall time (see notes)
Min
Min
500
4
RESET# setup time for temporary sector unprotect
ms
Note:
Not 100% tested.
FIGURE 11 – TEMPORARY SECTOR GROUP UNPROTECTED TIMINGS
12V
RESET#
0 or 5V
0 or 5V
t
t
VIDR
VIDR
Program or Erase Command Sequence
CS#
WE#
t
RSP
RY/BY#
May 2004
Rev. 6
12
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
PACKAGE 207: 56 LEAD, CERAMIC SOP
23.63 (0.930) 0.25 (0.010)
21.59 (0.850) TYP
0.18 (0.007)
0.05 (0.002)
2.87 (0.113)
MAX
1.02 (0.040)
0.18 (0.007)
12.96 (0.510)
0.15 (0.006)
16.13 (0.635)
0.13 (0.005)
1.60 (0.063) TYP
0.51 (0.020) TYP
+
+
PIN 1
IDENTIFIER
0.25 (0.010)
0.05 (0.002)
R = 0.18 (0.007) TYP
0.80 (0.031) TYP
0
/ -4
4.06 (0.160)
MAX
SEE DETAIL "A"
DETAIL "A"
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE DIMENSION: 44 LEAD, CERAMIC LCC**
12.70 (0.500) TYP
1.27 (0.050)
TYP
12.70 (0.500)
TYP
0.53 (0.021)
0.74 (0.029)
PIN 1
1.14 (0.045)
1.40 (0.055)
16.26 (0.640)
16.67 (0.660)
3.05 (0.120)
MAX
16.26 (0.640)
16.67 (0.660)
PIN 1 IDENTIFIER
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
** Package to be developed.
May 2004
Rev. 6
13
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WMF2M8-XXX5
White Electronic Designs
ORDERING INFORMATION
W M F 2M 8 - XXX X X 5 X
LEAD FINISH:
Blank
A
=
=
Gold plated leads
Solder dip leads
VPP PROGRAMMING VOLTAGE
5 = 5V
DEVICE GRADE:
M
I
C
=
=
=
Military, 883 Screened
Industrial
Commercial
-55°C to +125°C
-40°C to +85°C
0°C to +70°C
PACKAGE TYPE:
DA
L
=
=
56 Lead CSOP (Package 207) fits standard 56 SSOP footprint
44 Lead Ceramic LCC*
ACCESS TIME (ns)
ORGANIZATION, 2M x 8
Flash
MONOLITHIC
WHITE ELECTRONIC DESIGNS CORP.
* Package to be developed.
Device Type
Sector Size
64KByte
Speed
150ns
120ns
90ns
Package
SMD No.
2M x 8 Flash Monolithic
2M x 8 Flash Monolithic
2M x 8 Flash Monolithic
56 lead CSOP (DA)
56 lead CSOP (DA)
56 lead CSOP (DA)
5962-97609 01HXX
5962-97609 02HXX
5962-97609 03HXX
64KByte
64KByte
May 2004
Rev. 6
14
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
相关型号：
5962-9761001HXX
Flash Module, 2MX16, 150ns, CDSO56, 0.520 INCH, HERMETIC SEALED, CERAMIC, SOP-56
WEDC
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