7P512FLG0201I15 [WEDC]
Flash Card, 256KX16, 150ns, CARD-68;型号: | 7P512FLG0201I15 |
厂家: | WHITE ELECTRONIC DESIGNS CORPORATION |
描述: | Flash Card, 256KX16, 150ns, CARD-68 内存集成电路 |
文件: | 总11页 (文件大小:344K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
PCMCIA Flash Memory Card - 256 KILOBYTE through
5 MEGABYTE (Intel/Catalyst based)
GENERAL DESCRIPTION
ARCHITECTURE OVERVIEW
WEDC’s FLG Series Flash memory cards offer low/medium
density linear Flash solid state storage solutions for code
and data storage, high performance disk emulation and
execute in place (XIP) applications in mobile PC and
dedicated (embedded) equipment.
WEDC’s FLG series is designed to support from 2 to
20, 1Mb or 2MB components, providing a wide range of
density options. Cards are based on the 28F010 (1Mb)
or 28F020 components which work with 5V VCC/12V VPP
applications. Device codes are B4h and BDh respectively
(Manufacture ID 89 for Intel and 31 for Catalyst). Systems
should be able to recognize all the codes. Cards utilizing
the1Mb components provide densities ranging from
256KB to 2.5MB in 256KB increments, cards utilizing 2Mb
components provide densities ranging from 512KB to 5MB
in 512KB increments.
FLG series cards conform to PCMCIA international
standard.
The card’s control logic provides the system interface
and controls the internal Flash memories. Card can be
read/written in byte-wide or word-wide mode which allows
for flexible integration into various systems. Combined
with file management software, such as Flash Translation
Layer (FTL), FLG Flash cards provide removable high-
performance disk emulation.
In support of the PC Card 95 standard for word wide access
devices are paired. Write, read and erase operations can
be performed as either a word or byte wide operation .
By multiplexing A0, CE1 and CE2, 8-bit hosts can access
all data on data lines DQ0 - DQ7. The FLG series cards
conform to the PC Card Standard (PCMCIA) and JEIDA,
providing electrical and physical compatibility. The PC
Card form factor offers an industry standard pinout and
mechanical outline, allowing density upgrades without
system design changes.
The FLG series cards contain separate 2kB EEPROM
memory for Card Information Structure (CIS) which can be
used for easy identification of card characteristics.
The WEDC FLG series is based on Intel/Catalyst 28F010
or 28F020 Flash memories.
Note: Standard options include attribute memory. Cards
without attribute memory are available. Cards are also
available with or without a hardware write protect switch.
WEDC’s standard cards are shipped with WEDC’s Logo.
Cards are also available with blank housings (no Logo).
The blank housings are available in both a recessed
(for label) and flat housing. Please contact WEDC
sales representative for further information on Custom
artwork.
FEATURES
Low cost Low/Medium Density Linear Flash Card
Supports 5V systems with 12V VPP.
Based on Intel CMOS Components
Fast Read Performance - 150ns Maximum Access
Time
x8/ x16 Data Interface
Quick-Pulse Programming Algorithm - typical 10µs
Byte-Program
100,000 Erase/Program Cycles
PC Card Standard Type I Form Factor
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
BLOCK DIAGRAM
Vcc
Vpp2
Vpp1
Device Pair 9
Device 19
Device 18
CSH9
CSL9
Array Address
A1-A17(18)
Bus
ADDRESS
BUFFER
ADDRESS BUS
A1-A21(22)
Control
Address
Bus
Vcc
WE#
OE#
CSH9
CSH0
C9
High
Control Logic
PCMCIA
Interface
C0
CE2#
CE1#
Device Pair 1
C9
Low
C0
CSL9
CSL0
REG#
A0
WP
Device 3
Device 1
Device 2
Device 0
CSH1
CSH0
Ctrl Att enable
CSL1
CSL0
Device Pair 0
Vcc
Attrib. Mem
CIS
EEPROM 2kB
WR#
RD#
Q0-Q7
DATA
BUS
Q8-Q15
DATA
BUS
Q0-Q7
control
Vcc
I/O buffer
DATA
BUS
D0-D7
DATA
BUS
D8-D15
SUPPORTED COMPONENTS (max 20 X):
28F010-max 2.5MB
Device type
Manuf ID
Intel/Catalyst
Device ID
28F010
28F020
89H / 31H
89H / 31H
B4H
28F020-max 5MB
BDH
CD1#
CD2#
GND
WAIT#
BVD1
BVD2
Vcc
Vcc
VS1
VS2
open
open
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
PINOUT
Pin
1
Signal name
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
I/O
Function
Ground
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal name
GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
I/O
Function
Ground
Active
2
I/O
Data bit 3
O
I/O
I/O
I/O
I/O
I
Card Detect 1
Data bit 11
LOW
3
I/O
Data bit 4
4
I/O
Data bit 5
Data bit 12
5
I/O
Data bit 6
Data bit 13
6
I/O
Data bit 7
Data bit 14
7
I
I
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
LOW
LOW
Data bit 15
8
I
Card Enable 2
Voltage Sense 1
Reserved
LOW
N.C.
9
I
O
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
I
RFU
A9
I
RFU
Reserved
A8
I
A17
I
I
I
I
I
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
Prog. Voltage
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
Card Reset
256KB(2)
512KB(2)
1MB(2)
A13
A14
WE#
RDY/BSY#
VCC
I
A18
I
A19
I
LOW
N.C.
A20
2MB(2)
O
A21
4MB(2,3)
VCC
VPP1
A16
A15
A12
A7
VPP2
A22
I
I
I
8MB(2,3)
N.C.
I
A23
I
A24
I
N.C.
I
A25
I
N.C.
A6
I
VS2
O
I
N.C.
A5
I
RST
N.C.
A4
I
I
Wait#
RFU
O
Extended Bus cycle
Reserved
LOW(1)
A3
A2
I
REG#
BVD2
BVD1
DQ8
I
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
A1
I
O
(1)
(1)
A0
I
O
DQ0
DQ1
DQ2
WP
I/O
I/O
I/O
O
I/O
I/O
O
Data bit 1
DQ9
Data bit 9
Data bit 2
DQ10
CD2#
GND
Data bit 10
Write Potect
Ground
HIGH
O
Card Detect 2
Ground
LOW
GND
Notes:
1.
2.
3.
WAIT#, BVD1 and BVD2 are driven high for compatibility
Shows density for which specified address bit is MSB. Higher order address bits are no connects (i.e. 4MB A21 is MSB A22 - A25 are NC).
For the 3MB card the memory will wrap at the 4MB boundary, for the 5MB card the memory will wrap at the 8MB boundary.
MECHANICAL
Interconnect area
1.6mm 0.05
10.0mm MIN
3.0mm MIN
(0.063”)
(0.400”)
1.0mm 0.05
(0.039”)
Substrate area
54.0mm 0.10
(2.126”)
85.6mm 0.20
(3.370”)
1.0mm 0.05
(0.039”)
10.0mm MIN
(0.400”)
3.3mm T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
CARD SIGNAL DESCRIPTION
Symbol
Type
Name and Function
A0 - A25
INPUT
ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not used in
word access mode. The memory will wrap at the card density boundary (see PINOUT, note 3). The system should not try to
access memory beyond the card density. A25 is the most significant bit. A23 - A25 are not connected.
DQ0 - DQ15
CE1#, CE2#
INPUT/OUTPUT
INPUT
DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ0 - Dq7 constitute the lower (even) byte
and DQ8 - DQ15 the upper (odd) byte. DQ15 is the MSB.
CARD ENABLE 1 AND 2: CE1 enables even byte accesses, CE2 enables odd byte accesses. Multiplexing A0, CE1 and CE2
allows 8-bit hosts to access all data on DQ0 - DQ7.
OE#
WE#
INPUT
INPUT
N.C.
OUTPUT ENABLE: Active low signal gating read data from the memory card.
WRITE ENABLE: Active low signal gating write data to the memory card.
RDY/BSY#
READY/BUSY OUTPUT: Indicates status of internally timed erase or program algorithms. This signal is not
connected.
CD1#, CD2#
WP
OUTPUT
OUTPUT
CARD DETECT 1 and 2: Provide card insertion detection. These signals are connected to ground internally on the memory
card. The host shall monitor these signals to detect card insertion (pulled-up on host side).
WRITE PROTECT: Write protect reflects the status of the Write Protect switch on the memory card. WP set to high = write
protected, providing internal hardware write lockout to the Flash array.If card does not include optional write protect switch, this
signal will be pulled low internally indicating write protect = “off”.
VPP1
VPP2
VCC
PROGRAM/ERASE POWER SUPPLY: Provides programming voltages 12.0V for lower byte (D0 - D7) memory components.
PROGRAM/ERASE POWER SUPPLY: Provides programming voltages 12.0V for lower byte (D8 - D15) memory components.
CARD POWER SUPPLY: 5.0V
GND
CARD GROUND
REG#
INPUT
ATTRIBUTE MEMORY SELECT : Active low signal, enables access to Attribute Memory Plane, occupied
by Card Information Structure and Card Registers.
RST#
WAIT#
N.C.
RESET: Active high signal for placing card in Power-on default state. This signal is not connected.
WAIT: This signal is pulled high internally for compatibility. No wait states are generated.
BATTERY VOLTAGE DETECT: These signals are pulled high to maintain SRAM card compatibility.
OUTPUT
OUTPUT
OUTPUT
BVD1, BVD2
VS1, VS2
VOLTAGE SENSE: Notifies the host socket of the card’s VCC requirements. VS1 and VS2 are open to indicate a 5V card has
been inserted.
RFU
RESERVED FOR FUTURE USE
N.C.
NO INTERNAL CONNECTION TO CARD: pin may be driven or left floating
FUNCTIONAL TRUTH TABLE
READ function
Common Memory
Attribute Memory
Function Mode
CE2# CE1# A0 OE# WE#
REG#
D15-D8
High-Z
High-Z
High-Z
D7-D0
High-Z
REG#
D15-D8
High-Z
D7-D0
High-Z
Standby Mode
H
H
H
L
H
L
X
L
X
L
L
L
L
X
H
H
H
H
X
H
H
H
H
X
L
L
L
L
Byte Access (8 bits)
Even-Byte
Odd-Byte
High-Z
Even-Byte
Not Valid
Even-Byte
High-Z
L
H
X
X
High-Z
Word Access (16 bits)
Odd-Byte Only Access
L
Odd-Byte Even-Byte
Not Valid
Not Valid
L
H
Odd-Byte
High-Z
WRITE function*
Standby Mode
H
H
H
L
H
L
X
L
X
H
H
H
H
X
L
L
L
L
X
H
H
H
H
X
X
X
L
L
L
L
X
X
X
X
X
X
X
Even-Byte
Odd-Byte
Even-Byte
X
Even-Byte
Byte Access (8 bits)
X
X
Even-Byte
X
L
H
X
X
Odd-Byte
Odd-Byte
Word Access (16 bits)
Odd-Byte Only Access
L
L
H
* Require proper programming voltages (Vpp1, Vpp2). Program or Erase with an invalid Vpp should not be attempted.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS(2)
Operating Temperature TA (ambient)
Commercial
0°C to +60 °C
Industrial
-40°C to +85 °C
Storage Temperature
Commercial
-30°C to +80 °C
-40°C to +85 °C
-0.5V to VCC+0.5V
-0.5V to +7.0V
Industrial
Voltage on any pin relative to VSS
VCC supply Voltage relative to VSS
Note: Stress greater than those listed under “Absolute Maximum ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation at these or any other conditions greater than
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
DC CHARACTERISTICS(1)
Sym
ICCR
ICCW
IPPW
ICCE
IPPE
Parameter
Density
All
Notes
Typ(4)
10
Max
Units
mA
mA
mA
mA
mA
µA
Test Conditions
VCC Read Current
VCC Program Current
VCC Program Current
VCC Erase Current
VPP Erase Current
VCC Standby Current
30
VCC = VCC max tcycle = 150ns, CMOS levels
Programming in Progress
All
VPP = 12V
VPP = 12V
VPP = 12V
VPP = 12V
1.0
8.0
5.0
10
10
All
30
VPP=VPPH Programming in Progress
Erasure in Progress
All
15
All
30
VPP=VPPH Erasure in Progress
ICCS
(CMOS)
256KB
512KB
1MB
2MB
3MB
4MB
5MB
VCC = VCCmax
Control Signals = VCC
CMOS levels
100
CMOS TEST Conditions: VCC = 5V ± 5%, VIL = VSS ± 0.2V, VIH = VCC ± 0.2V
Notes:
1.
2.
3.
All currents are RMS values unless otherwise specified. ICCR, ICCW and ICCE are based on Byte wide operations. For 16 bit operation values are double
Control Signals: CE1#, CE2#, OE#, WE#, REG#.
Typical: VCC = 5V, T = +25°C.
Symbol
Parameter
Notes
Min
Max
Units
Test Conditions
ILI
Input Leakage Current
1
±10
µA
VCC = VCCMAX
VIN =VCC or VSS
ILO
Output Leakage Current
1
±10
µA
VCC = VCCMAX
VOUT =VCC or VSS
VIIL
VIH
Input Low Voltage
Input High Voltage
1
1
1
1
1
0
0.8
VCC+0.5
0.4
V
V
V
V
V
0.7VCC
VOL
VOH
VLKO
Output Low Voltage
IOL = 3.2mA
IOH = -2.0mA
Output High Voltage
VCC-0.4
2.5
VCC
VCC Erase/Program Lock Voltage
Notes:
1. Values are the same for byte and word wide modes for all card densities.
2. Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 µA when VIN = GND due to internal pull-up resistors.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
AC CHARACTERISTICS
Read Timing Parameters
150ns
200ns
SYM (PCMCIA)
Parameter
Unit
Min
Max
Min
Max
tC(R)
ta(A)
Read Cycle Time
Address Access Time
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
150
150
75
20
0
200
200
200
100
20
0
ta(CE)
ta(OE)
tsu(A)
Card Enable Access Time
Output Enable Access Time
Address Setup Time
tsu(CE)
th(A)
Card Enable Setup Time
Address Hold Time
20
20
0
20
20
0
th(CE)
tv(A)
Card Enable Hold Time
Output Hold from Address Change
Output Disable Time from CE#
Output Disable Time from OE#
Output Enable Time from CE#
Output Enable Time from OE#
tdis(CE)
tdis(OE)
ten(CE)
ten(OE)
60
60
60
60
5
5
5
5
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
READ TIMING DIAGRAM
tC(R)
tH(A)
tA(A)
A[25::0], REG#
tV(A)
tA(CE)
tSU(CE)
CE1#, CE2#
NOTE 1
NOTE 1
tH(CE)
tA(OE)
tSU(A)
tDIS(CE)
OE#
tEN(OE)
tDIS(OE)
D[15::0]
DATA VALID
Note: Signal may be high or low in this area.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
WRITE TIMING PARAMETERS
150ns
200ns
SYM (PCMCIA)
Parameter
Unit
Min
150
80
Max
Min
200
120
20
Max
tCW
tw(WE)
Write Cycle Time
Write Pulse Width
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tsu(A)
Address Setup Time
20
tsu(A-WEH)
tsu(CE-WEH)
tsu(D-WEH)
th(D)
Address Setup Time for WE#
Card Enable Setup Time for WE#
Data Setup Time for WE#
Data Hold Time
100
100
50
100
100
50
20
20
trec(WE)
tdis(WE)
tdis(OE)
Write Recover Time
20
20
Output Disable Time from WE#
Output Disable Time from OE#
Output Enable Time from WE#
Output Enable Time from OE#
Output Enable Setup from WE#
Output Enable Hold from WE#
Card Enable Setup Time from OE#
Card Enable Hold Time
60
60
60
60
ten(WE)
5
5
5
5
ten(OE)
tsu(OE-WE)
th(OE-WE)
tsu(CE)
10
10
0
10
10
0
th(CE)
20
20
Note: AC timing diagrams and characteristics are guaranteed to meet or exceed PCMCIA 2.1 specifications.
WRITE TIMING DIAGRAM
tC(W)
A[25::0], REG#
t
SU(A-WEH)
SU(CE-WEH)
SU(CE)
tREC(WE)
tH(CE)
t
t
CE1#, CE2#
NOTE 1
NOTE 1
OE#
tH(OE-WE)
tSU(A)
tW(WE)
WE#
tH(D)
tSU(OE-WE)
tSU(D-WEH)
NOTE 2
D[15::0](DIN
)
DATA INPUT
tDIS(WE)
tEN(OE)
tDIS(OE)
tEN(WE)
NOTE 2
D[15::0](DOUT
)
Notes: 1. Signal may be high or low in this area.
2. When the data I/O pins are in the output state, no signals shall be applied to the data pins (D15 - D0) by the host system.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
Data Write and Erase Performance(1,3)
VCC = 5V ± 5%, TA = 0°C to + 60°C
Parameter
Notes
Min
Typ(1)
Max
12.5
25
Units
28F010 1,2,4
28F020 1,2,4
28F010 1,3,4
28F020 1,3,4
2
4
1
2
Chip Program Time
sec
10
Chip Erase Time
sec
30
Notes:
1.
2.
Typical: Nominal voltages and TA = 25ºC.
Minimum byte programming time excluding system overhead is 16 µs (10µs program + 6µs write recovery), while maximum is 400µs/byte (16 µs x 25 loops allowed by
algorithm). Max chip programming time is specified lower than the worst case allowed by the programming algorithm since most bytes program significantly faster than the worst
case byte.
3.
4.
Excludes 00H Programming prior to Erasure.
Excludes System-Level Overhead.
CIS INFORMATION FOR FLD SERIES CARDS
ADDRESS
VALUE
01H
DESCRIPTION
CISTPL_DEVICE
TPL_LINK
ADDRESS
VALUE
00H
00H
15H
47H
04H
01H
45H
44H
49H
37H
50H
DESCRIPTION
00H
02H
04H
34H
LSB: Number Not Assigned
03H
36H
MSB: Number Not Assigned
53H
52H
FLASH = 150ns (device writable)
FLASH = 200ns (device writable)
38H
CISTPL_VERS1
3AH
3CH
3EH
40H
TPL_LINK
06H
0CH
05H
0DH
06H
2DH
0EH
4DH
CARD SIZE: 256KB
TPLLV1_MAJOR
512KB
1MB
2MB
3MB
4MB
5MB
TPLLV1_MINOR
E
D
I
42H
44H
46H
7
P
08H
0AH
0CH
0EH
10H
FFH
18H
02H
89H
END OF DEVICE
CISTPL_JEDEC_C
TPL_LINK
48H
4AH
4CH
4EH
32H
35H
36H
2
5
6
INTEL - ID
B4H
BDH
INTEL
INTEL
28F010 - ID
28F020 - ID
35H
31H
32H
5
1
2
12H
14H
16H
18H
1AH
1CH
1EH
20H
22H
24H
26H
28H
2AH
17H
03H
42H
01H
FFH
1EH
06H
02H
11H
01H
01H
01H
01H
CISTPL_DEVICE_A
TPL_LINK
30H
30H
31H
0
0
1
EEPROM - 200ns
Device Size = 2KBytes
END OF TUPLE
CISTPL_DEVICEGEO
TPL_LINK
30H
30H
32H
0
0
2
30H
30H
33H
0
0
3
DGTPL_BUS
DGTPL_EBS
DGTPL_RBS
30H
30H
34H
0
0
4
DGTPL_WBS
DGTPL_PART
30H
30H
35H
0
0
5
FLASH DEVICE
NON-INTERLEAVED
2CH
2EH
30H
32H
20H
04H
F6H
01H
CISTPL_MANFID
TPL_LINK(04H)
50H
52H
54H
46H
4CH
47H
F
L
EDI TPLMID_MANF: LSB
EDI TPLMID_MANF: MSB
G
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
CIS INFORMATION FOR FLD SERIES CARDS (CONT.)
ADDRESS
56H
VALUE
30H
32H
30H
36H
2DH
2DH
2DH
31H
35H
20H
00H
43H
4FH
50H
59H
52H
49H
47H
48H
54H
20H
45H
4CH
45H
43H
54H
52H
4FH
4EH
49H
43H
DESCRIPTION
ADDRESS
90H
VALUE
20H
44H
45H
53E
49H
47H
4EH
53H
20H
49H
4EH
43H
4FH
52H
50H
4FH
52H
41H
54H
45H
44H
20H
00H
31H
39H
39H
37H
00H
FFH
FFH
00H
DESCRIPTION
0
SPACE
58H
2
92H
D
0
94H
E
6
96H
S
5AH
5CH
5EH
60H
62H
64H
66H
68H
6AH
6CH
6EH
70H
72H
74H
76H
78H
7AH
7CH
7EH
80H
82H
84H
86H
88H
8AH
8CH
8EH
-
98H
I
-
9AH
9CH
9EH
A0H
A2H
A4H
A6H
A8H
AAH
ACH
AEH
B0H
B2H
B4H
B6H
B8H
BAH
BCH
BEH
C0H
C2H
C4H
C6H
C8H
CAH
DCH
G
-
N
1
S
5
SPACE
SPACE
I
END TEXT
N
C
C
O
O
P
R
Y
P
R
O
I
R
G
A
H
T
T
E
SPACE
D
E
L
SPACE
END TEXT
E
C
T
R
O
N
I
1
9
9
7
END TEXT
END OF LIST
CISTPL_END
INVALID ADDRESS
C
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
9
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
PRODUCT MARKING
EDI
WED 7P001FLG0200C15 C995 9915
Company Name
Part Number
Lot code/trace number
Date code
PART NUMBERING
7 P 001 FLG02 00 C 15
CARD TECHNOLOGY
7
8
FLASH
SRAM
PC CARD
P
R
Standard PCMCIA
Ruggedized PCMCIA
CARD CAPACITY
001
1MB
CARD FAMILY AND VERSION
- See Card Family and Version Info. for details (next page)
PACKAGING OPTION
00
Standard, type 1
TEMPERATURE RANGE
C
I
=
=
Commercial
Industrial
0°C to +70°C
-40°C to +85°C
CARD ACCESS TIME
15
20
150ns
200ns
The shaded area (addresses 56H 58H) represents just some of the family versions. For all the versions see the Card Family and Version information.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
10
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PCMCIA Flash Memory Card
FLG Series
White Electronic Designs
CARD FAMILY AND VERSION INFORMATION
FLG 01-FLG04 Intel*
Based on 28F010
FLG 11-FLG14 Catalyst
FLG11 No Attribute memory, no Write Protect
FLG12 With Attribute Memory, no Write Protect
FLG13 No Attribute memory, with Write Protect
FLG14 With Attribute Memory, with Write Protect
Example P/N 7P XXX FLG 12 SS T ZZ
FLG 05-FLG08 Intel*
FLG 15-FLG18 Catalyst
FLG15 No Attribute memory, no Write Protect
Based on 28F020
FLG16 With Attribute Memory, no Write Protect
FLG17 No Attribute memory, with Write Protect
FLG18 With Attribute Memory, with Write Protect
Example P/N 7P XXX FLG 06 SS T ZZ
*discontinued – memory components not available
ORDERING INFORMATION
7P XXX FLGYY SS T ZZ
XXX
2561)
512
256KB
512KB
1MB
001
002
2MB
0032)
0042)
0052)
3MB
4MB
5MB
1) availalbe only with 28F010
2) availalbe only with 28F020
FLGYY
SS
Card version (see card family and version information)
00
01
02
WEDC Silkscreen
Blank Housing, Type I
Blank Housing, Type I Recessed
T
C
=
Commercial
I**
=
Industrial
ZZ
15
20
150ns
200ns
Notes: Options with intermediate memory capacities, without attribute memory and with hardware write protect switch are
available.
** Denotes advanced information.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
11
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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