EDI8F32259C [WEDC]
256Kx32 STATIC RAM CMOS, HIGH SPEED MODULE; 256Kx32静态RAM CMOS ，高速模块
| 型号： | EDI8F32259C |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | 256Kx32 STATIC RAM CMOS, HIGH SPEED MODULE |
| 文件： | 总8页 (文件大小：260K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EDI8F32259C
White Electronic Designs
256Kx32 STATIC RAM CMOS, HIGH SPEED MODULE
FEATURES
DESCRIPTION
The EDI8F32259C is a high speed 8Mb Static RAM
module organized as 256K words by 32 bits. This module
is constructed from eight 256Kx4 Static RAMs in SOJ
packages on an epoxy laminate (FR4) board.
256Kx32 bit CMOS Static RAM
Access Times: 15, 20, and 25ns
Individual Byte Selects
Fully Static, No Clocks
TTL Compatible I/O
Four chip enables (EØ# - E3#) are used to independently
enable the four bytes. Reading or writing can be executed
on individual bytes or any combination of multiple bytes
through proper use of selects.
High Density Package with JEDEC Standard
Pinouts
The EDI8F32259C is offered in 72 pin ZIP/SIMM package
which enables eight megabits of memory to be placed in
less than 1.3 square inches of board space.
72 Pin SIMM No. 175 (Angle)
72 Pin ZIP No. 176
72 Pin SIMM, No. 354 (Straight)
All inputs and outputs are TTLcompatible and operate from
a single 5V supply. Fully asynchronous circuitry requires
no clocks or refreshing for operation and provides equal
access and cycle times for ease of use.
Single +5V (±10%) Supply Operation
The ZIP and SIMM modules contain four PD (Presence
Detect) pins which are used to identify module memory
density in applications where alternate modules can be
interchanged.
FIG. 1 PIN CONFIGURATIONS AND BLOCK DIAGRAM
PIN NAMES
NC
NC
1
E4#
E3#
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
2
PD3
PD4
VSS
3
AØ-A17
EØ#-E3#
W#
Address Inputs
Chip Enables
Write Enables
Output Enable
A17
4
A16
5
G#
PD1
PD2
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
VCC
6
VSS
7
DQ24
DQ16
DQ25
DQ17
DQ26
DQ18
DQ27
DQ19
A3
8
9
G#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
DQØ-DQ31 Common Data Input/Output
VCC
VSS
Power (+5V±10%)
Ground
A10
A0
A4
A7
A11
A1
A0 - A17
W#
A5
A8
A12
A2
G#
VCC
A9
A13
DQ12
DQ4
DQ13
DQ5
DQ14
DQ6
DQ15
DQ7
VSS
256K
X 4
256K
X 4
DQ4 - DQ7
DQ0 - DQ3
A6
DQ20
DQ28
DQ21
DQ29
DQ22
DQ30
DQ23
DQ31
VSS
E0#
256K
X 4
256K
X 4
DQ8 - DQ11
DQ16 - DQ19
DQ24 - DQ27
DQ12 - DQ15
DQ20 - DQ23
DQ28 - DQ31
E1#
E2#
W#
256K
X 4
256K
X 4
A15
A14
E2#
E1#
NC
NC
NC
NC
256K
X 4
256K
X 4
PD 1,2 = VSS
PD 3,4 = Open
E3#
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F32259C
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS*
RECOMMENDED DC OPERATING CONDITIONS
Voltage on any pin relative to VSS
-0.5V to 7.0V
Parameter
Sym
VCC
VSS
VIH
Min
4.5
0
Typ
5.0
0
Max
5.5
Units
Operating Temperature TA (Ambient)
Commercial
Industrial
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
V
V
V
V
0°C to +70°C
-40°C to +85°C
0
2.2
-0.3
--
VCC+0.3V
0.8
Storage Temperature, Plastic
Power Dissipation
-55°C to +125°C
7.5 Watt
VIL
--
Output Current
20 mA
AC TEST CONDITIONS
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Input Pulse Levels
VSS to 3.0V
5ns
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
1.5V
1TTL, CL = 30pF
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
DC ELECTRICAL CHARACTERISTICS
Max
Units
ns
Parameter
Sym
Conditions
Min
15-25
800
Operating Power Supply Current
ICC1
ICC2
W3, E# = VIL, I I/O = 0mA, Min Cycle
—
—
mA
mA
Standby (TTL) Power Supply Current
E# ≥ VIH, VIN ≤ VIL or VIN ≥ VIH
240
Full Standby Power Supply Current
CMOS
E# ≥ VCC-0.2V
VIN ≥ VCC-0.2V or VIN ≤ 0.2V
ICC3
—
40
mA
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
ILI
VIN = 0V to VCC
V I/O = 0V to VCC
IOH = -4.0mA
—
—
±80
±20
—
µA
µA
V
ILO
VOH
VOL
2.4
—
IOL = 8.0mA
0.4
V
*Typical: TA = 25°C, VCC = 5.0V
TRUTH TABLE
CAPACITANCE
(f=1.0MHZ, VIN=VCC or VSS
)
E#
H
L
W#
X
G#
X
Mode
Output
HIGH Z
Power
ICC3
Parameter
Sym
CI
Max
Unit
pF
Standby
Read
Address Lines
Data Lines
60
20
20
60
H
L
DOUT
DIN
ICC1
CD/Q
CC
pF
L
L
X
Write
ICC1
Chip Enable Line
Write Control Line
pF
L
H
H
Output Deselect
HIGH Z
ICC1
CN
pF
These parameters are sampled, not 100% tested.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F32259C
White Electronic Designs
AC CHARACTERISTICS READ CYCLE
Symbol
JEDEC
15ns
20ns
25ns
Units
Parameter
Alt.
tRC
Min
Max
Min
Max
Min
Max
Read Cycle Time
tAVAV
tAVQV
tELQV
tELQX
tEHQZ
tAVQX
tGLQV
tGLQX
tGHQZ
15
20
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
tAA
15
15
20
20
25
25
Chip Enable Access
tACS
tCLZ
tCHZ
tOH
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z (1)
3
3
0
3
3
0
3
3
0
7
7
7
9
9
9
9
9
9
tOE
tOLZ
tOHZ
Note 1: Parameter guaranteed, but not tested.
FIG. 2 READ CYCLE 1 - W# HIGH, G#, E# LOW
tAVAV
A
ADDRESS 1
ADDRESS 2
tAVQV
tAVQX
Q
DATA 2
DATA 1
FIG. 3 READ CYCLE 2 - W# HIGH
tAVAV
A
tAVQV
E#
tELQV
tELQX
tEHQZ
G#
tGLQV
tGLQX
tGHQZ
Q
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F32259C
White Electronic Designs
AC CHARACTERISTICS WRITE CYCLE
Symbol
JEDEC
15ns
20ns
25ns
Units
Parameter
Alt.
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tWC
15
20
25
ns
tELWH
tWLEH
tAVWL
tAVEL
tAVWH
tAVEH
tWLWH
tELEH
tWHAX
tEHAX
tWHDX
tEHDX
tCW
tCW
12
12
14
14
14
14
ns
ns
Chip Enable to End of Write
tAS
tAS
0
0
0
0
0
0
ns
ns
Address Setup Time
Address Valid to End of Write
Write Pulse Width
tAW
tAW
tWP
tWP
tWR
tWR
12
12
14
14
14
14
ns
ns
12
12
14
14
14
14
ns
ns
0
0
0
0
0
0
ns
ns
Write Recovery Time
tDH
tDH
3
3
3
3
3
3
ns
ns
Data Hold Time
Write to Output in High Z (1)
Data to Write Time
tWLQZ
tWHZ
0
7
0
9
0
9
ns
tDVWH
tDVEH
tDW
tDW
7
7
8
8
8
8
ns
ns
Output Active from End of Write (1)
tWHQX
tWLZ
3
3
3
ns
Note 1: Parameter guaranteed, but not tested.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F32259C
White Electronic Designs
FIG. 4 WRITE CYCLE 1 - W# CONTROLLED
tAVAV
A
E#
tELWH
tWHAX
tAVWH
tWLWH
W#
D
tAVWL
tDVWH
tWHDX
DATA VALID
tWHQX
tWLQZ
HIGH Z
Q
FIG. 5 WRITE CYCLE 2 - E# CONTROLLED
tAVAV
A
tAVEL
tELEH
E#
tAVEH
tEHAX
tWLEH
W#
D
tDVEH
tEHDX
DATA VALID
HIGH Z
Q
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F32259C
White Electronic Designs
ORDERING INFORMATION
Part Number
Speed (ns)
Package No.
176
EDI8F32259C15MNC
EDI8F32259C20MNC
EDI8F32259C25MNC
EDI8F32259C15MMC
EDI8F32259C20MMC
EDI8F32259C25MMC
EDI8F32259C15MZC
EDI8F32259C20MZC
EDI8F32259C25MZC
15
20
25
15
20
25
15
20
25
176
176
354
354
354
175
175
175
Note: For Gold SIMM, Change from EDI8F to EDI8G.
PACKAGE DESCRIPTION
PACKAGE NO. 175: 72 PIN ZIP
3.865 MAX.
.360
MAX.
.050
.590
MAX.
.050
.175
.125
P1
.100
TYP.
.250 TYP.
.100 TYP.
.020
.052 TYP.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F32259C
White Electronic Designs
PACKAGE NO. 176: 72 PIN SIMM ANGLED
4.225 MAX.
3.984
.360
MAX.
.125 DIA (2X)
J4
110
J3
.680
MAX.
J2
J1
REV.#
.400
.250
P1
.250
.050 TYP.
.062 R.
2.045
.125
MIN.
.225
MIN.
3.750
1.992
.062 R.
PACKAGE NO. 354: 72 PIN SIMM STRAIGHT
4.255 MAX.
3.984
.360
MAX.
.125 DIA (2X)
J4
110
J3
.680
MAX.
J2
J1
REV.#
.400
.250
P1
.250
.050 TYP.
.062 R.
2.045
.225
MIN.
.125
MIN.
3.750
1.992
.062 R.
ALL DIMENSIONS ARE IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F32259C
White Electronic Designs
Document Title
256Kx32, Static RAM CMOS, High Speed Module
Revision History
Rev #
Rev 0
History
Release Date Status
Created
July 2006
Concept
Rev 3
3.1 Updated Access Timing Spec
3.2 Removed 12nc Option
Aug. 2006
3.3 Added new document title page
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2006
Rev. 3
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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