EDI8F81024C100BSC [WEDC]
1Mx8 Static RAM CMOS, Module; 1Mx8静态RAM CMOS ，模块
| 型号： | EDI8F81024C100BSC |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | 1Mx8 Static RAM CMOS, Module |
| 文件： | 总6页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EDI8F81024C
White Electronic Designs
1Mx8 Static RAM CMOS, Module
FEATURES
DESCRIPTION
The EDI8F81024C is a 8Mb CMOS Static RAM based on eight
128Kx8 Static RAMs mounted on a multi-layered epoxy laminate
(FR4) substrate.
A version featuring Low Power with Data Retention (EDI8F81024LP)
is also available.
The EDI8F81024C is offered in a double sided, 36 pin single-in-line
Package (SIP). Surface mount SIP technology is a cost effective
solution to very high packing density requirements.
All inputs and outputs are TTL compatible and operate from a single
5V supply. Fully asynchronous, the EDI8F81024C requires no clocks
or refreshing for operation.
ꢀ
1024Kx8 bit CMOS Static
Random Access Memory
• Access Times 70 thru 100ns
• Data Retention Function (EDI8F81024LP)
• TTL Compatible Inputs and Outputs
• Fully Static, No Clocks
High Density Packaging
• 36 Pin SIP, No. 62
Single +5V ( 10ꢀ) Supply Operation
ꢀ
ꢀ
ꢀ
*This product is subject to change without notice.
PIN NAMES
PIN CONFIGURATIONS AND BLOCK DIAGRAM
AØ-A19
E#
W#
G#
DQØ-DQ7
VCC
Address Inputs
Chip Enable
1
NC
2
V
CC
W#
DQ2
DQ3
DQ0
A1
Write Enable
3
4
Output Enable
Common Data Input/Output
Power (+5V 10ꢀ)
Ground
5
6
7
8
A2
VSS
NC
9
A3
No Connection
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
A4
V
SS
DQ5
A10
A11
A5
A19
A18
A17
E#
DEC
A0-
A16
W#
G#
A13
A14
A19
E#
DQ0-DQ7
128K
X 8
A15
A16
A12
A18
A6
128K
X 8
128K
X 8
DQ1
V
SS
128K
X 8
A0
A7
A8
128K
X 8
A9
DQ7
DQ4
DQ6
A17
128K
X 8
128K
X 8
V
CC
G#
128K
X 8
PIN OUT
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 8
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81024C
White Electronic Designs
RECOMMENDED DC OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS*
Voltage on any pin relative to VSS
-0.5V to 7.0V
Parameter
Sym
VCC
VSS
VIH
Min
4.5
0
2.2
-0.3
Typ
5.0
0
–
–
Max
5.5
0
6.0
0.8
Units
Operating Temperature TA (Ambient)
Commercial
Industrial
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
V
V
V
V
0°C to +70°C
-40°C to +85°C
Storage Temperature
Plastic
Power Dissipation
Output Current
*Stress greater than those listed under "Absolute Maximum Ratings" may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions greater
than those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
VIL
-55°C to +125°C
1 Watt
AC TEST CONDITIONS
20 mA
Input Pulse Levels
VSS to 3.0V
5ns
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
1.5V
1TTL, CL = 100pF
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
DC ELECTRICAL CHARACTERISTICS
Parameter
Sym
ICC1
ICC2
Conditions
Min
Typ*
80
Max
130
90
Units
mA
Operating Power Supply Current
Standby (TTL) Power Supply Current
W#, E# = VIL, II/O = 0mA, Min Cycle
E# ≥ VIH, VIN ≤ VIL or VIN ≥ VIH
E# ≥ VCC-0.2V
40
mA
C
LP
10
400
20
950
mA
µA
Full Standby Power Supply Current
(CMOS)
ICC3
V
IN ≥ VCC-0.2V or
VIN ≤ 0.2V
Input Leakage Current
Output Leakage Current
Output High Voltage
ILI
VIN = 0V to VCC
–
–
–
–
–
–
10
10
–
µA
µA
V
ILO
V I/O = 0V to VCC
IOH = -1.0mA
IOL = 2.1mA
VOH
VOL
2.4
–
Output Low Voltage
0.4
V
*Typical: TA = 25°C, VCC = 5.0V
CAPACITANCE
(f=1.0MHz, VIN=VCC or VSS
)
TRUTH TABLE
Parameter
Sym
Max
Unit
G#
E#
W#
Mode
Output
Power
Input Capacitance
X
H
X
Standby
HIGH Z
ICC2/ICC3
CI
58
pF
(Except DQ Pins)
Output
H
L
H
HIGH Z
ICC1
Capacitance (DQ Pins)
Input (E#) Control Lines
Input (W#) Line (G#)
CD/Q
CC
43
10
60
pF
pF
pF
Deselect
L
X
L
L
H
L
Read
Write
DOUT
DIN
ICC1
ICC1
CW
These parameters are sampled, not 100ꢀ tested.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 8
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81024C
White Electronic Designs
AC CHARACTERISTICS READ CYCLE
Symbol
70ns
85ns
100ns
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z(1)
JEDEC
Alt.
TRC
TAA
TACS
TCLZ
Min
70
Max
Min
85
Max
Min
100
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
TAVAV
TAVQV
TELQV
TELQX
TEHQZ TCHZ
TAVQX
TGLQV
70
70
85
85
100
100
5
3
0
5
3
0
5
3
0
30
40
30
35
45
35
40
50
40
TOH
TOE
TGLQX TOLZ
TGHQZ TOHZ
ns
Note 1: Parameter guaranteed, but not tested.
READ CYCLE 1 - W# HIGH, G#, E# LOW
TAVAV
A
ADDRESS 1
ADDRESS 2
TAVQX
TAVQV
Q
DATA 2
DATA 1
READ CYCLE 2 - W# HIGH
TAVAV
A
TAVQV
E#
TELQV
TELQX
TEHQZ
TGHQZ
G#
Q
TGLQV
TGLQX
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 8
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81024C
White Electronic Designs
AC CHARACTERISTICS WRITE CYCLE
Symbol
JEDEC
70ns
85ns
100ns
Parameter
Alt.
Min
Max
Min
Max
Min
Max
Units
Write Cycle Time
TAVAV
TWC
70
85
100
ns
Chip Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
TELWH
TELEH
TCW
TCW
65
65
70
70
80
80
ns
ns
TAVWL
TAVEL
TAS
TAS
0
0
0
0
0
0
ns
ns
TAVWH
TAVEH
TAW
TAW
65
65
70
70
80
80
ns
ns
TWLWH
TWLEH
TWP
TWP
65
65
70
70
80
80
ns
ns
Write Recovery Time
Data Hold Time
TWHAX
TEHAX
TWR
TWR
0
0
0
0
0
0
ns
ns
TWHDX
TEHDX
TDH
TDH
0
0
0
0
0
0
ns
ns
Write to Output in High Z (1)
Data to Write Time
TWLQZ
TWHZ
0
30
0
35
0
40
ns
TDVWH
TDVEH
TDW
TDW
30
30
35
35
40
40
ns
ns
Output Active from End of Write (1)
TWHQX
TWLZ
5
5
5
ns
Note 1: Parameter guaranteed, but not tested.
WRITE CYCLE 1 - W# CONTROLLED
TAVAV
A
E#
TELWH
TAVWH
TWHAX
TWHDX
TWLWH
W#
D
TAVWL
TDVWH
HIGH Z
DATA VALID
TWHQX
TWLQZ
Q
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 8
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81024C
White Electronic Designs
WRITE CYCLE 2 - E# CONTROLLED
TAVAV
TELEH
A
TAVEL
E#
TAVEH
TEHAX
TEHDX
TWLEH
W#
TDVEH
D
Q
DATA VALID
HIGH Z
Characteristic
Sym
Test Conditions
VCC
Min
Typ
Max
Unit
70°C
–
300
450
85°C
–
400
550
Data Retention Voltage
Data Retention Quiescent Current
VCC
ICCDR
VCC = 0.2V
2
–
–
–
25
50
V
µA
µA
2V
3V
E# ≥ VCC -0.2V
V
IN ≥ VCC -0.2V
Chip Disable to Data Retention Time (1)
Operation Recovery Time (1)
TCDR
TR
0
–
–
–
–
–
–
ns
ns
or VIN ≤ 0.2V
TAVAV*
Note 1: Parameter guaranteed, but not tested.
* Read Cycle Time
DATA RETENTION E# CONTROLLED
DATA RETENTION MODE
4.5V
4.5V
VCC
V
CC
TCDR
TR
E#≥VDD-0.2V
E#
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 8
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
EDI8F81024C
White Electronic Designs
ORDERING INFORMATION
Standard Power
Low Power with
Data Retention
Speed
(ns)
Package
No.
EDI8F81024C70BSC
EDI8F81024C85BSC
EDI8F81024C100BSC
EDI8F81024LP70BSC
EDI8F81024LP85BSC
EDI8F81024LP100BSC
70
85
62
62
62
100
Note: To order an Industrial grade product substitute the letter C in the Suffix with the letter I,
e.g. EDI8F81024C70BSC becomes EDI8F81024C70BSI.
PACKAGE DESCRIPTION
PACKAGE NO. 62: 36 PIN SINGLE-IN-LINE PACKAGE
.200
4.040 MAX.
.050
MAX.
.575
.050
.175
MAX.
.100 TYP.
.125
.270
MAX.
35 X .100
3.500 REF.
ALL DIMENSIONS ARE IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 8
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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