EDI8G32128C15MMC [WEDC]

SRAM,;
EDI8G32128C15MMC
型号: EDI8G32128C15MMC
厂家: WHITE ELECTRONIC DESIGNS CORPORATION    WHITE ELECTRONIC DESIGNS CORPORATION
描述:

SRAM,

静态存储器
文件: 总9页 (文件大小:237K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
EDI8F32128C  
White Electronic Designs  
128KX32 STATIC RAM CMOS, HIGH SPEED MODULE  
FEATURES  
DESCRIPTION  
The EDI8F32128C is a high speed 4Mb Static RAM  
module organized as 128K words by 32 bits. This module is  
constructed from four 128Kx8 Static RAMs in SOJ packages  
on an epoxy laminate (FR4) board.  
128Kx32 bit CMOS Static  
Random Access Memory  
Access Times: 15, 20, and 25ns  
Individual Byte Selects  
Fully Static, No Clocks  
TTL Compatible I/O  
Four chip enables (E0# - E3#) are used to independently  
enable the four bytes. Reading or writing can be executed  
on individual bytes or any combination of multiple bytes  
through proper use of selects.  
Single +5V ( 10ꢀ) Supply Operation  
The EDI8F32128C is offered in 64 pin ZIP/SIMM package  
which enables eight megabits of memory to be placed in  
less than 1.4 square inches of board space.  
High Density Package with JEDEC Standard  
Pinouts  
64 Pin ZIP, No. 85  
All inputs and outputs are TTL compatible and operate from  
a single 5V supply. Fully asynchronous circuitry requires no  
clocks or refreshing for operation and provides equal access  
and cycle times for ease of use.  
• Height: 13.97 (0.550")  
64 Lead SIMM, No. 333  
• Height: 15.62 (0.615")  
Common Data Inputs and Outputs  
The ZIP and SIMM modules contain two pins, PD1  
and PD2, which are used to identify module memory  
density in applications where alternate modules can be  
interchanged.  
FIG. 1 – PIN CONFIGURATIONS AND BLOCK DIAGRAM  
PIN NAMES  
1
3
5
7
9
VSS  
AØ-A16  
EØ#-E3#  
W#  
Address Inputs  
Chip Enables  
Write Enables  
Output Enable  
PD0  
DQ0  
DQ1  
DQ2  
2
4
6
8
PD1  
DQ8  
DQ9  
DQ10  
DQ3 10  
12  
11 DQ11  
13 A0  
15 A1  
17 A2  
G#  
VCC  
A7 14  
A8 16  
DQØ-DQ31 Common Data Input/Output  
A9 18  
VCC  
VSS  
Power (+5V 1ꢀ0%  
Ground  
19 DQ12  
21 DQ13  
23 DQ14  
25 DQ15  
DQ4 20  
DQ5 22  
DQ6 24  
DQ7 26  
W# 28  
A14 30  
E0# 32  
27  
VSS  
29 A15  
31 E1#  
BLOCK DIAGRAM  
A0 - A17  
33 E3#  
35 NC  
E2# 34  
A16 36  
W#  
G#  
37 G#  
V
SS 38  
39 DQ24  
41 DQ25  
43 DQ26  
45 DQ27  
47 A3  
49 A4  
51 A5  
DQ16 40  
DQ17 42  
DQ18 44  
DQ19 46  
A10 48  
128Kx8  
128Kx8  
128Kx8  
128Kx8  
DQ0-7  
E0#  
E1#  
E2#  
E3#  
DQ8-15  
DQ16-23  
A11 50  
A12 52  
53  
V
CC  
A13 54  
55 A6  
DQ20 56  
DQ21 58  
DQ22 60  
DQ23 62  
57 DQ28  
59 DQ29  
61 DQ30  
63 DQ31  
V
SS 64  
DQ24-31  
PD0 = OPEN  
PD1 = OPEN  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
RECOMMENDED DC OPERATING CONDITIONS  
ABSOLUTE MAXIMUM RATINGS*  
Voltage on any pin relative to VSS  
-ꢀ.5V to 7.ꢀV  
Parameter  
Sym  
VCC  
VSS  
VIH  
Min  
4.5  
2.2  
-ꢀ.3  
Typ  
5.ꢀ  
Max  
5.5  
VCC+ꢀ.3V  
ꢀ.8  
Units  
Operating Temperature TA (Ambient%  
Supply Voltage  
Supply Voltage  
Input High Voltage  
Input Low Voltage  
V
V
V
V
Commercial  
ꢀ°C to +7ꢀ°C  
-4ꢀ°C to +85°C  
Industrial  
--  
Storage Temperature, Plastic  
Power Dissipation  
-55°C to +125°C  
8.ꢀ Watt  
VIL  
--  
Output Current  
2ꢀ mA  
* Stress greater than those listed under "Absolute Maximum Ratings"  
may cause permanent damage to the device. This is a stress rating  
only and functional operation of the device at these or any other  
conditions greater than those indicated in the operational sections of  
this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect reliability.  
AC TEST CONDITIONS  
Input Pulse Levels  
VSS to 3.ꢀV  
Input Rise and Fall Times  
Input and Output Timing Levels  
Output Load  
5ns  
1.5V  
1TTL, CL = 3ꢀpF  
(note: For TEHQZ, TGHQZ and TWLQZ, CL = 5pF%  
DC ELECTRICAL CHARACTERISTICS  
Parameter  
Operating Power Supply Current  
Standby (TTL% Power Supply Current  
Full Standby Power Supply Current  
CMOS  
Sym  
ICC1  
ICC2  
ICC3  
Conditions  
WE# = VIL, I/O = ꢀmA, Min Cycle  
E# ≥ VIH, VIN ≤ VIL or VIN ≥VIH  
E# ≥ VCC-ꢀ.2V  
VIN ≥ VCC-ꢀ.2V or VIN ≤ ꢀ.2V  
Min  
Max  
78ꢀ  
8ꢀ  
Units  
mA  
mA  
2ꢀ  
mA  
Input Leakage Current  
Output Leakage Current  
Output High Voltage  
Output Low Voltage  
ILI  
ILO  
VOH  
VOL  
VIN = ꢀV to VCC  
V I/O = ꢀV to VCC  
IOH = -4.ꢀmA  
2.4  
1ꢀ  
1ꢀ  
µA  
µA  
V
IOL = 8.ꢀmA  
ꢀ.4  
V
CAPACITANCE  
TRUTH TABLE  
(f = 1.ꢀMHZ, VIN=VCC or VSS  
%
E#  
H
L
L
L
W#  
X
H
L
H
G#  
X
L
X
H
Mode  
Standby  
Read  
Output  
HIGH Z  
DOUT  
DIN  
Power  
ICC3  
ICC1  
ICC1  
ICC1  
Parameter  
Sym  
CI  
Max  
25  
Unit  
Address Lines  
pF  
pF  
pF  
pF  
Data Lines  
CD/Q  
CC  
CN  
35  
25  
35  
Write  
Chip Enable Line  
Write Control Line  
Output Deselect HIGH Z  
These parameters are sampled, not 1ꢀꢀ0 tested.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
AC CHARACTERISTICS READ CYCLE  
Parameter  
Symbol  
15ns  
20ns  
Max  
25ns  
Units  
JEDEC  
Alt.  
TRC  
Min  
Max  
Min  
2ꢀ  
Min  
Max  
Read Cycle Time  
Address Access Time  
Chip Enable Access  
Chip Enable to Output in Low Z (1%  
Chip Disable to Output in High Z (1%  
Output Hold from Address Change  
Output Enable to Output Valid  
Output Enable to Output in Low Z (1%  
Output Disable to Output in High Z (1%  
TAVAV  
TAVQV  
TELQV  
TELQX  
TEHQZ  
TAVQX  
TGLQV  
TGLQX  
TGHQZ  
15  
25  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
TAA  
15  
15  
2ꢀ  
2ꢀ  
25  
25  
TACS  
TCLZ  
TCHZ  
TOH  
3
3
3
3
3
3
8
8
5
1ꢀ  
13  
8
12  
15  
1ꢀ  
TOE  
TOLZ  
TOHZ  
Note 1: Parameter guaranteed, but not tested.  
FIG. 2 READ CYCLE 1 - W# HIGH, G#, E# LOW  
TAVAV  
A
ADDRESS 1  
ADDRESS 2  
TAVQX  
TAVQV  
Q
DATA 2  
DATA 1  
FIG. 3 READ CYCLE 2 - W# HIGH  
TAVAV  
A
TAVQV  
E#  
TELQV  
TELQX  
TEHQZ  
TGHQZ  
G#  
Q
TGLQV  
TGLQX  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
AC CHARACTERISTICS WRITE CYCLE  
Symbol  
JEDEC  
15ns  
20ns  
Max  
25ns  
Max  
Parameter  
Units  
Alt.  
TWC  
TCW  
TCW  
TAS  
Min  
15  
12  
12  
Max  
Min  
2ꢀ  
15  
15  
Min  
25  
15  
15  
Write Cycle Time  
Chip Enable to End of Write  
TAVAV  
TELWH  
TWLEH  
TAVWL  
TAVEL  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Setup Time  
Address Valid to End of Write  
Write Pulse Width  
TAS  
TAVWH  
TAVEH  
TWLWH  
TELEH  
TWHAX  
TEHAX  
TWHDX  
TEHDX  
TAW  
TAW  
TWP  
TWP  
TWR  
TWR  
TDH  
TDH  
12  
12  
12  
12  
3
3
15  
15  
15  
15  
3
3
15  
15  
15  
15  
3
3
Write Recovery Time  
Data Hold Time  
Write to Output in High Z (1%  
Data to Write Time  
TWLQZ TWHZ  
9
9
9
TDVWH  
TDVEH  
TDW  
TDW  
7
7
3
8
8
3
8
8
3
Output Active from End of Write (1% TWHQX TWLZ  
Note 1: Parameter guaranteed, but not tested.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
FIG. 4 WRITE CYCLE 1 - W# CONTROLLED  
TAVAV  
A
E#  
TELWH  
TWHAX  
TWHDX  
TAVWH  
TWLWH  
W#  
D
TAVWL  
TDVWH  
HIGH Z  
DATA VALID  
TWHQX  
TWLQZ  
Q
FIG. 5 WRITE CYCLE 2 - E# CONTROLLED  
TAVAV  
A
TAVEL  
TELEH  
E#  
TAVEH  
TEHAX  
TWLEH  
W#  
D
TDVEH  
TEHDX  
DATA VALID  
HIGH Z  
Q
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
ORDERING INFORMATION PACKAGE NO. 32: 64 LEAD ANGLED SIMM  
Part Number  
Speed (ns)  
Package No.  
Package Height*  
17.27 (ꢀ.68ꢀ"%  
17.27 (ꢀ.68ꢀ"%  
17.27 (ꢀ.68ꢀ"%  
EDI8F32128C15MNC  
EDI8F32128C2ꢀMNC  
EDI8F32128C25MNC  
15  
2ꢀ  
25  
32  
32  
32  
NOTE: 1. For Gold SIMM change form EDI8F to EDI8G.  
PACKAGE NO. 32: 64 LEAD ANGLED SIMM  
97.92 (3.855% MAX  
91.ꢀ3 (3.584%  
6.1ꢀ  
(ꢀ.24ꢀ%  
MAX  
17.27  
(ꢀ.68ꢀ%  
MAX  
6.35  
(ꢀ.25ꢀ%  
P1  
6.35 (ꢀ.25ꢀ%  
1.27 (ꢀ.ꢀ5ꢀ%  
1ꢀ.16  
3.18  
(ꢀ.125%  
MIN  
85.ꢀ9 (3.35ꢀ%  
45.52 (1.792%  
(ꢀ.4ꢀꢀ%  
46.86 (1.845%  
R 1.57 (ꢀ.ꢀ62% (2x%  
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES%  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
ORDERING INFORMATION FOR PACKAGE NO. 333: 64 LEAD SIMM  
Part Number  
Speed (ns)  
Package No.  
Package Height*  
15.62 (ꢀ.615"%  
15.62 (ꢀ.615"%  
15.62 (ꢀ.615"%  
EDI8F32128C15MMC  
EDI8F32128C2ꢀMMC  
EDI8F32128C25MMC  
15  
2ꢀ  
25  
333  
333  
333  
NOTE: 1. For Gold SIMM change form EDI8F to EDI8G.  
PACKAGE NO. 333: 64 LEAD SIMM  
97.92 (3.855% MAX  
91.ꢀ3 (3.584%  
6.1ꢀ  
(ꢀ.24ꢀ%  
MAX  
15.62  
(ꢀ.615%  
MAX  
6.35  
(ꢀ.25ꢀ%  
P1  
6.35 (ꢀ.25ꢀ%  
1.27 (ꢀ.ꢀ5ꢀ%  
1ꢀ.16  
3.18  
(ꢀ.125%  
MAX  
85.ꢀ9 (3.35ꢀ%  
45.52 (1.792%  
(ꢀ.4ꢀ1%  
46.86 (1.845%  
R 1.57 (ꢀ.ꢀ62% (2x%  
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES%  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
ORDERING INFORMATION FOR PACKAGE NO. 85: 64 PIN ZIP  
Part Number  
Speed (ns)  
Package No.  
Package Height*  
13.97 (ꢀ.55ꢀ"%  
13.97 (ꢀ.55ꢀ"%  
13.97 (ꢀ.55ꢀ"%  
EDI8F32128C15MZC  
EDI8F32128C2ꢀMZC  
EDI8F32128C25MZC  
15  
2ꢀ  
25  
85  
85  
85  
NOTE: 1. For Gold SIMM change form EDI8F to EDI8G.  
PACKAGE NO. 85: 64 PIN ZIP  
6.1ꢀ  
(ꢀ.24ꢀ%  
MAX  
93.ꢀ9 (3.665% MAX  
1.27 (ꢀ.ꢀ5ꢀ%  
14.35  
1.27  
(ꢀ.58ꢀ%  
(ꢀ.ꢀ5ꢀ%  
13.97  
(ꢀ.55ꢀ%  
4.45  
6.35  
2.54  
(ꢀ.1ꢀꢀ%  
TYP  
1.27  
(ꢀ.ꢀ5ꢀ%  
TYP  
4.19 (ꢀ.165%  
3.43 (ꢀ.135%  
ꢀ.56 (ꢀ.ꢀ22%  
ꢀ.46 (ꢀ.ꢀ18%  
(ꢀ.175%  
(ꢀ.25ꢀ%  
TYP  
2.54  
(ꢀ.1ꢀꢀ%  
TYP  
3.18  
(ꢀ.125%  
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES%  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
EDI8F32128C  
White Electronic Designs  
Document Title  
128M x 32 Static RAM CMOS, High Speed Mode  
Revision History  
Rev #  
History  
Release Date Status  
Rev 0  
Created  
June 2003  
Advanced  
Rev 1  
Update on Operating Power Supply Current ICC1 from 150mA  
to 780mA  
May 2006  
Final  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
May 2006  
Rev. 1  
9
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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