WE128K32-200G2UI [WEDC]

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQFP68, 22.40 MM, CERAMIC, LQFP-68;
WE128K32-200G2UI
型号: WE128K32-200G2UI
厂家: WHITE ELECTRONIC DESIGNS CORPORATION    WHITE ELECTRONIC DESIGNS CORPORATION
描述:

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQFP68, 22.40 MM, CERAMIC, LQFP-68

可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器
文件: 总16页 (文件大小:347K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
WE128K32-XXX  
White Electronic Designs  
128Kx32 EEPROM MODULE, SMD 5962-94585  
FEATURES  
Access Times of 120*, 140, 150, 200, 250, 300ns  
Low Power CMOS  
Automatic Page Write Operation  
Page Write Cycle Time: 10ms Max  
Data Polling for End of Write Detection  
Hardware and Software Data Protection  
TTL Compatible Inputs and Outputs  
5 Volt Power Supply  
Packaging:  
• 66-pin, PGA Type, 27.3mm (1.075") square,  
Hermetic Ceramic HIP (Package 400)  
• 68 lead, 22.4mm sq. CQFP (G2U), 4.57mm  
(0.180") high, (Package 509)  
• 68 lead, 23.9mm sq. Low Profile CQFP (G1U)1,  
3.57mm (0.140") high, (Package 519)  
Built-in Decoupling Caps and Multiple Ground  
Pins for Low Noise Operation  
• 68 lead, 23.9mm sq. Low Profile CQFP (G1T),  
4.06mm (0.160") high, (Package 524)  
Weight  
WE128K32-XG2UX - 8 grams typical  
WE128K32-XG1UX - 5 grams typical  
Organized as 128Kx32; User Configurable as  
256Kx16 or 512Kx8  
WE128K32-XG1TX1 - 5 grams typical  
WE128K32-XH1X - 13 grams typical  
Write Endurance 10,000 Cycles  
Data Retention Ten Years Minimum (at +25°C)  
*
120ns not available for SMD product  
Commercial, Industrial and Military Temperature  
Note 1: Package Not Recommended For New Design  
Ranges  
FIG. 1 PIN CONFIGURATION FOR WE128K32N-XH1X  
PIN DESCRIPTION  
I/O0-31 Data Inputs/Outputs  
TOP VIEW  
A0-16  
WE1-4  
CS1-4  
OE  
Address Inputs  
Write Enables  
Chip Selects  
Output Enable  
Power Supply  
VCC  
GND  
NC  
Ground  
Not Connected  
BLOCK DIAGRAM  
May 2003 Rev. 7  
1
WhiteElectronicDesignsCorporation(602)437-1520www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
FIG. 3 PIN CONFIGURATION FOR WE128K32-XG2UX, WE128K32-XG1UX1 AND WE128K32-XG1TX  
TOP VIEW  
PIN DESCRIPTION  
I/O0-31 Data Inputs/Outputs  
A0-16  
WE1-4  
CS1-4  
OE  
Address Inputs  
Write Enables  
Chip Selects  
Output Enable  
Power Supply  
VCC  
GND  
NC  
Ground  
The White 68 lead CQFP  
fills the same fit and  
Not Connected  
function as the JEDEC 68  
lead CQFJ or 68 PLCC. But  
it has the TCE and lead  
inspection advantage of the  
CQFP form.  
BLOCK DIAGRAM  
Note 1: Package Not Recommended For New Design  
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
2
WE128K32-XXX  
White Electronic Designs  
ABSOLUTE MAXIMUM RATINGS  
TRUTH TABLE  
WE Mode  
Parameter  
Symbol  
TA  
Unit  
°C  
°C  
V
CS  
H
L
L
X
OE  
X
L
H
H
X
Data I/O  
High Z  
Data Out  
X
H
L
Standby  
Read  
Write  
Operating Temperature  
Storage Temperature  
Signal Voltage Relative to GND  
Voltage on OE and A9  
NOTE:  
-55 to +125  
-65 to +150  
-0.6 to +6.25  
-0.6 to +13.5  
TSTG  
VG  
Data In  
High Z/Data Out  
X
H
X
Out Disable  
Write  
Inhibit  
V
X
X
L
Stresses above those listed under "Absolute Maximum Ratings"  
may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device at these or any  
other conditions above those indicated  
in the operational sections of this specification is not implied.  
Exposure to absolute maximum rating conditions for extended  
periods may affect  
CAPACITANCE  
(TA = +25°C)  
Parameter  
Symbol  
COE  
Conditions  
Max Unit  
device reliability.  
OE capacitance  
V
V
IN = 0 V, f = 1.0 MHz 50 pF  
WE1-4 capacitance  
HIP (PGA)  
CQFP G2U/G1U/G1T  
CWE  
IN = 0 V, f = 1.0 MHz  
pF  
RECOMMENDED OPERATING CONDITIONS  
20  
20  
Parameter  
Symbol  
VCC  
VIH  
Min  
4.5  
2.0  
-0.5  
-55  
-40  
Max  
5.5  
Unit  
V
Supply Voltage  
CS1-4 capacitance  
CCS  
CI/O  
V
IN = 0 V, f = 1.0 MHz 20 pF  
Input High Voltage  
Input Low Voltage  
Operating Temp. (Mil.)  
Operating Temp. (Ind.)  
VCC + 0.3  
+0.8  
V
Data I/O capacitance  
V
I/O = 0 V, f = 1.0 MHz 20 pF  
IN = 0 V, f = 1.0 MHz 50 pF  
VIL  
V
Address input capacitance CAD  
V
TA  
+125  
°C  
°C  
This parameter is guaranteed by design but not tested.  
TA  
+85  
DC CHARACTERISTICS  
(VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C)  
Parameter  
Symbol  
Conditions  
VCC = 5.5, VIN = GND to VCC  
CS = VIH, OE = VIH, VOUT = GND to VCC  
CS = VIL, OE = VIH, f = 5MHz  
CS = VIH, OE = VIH, f = 5MHz  
IOL = 2.1mA, VCC = 4.5V  
Min  
Max  
10  
Unit  
µA  
µA  
mA  
mA  
V
Input Leakage Current  
Output Leakage Current  
ILI  
ILOx32  
10  
Operating Supply Current x 32 Mode ICCx32  
250  
2.5  
Standby Current  
ISB  
VOL  
VOH  
Output Low Voltage  
Output High Voltage  
0.45  
IOH = -400µA, VCC = 4.5V  
2.4  
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V  
FIG. 4 AC TEST CIRCUIT  
AC TEST CONDITIONS  
Parameter  
Typ  
Unit  
Input Pulse Levels  
VIL = 0, VIH = 3.0  
V
ns  
V
Input Rise and Fall  
5
Input and Output Reference Level  
Output Timing Reference Level  
1.5  
1.5  
V
NOTES:  
VZ is programmable from -2V to +7V.  
IOL & IOH programmable from 0 to 16mA.  
Tester Impedance Z0 = 75.  
VZ is typically the midpoint of VOH and VOL.  
IOL & IOH are adjusted to simulate a typical resistive load  
circuit.  
ATE tester includes jig capacitance.  
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
AC WRITE CHARACTERISTICS  
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)  
WRITE  
A write cycle is initiated when OE is high and a low  
pulse is on WE or CS with CS or WE low. The  
address is latched on the falling edge of CS or WE  
whichever occurs last. The data is latched by the  
rising edge of CS or WE, whichever occurs first. A  
byte write operation will automatically continue to  
completion.  
WriteCycleParameter  
WriteCycleTime, TYP=6ms  
AddressSet-upTime  
WritePulseWidth(WEorCS)  
ChipSelectSet-upTime  
AddressHoldTime  
Symbol Min  
Max Unit  
tWC  
10  
ms  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tAS  
tWP  
tCS  
0
150  
0
tAH  
100  
10  
0
DataHoldTime  
tDH  
ChipSelectHoldTime  
DataSet-upTime  
tCSH  
tDS  
WRITE CYCLE TIMING  
100  
10  
10  
50  
OutputEnableSet-upTime  
OutputEnableHoldTime  
Write Pulse Width High  
tOES  
tOEH  
tWPH  
Figures 5 and 6 show the write cycle timing relation-  
ships. A write cycle begins with address application,  
write enable and chip select. Chip select is accom-  
plished by placing the CS line low. Write enable  
consists of setting the WE line low. The write cycle  
begins when the last of either CS or WE goes low.  
The WE line transition from high to low also initiates  
an internal 150 µsec delay timer to permit page mode  
operation. Each subsequent WE transition from high  
to low that occurs before the completion of the 150  
µsec time out will restart the timer from zero. The  
operation of the timer is the same as a retriggerable  
one-shot.  
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
4
WE128K32-XXX  
White Electronic Designs  
FIG. 5  
WRITE WAVEFORMS  
WE CONTROLLED  
FIG. 6  
WRITE WAVEFORMS  
CS CONTROLLED  
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
READ  
The WE128K32-XXX stores data at the memory  
location determined by the address pins. When CS  
and OE are low and WE is high, this data is  
present on the outputs. When CS and OE are  
high, the outputs are in a high impedance state.  
This two line control prevents bus contention.  
AC READ CHARACTERISTICS  
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)  
ReadCycleParameter  
Symbol  
-120  
-140  
-150  
-200  
-250  
-300  
Unit  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min Max  
Min Max  
ReadCycleTime  
tRC  
tACC  
tACS  
tOH  
tOE  
120  
140  
150  
200  
250  
250  
250  
0
300  
300  
300  
0
ns  
ns  
ns  
ns  
ns  
ns  
AddressAccessTime  
120  
120  
140  
140  
150  
150  
200  
200  
ChipSelectAccessTime  
OutputHoldfromAdd.Change,OEorCS  
OutputEnabletoOutputValid  
ChipSelectorOEtoHighZOutput  
0
0
0
0
0
0
0
0
50  
70  
55  
70  
55  
70  
55  
70  
0
85  
70  
0
85  
70  
tDF  
FIG. 7  
READ WAVEFORMS  
CS1-4  
NOTES:  
OE may be delayed up to tACS - tOE after  
the falling edge of CS without impact on  
tOE or by tACC - tOE after an address  
change without impact on tACC.  
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
6
WE128K32-XXX  
White Electronic Designs  
DATA POLLING  
The WE128K32-XXX offers a data polling feature  
which allows a faster method of writing to the device.  
Figure 8 shows the timing diagram for this function.  
During a byte or page write cycle, an attempted read  
of the last byte written will result in the complement of  
the written data on D7 (for each chip.) Once the write  
cycle has been completed, true data is valid on all  
outputs and the next cycle may begin. Data polling  
may begin at any time during the write cycle.  
DATA POLLING CHARACTERISTICS  
(VCC = 5.0V, VSS = 0V, TA= -55°C TO +125°C)  
Parameter  
Symbol  
Min Max Unit  
DataHoldTime  
OEHoldTime  
tDH  
10  
10  
ns  
ns  
ns  
ns  
tOEH  
tOE  
OEToOutputValid  
WriteRecoveryTime  
55  
tWR  
0
FIG. 8  
DATA POLLING  
WAVEFORMS  
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
PAGE WRITE CHARACTERISTICS  
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)  
PAGE WRITE OPERATION  
The WE128K32-XXX has a page write operation that  
allows one to 128 bytes of data to be written into the  
device and consecutively loads during the internal  
programming period. Successive bytes may be  
loaded in the same manner after the first data byte  
has been loaded. An internal timer begins a time out  
operation at each write cycle. If another write cycle is  
completed within 150µs or less, a new time out period  
begins. Each write cycle restarts the delay period.  
The write cycles can be continued as long as the  
interval is less than the time out period.  
PageModeWriteCharacteristics  
Parameter  
Symbol  
Unit  
Min Max  
WriteCycleTime,TYP=6ms  
AddressSet-upTime  
AddressHoldTime(1)  
DataSet-upTime  
tWC  
tAS  
10  
ms  
ns  
ns  
ns  
ns  
ns  
µs  
ns  
0
tAH  
100  
100  
10  
tDS  
DataHoldTime  
tDH  
WritePulseWidth  
tWP  
tBLC  
tWPH  
150  
150  
50  
ByteLoadCycleTime  
WritePulseWidthHigh  
The usual procedure is to increment the least  
significant address lines from A0 through A6 at  
each write cycle. In this manner a page of up to  
128 bytes can be loaded in to the EEPROM in a  
burst mode before beginning the relatively long  
interval programming cycle.  
1. Page address must remain valid for duration of write cycle.  
After the 150µs time out is completed, the EEPROM  
begins an internal write cycle. During this cycle the  
entire page of bytes will be written at the same  
time. The internal programming cycle is the same  
regardless of the number of bytes accessed.  
FIG. 9  
PAGE MODE  
WRITE WAVEFORMS  
x
x
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
8
WE128K32-XXX  
White Electronic Designs  
FIG. 10  
SOFTWARE DATA PROTECTION  
ENABLEALGORITHM(1)  
LOAD DATA AA  
TO  
ADDRESS 5555  
LOAD DATA 55  
TO  
ADDRESS 2AAA  
LOAD DATA A0  
WRITES ENABLED(2)  
TO  
ADDRESS 5555  
LOAD DATA XX  
TO  
ANY ADDRESS(4)  
LOAD LAST BYTE  
ENTER DATA  
TO  
PROTECT STATE  
LAST ADDRESS  
NOTES:  
1. Data Format: D7 - D0 (Hex);  
Address Format: A16 - A0 (Hex).  
2. Write Protect state will be activated at end of write even if  
no other data is loaded.  
3. Write Protect state will be deactivated at end of write  
period even if no other data is loaded.  
4. 1 to 128 bytes of data may be loaded.  
9
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
SOFTWARE DATA PROTECTION  
FIG. 11  
A software write protection feature may be enabled  
or disabled by the user. When shipped by White  
Microelectronics, the WE-128K32-XXX has the  
feature disabled. Write access to the device is  
unrestricted.  
SOFTWARE DATA PROTECTION  
DISABLEALGORITHM(1)  
To enable software write protection, the user writes  
three access code bytes to three special internal  
locations. Once write protection has been enabled,  
each write to the EEPROM must use the same  
three byte write sequence to permit writing. After  
setting software data protection, any attempt to  
write to the device without the three-byte command  
sequence will start the internal write timers. No data  
will be written to the device, however, for the  
duration of tWC. The write protection feature can be  
disabled by a six byte write sequence of specific  
data to specific locations. Power transitions will not  
reset the software write protection.  
LOAD DATA AA  
TO  
ADDRESS 5555  
LOAD DATA 55  
TO  
ADDRESS 2AAA  
LOAD DATA 80  
TO  
ADDRESS 5555  
LOAD DATA AA  
TO  
ADDRESS 5555  
Each 128K byte block of the EEPROM has indepen-  
dent write protection. One or more blocks may be  
enabled and the rest disabled in any combination.  
The software write protection guards against  
inadvertent writes during power transitions, or  
unauthorized modification using a PROM program-  
mer.  
LOAD DATA 55  
TO  
ADDRESS 2AAA  
LOAD DATA 20  
TO  
(3)  
ADDRESS 5555  
EXIT DATA  
PROTECT STATE  
LOAD DATA XX  
TO  
HARDWARE DATA PROTECTION  
These features protect against inadvertent writes to  
the WE128K32-XXX. These are included to  
improve reliability during normal operation:  
ANY ADDRESS(4)  
LOAD LAST BYTE  
TO  
LAST ADDRESS  
a) VCC power on delay  
As VCC climbs past 3.8V typical the device will  
wait 5msec typical before allowing write cycles.  
b) VCC sense  
While below 3.8V typical write cycles are inhib-  
ited.  
c) Write inhibiting  
Holding OE low and either CS or WE high  
inhibits write cycles.  
d) Noise filter  
Pulses of <8ns (typ) on WE or CS will not initiate  
a write cycle.  
NOTES:  
1. Data Format: D7 - D0 (Hex);  
Address Format: A16 - A0 (Hex).  
2. Write Protect state will be activated at end of write even if  
no other data is loaded.  
3. Write Protect state will be deactivated at end of write  
period even if no other data is loaded.  
4. 1 to 128 bytes of data may be loaded.  
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
10  
WE128K32-XXX  
White Electronic Designs  
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
11  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)  
25.15 (0.990) 0.25 (0.010) ꢀS  
3.51 (0.140) MAX  
22.36 (0.ꢁꢁ0) 0.25 (0.010) ꢀS  
0.25 (0.010) 0.010 (0.002)  
24.0 (0.946)  
0.25 (0.010)  
0.53 (0.021)  
0.1ꢁ (0.00ꢂ)  
1.01 (0.040)  
0.13 (0.005)  
23.ꢁꢂ  
0.940 REF  
The White 68 lead G2U  
CQFP fills the same fit  
and function as the  
JEDEC 68 lead CQFJ or  
68 PLCC. But the G2U  
has the TCE and lead  
inspection advantage of  
the CQFP form.  
0.940"  
TYP  
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
12  
WE128K32-XXX  
White Electronic Designs  
PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U)  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
Note 1: Package Not Recommended for New Designs  
13  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
PACKAGE 524: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1T)  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
14  
WE128K32-XXX  
White Electronic Designs  
FIG. 12 ALTERNATE PIN CONFIGURATION FOR WE128K32NP-XH1X  
PIN DESCRIPTION  
TOP VIEW  
I/O0-31 Data Inputs/Outputs  
A0-16  
WE1-4  
CS1-4  
OE  
Address Inputs  
Write Enables  
Chip Selects  
Output Enable  
Power Supply  
Ground  
VCC  
GND  
NC  
Not Connected  
BLOCK DIAGRAM  
ORDERING INFORMATION  
W E 128K32 X - XXX X X X  
LEAD FINISH:  
Blank = Gold plated leads  
A = Solder dip leads  
DEVICE GRADE:  
Q = Compliant  
M = Military Screened -55°C to +125°C  
I
= Industrial  
-40°C to +85°C  
0°C to +70°C  
C = Commercial  
PACKAGE TYPE:  
H1 = 1.075" sq. Ceramic Hex In-line Package, HIP (Package 400*)  
G2U = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 510)  
G1U1 = 23.9mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 519)  
G1T = 23.9mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 524)  
ACCESS TIME (ns)  
IMPROVEMENT MARK  
N = No Connect at pins 8, 21, 28, and 39 in HIP for upgrade  
P = Alternate Pin Configuration for HIP package  
ORGANIZATION 128K x 32  
User Configurable as 256K x 16 or 512K x 8  
EEPROM  
WHITE ELECTRONIC DESIGNS CORP.  
Note1:PackageNotRecommendedForNewDesign  
15  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
WE128K32-XXX  
White Electronic Designs  
DEVICETYPE  
SPEED  
PACKAGE  
SMDNO.  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
300ns  
250ns  
200ns  
150ns  
140ns  
66 pin HIP (H1)  
66 pin HIP (H1)  
66 pin HIP (H1)  
66 pin HIP (H1)  
66 pin HIP (H1)  
5962-94585 01H5X  
5962-94585 02H5X  
5962-94585 03H5X  
5962-94585 04H5X  
5962-94585 05H5X  
128Kx32EEPROMModule  
128Kx32EEPROMModule  
300ns  
250ns  
66 pinHIP(H1,Ptypepinout)  
66 pinHIP(H1,Ptypepinout)  
5962-9458501H6X  
5962-9458502H6X  
128Kx32EEPROMModule  
128Kx32EEPROMModule  
128Kx32EEPROMModule  
200ns  
150ns  
140ns  
66 pinHIP(H1,Ptypepinout)  
66 pinHIP(H1,Ptypepinout)  
66 pinHIP(H1,Ptypepinout)  
5962-9458503H6X  
5962-9458504H6X  
5962-9458505H6X  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
128K x 32 EEPROM Module  
300ns  
250ns  
200ns  
150ns  
140ns  
68 lead CQFP/J (G2U)1  
68 lead CQFP/J (G2U)1  
68 lead CQFP/J (G2U)1  
68 lead CQFP/J (G2U)1  
68 lead CQFP/J (G2U)1  
5962-94585 01HMX  
5962-94585 02HMX  
5962-94585 03HMX  
5962-94585 04HMX  
5962-94585 05HMX  
128Kx32EEPROMModule  
128Kx32EEPROMModule  
128Kx32EEPROMModule  
128Kx32EEPROMModule  
128Kx32EEPROMModule  
300ns  
250ns  
200ns  
150ns  
140ns  
68leadCQFP(G1U)  
68leadCQFP(G1U)  
68leadCQFP(G1U)  
68leadCQFP(G1U)  
68leadCQFP(G1U)  
5962-9458501H9X  
5962-9458502H9X  
5962-9458503H9X  
5962-9458504H9X  
5962-9458505H9X  
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520  
16  

相关型号:

WE128K32-200G2UIA

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQFP68, 22.40 MM, CERAMIC, LQFP-68

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WEDC

WE128K32-200G2UM

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQFP68, 22.40 MM, CERAMIC, LQFP-68

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WEDC

WE128K32-200G2UQ

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQFP68, 22.40 MM, CERAMIC, LQFP-68

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WEDC

WE128K32-200G2UQA

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQFP68, 22.40 MM, CERAMIC, LQFP-68

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WEDC

WE128K32-200G4C

x32 EEPROM Module

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ETC

WE128K32-200G4CA

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQMA68, CERAMIC, QFP-68

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MICROSEMI

WE128K32-200G4I

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQMA68, CERAMIC, QFP-68

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MICROSEMI

WE128K32-200G4IA

EEPROM Module, 128KX32, 200ns, Parallel, CMOS, CQMA68, CERAMIC, QFP-68

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MICROSEMI

WE128K32-200G4M

x32 EEPROM Module

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ETC

WE128K32-200G4MA

x32 EEPROM Module

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ETC

WE128K32-200G4Q

x32 EEPROM Module

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ETC

WE128K32-200G4QA

x32 EEPROM Module

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ETC