WED7G512ATA33ADI25 [WEDC]
Flash Memory,;
| 型号： | WED7G512ATA33ADI25 |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | Flash Memory, |
| 文件： | 总4页 (文件大小：239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WED7GxxxATA33
White Electronic Designs
PRELIMINARY*
DIMMDrive Solid State ATA Flash Module
FEATURES
DESCRIPTION
The DIMMDrive WED7GxxxATA33 is a high performance single
chip flash disk module available in 144 Pin SO-DIMM package.
The module is based on SanDisk NAND Flash technology and
utilizes the 128Mb, 256Mb, 512Mb or 1Gb memory components
to provide the maximum in module density.
144 Pin SO-DIMM, JEDEC package
Plug-and-play solid state disk
NAND Flash memory technology by SanDisk
PC CARD ATA compatible - memory mapped or I/O operation
3.3 volt & 5.0 volt power supply operation
16MB - 768MB memory density
- (1GB - Q3/02)
The DIMMDrive WED7GxxxATA33 utilizes a SanDisk Flash
ChipSet controller which is designed specifically for use as a
Flash mass storage controller for the SanDisk memory devices.
This interface allows a host computer to issue commands to
read or write blocks of memory in the Flash memory array. The
intelligence to manage the interface protocols, data storage and
retrieval as well as ECC, defect handling and diagnostics are
controlled by this device. Automatic power management and
clock control is handled by the controller as well.
Low Power Consumption
ECC error correction
Supports true IDE mode
8Kbyte data buffers
The DIMMDrive WED7GxxxATA33 module will have the same
functionality and capabilities of an intelligent ATA (IDE) disk
drive. An advantage of the on board Flash controller and it's
ATA command set, is the ease of software development by
the user. Once the device has been configured by the user, it
appears to the host as a standard ATA disk drive. Additional
ATA commands have been provided to enhance the system
performance.
Broad O/S support: DOS, Linux, Windows 3.X, Windows 95,
Windows NT4.0/5.0, Windows CE, others
Compatible with major processors: x86, Media GX,
PowerPC, 68K, MIPS, SHx, StrongArm, others
Full Hard Disk emulation and Boot capability
Easy to use interface, JEDEC standard
Supports power down commands and sleep modes
Commercial temperature range 0C + 70C
Industrial temperature range -40C +85C
The on-board controller is a highly integrated solution and
the controller is designed to handle all intelligent operations,
even the rare cases when new defects arise and need to be
mapped out or replaced by a spare. The hardware performs
the complicated task of ECC detection and correction and
will return good data to the host. The controller manages all
defects and errors and makes the Flash memory appear as
perfect memory to the host.
MODULE APPLICATIONS
Embedded systems
Internet Access Devices
Set Top Boxes
The DIMMDrive WED7GxxxATA33 module also provides a
more cost effective solution to the traditional hard disk media.
The module is perfect for applications requiring upgradeability
to higher densities and for those applications with limited space
availability and power consumption requirements.
WEB Browser
Routers, Networking
WEB phones, car PC, DVD, HPC
Point-of-sale
Unlike standard IDE drives, no cables or extra space is required.
The module has no moving parts providing significant reduction
in power consumption and increasing reliability. Simply insert
the module into a standard 144 Pin SO-DIMM socket and you
then have a bootable flash disk.
Medical and Telecom
Other applications requiring embedded or solid state
storage
* This datasheet is preliminary, therefore all specifications are subject to change
without notice.
The DIMMDrive WED7GxxxATA33 is available with memory
densities of 16MB to 768MB today with 1GB density available
in Q3/02.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July, 2002
Rev. 0
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WED7GxxxATA33
White Electronic Designs
PRELIMINARY*
MODULE PINOUT
PIN SIGNAL NOTE PIN SIGNAL NOTE PIN
SIGNAL NOTE PIN
SIGNAL NOTE
1
2
3
4
5
6
7
8
9
VSS
VSS
37
38 Reserved
39 DQ9
40 Reserved
41 DQ10
42 Reserved
43 DQ11
44 Reserved
DQ8
1
1
1
1
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
OE#
109
110
111
A0
NC
A10
2
IO16
3
DQ0
VSS
4
Reserved
DQ1
VSS
112 Reserved
Reserved
Reserved
Reserved
Reserved
VCC
113
114
VCC
VCC
Reserved
DQ2
115 Reserved
116 Reserved
117 Reserved
118 Reserved
Reserved
DQ3
45
46
47
VCC
VCC
10 Reserved
VCC
11
12
13
VCC
VCC
DQ12
1
1
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
VSS
119
120
VSS
VSS
48 Reserved
49 DQ13
50 Reserved
51 DQ14
52 Reserved
53 DQ15
54 Reserved
DQ4
121 Reserved
122 Reserved
123 Reserved
124 Reserved
125 Reserved
126 Reserved
127 Reserved
128 Reserved
14 Reserved
15 DQ5
16 Reserved
17 DQ6
18 Reserved
19 DQ7
20 Reserved
55
56
VSS
VSS
VSS
21
22
23
VSS
VSS
57 Reserved
58 Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
129
130
VCC
VCC
CE0#
59
60
61
62
63
64
65
66
67
68
Busy
NC
4
131 Reserved
132 Reserved
133 Reserved
134 Reserved
135 Reserved
136 Reserved
137 Reserved
138 Reserved
24 Reserved
25 CE1#
26 Reserved
1
BVD1
BVD2
VCC
3
3
27
28
29
30
31
32
33
34
35
36
VCC
VCC
A0
VCC
100 Reserved
RST
IOWR
WE#
IORD
4
3
101
102
103
104
105
106
107
108
VCC
VCC
A6
A3
A1
2
2
2
139
140
VSS
VSS
A4
2
2
3
3
3
A7
A2
69 Reserved
70 REG
71 Reserved
72 INPACK
A8
141 Reserved
142 Reserved
A5
NC
VSS
VSS
VSS
VSS
143
144
VCC
VCC
Note: 1.) 16-Bit bus mode signals not used (floating) in 9-bit mode
CE1# signal in 16-bit only mode should be tied to CE0#
2.) Optional addresses, do not have to be connected for module use in Memory Mapped Mode
3.) Optional test signals not used in Memory Mapped Mode
4.) Busy, RST and A10 signals are optional in Memory Mapped Mode
NC - pins internally not connected
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July, 2002
Rev. 0
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WED7GxxxATA33
White Electronic Designs
PRELIMINARY*
SIGNAL DESCRIPTION
Signal Name
Description
DQ0-DQ7, DQ8-DQ15
Data bus can either be 8-bits or 16-bits wide depending on selection of CE0# and CE1#
CE1# always selects the odd byte of the word. CE0# accesses the even or odd byte depending on A0 and CE1#. For 8-bit
systems, CE0# is used and for 16-bit systems, both CE0# and CE1# are used. Both CE0# and CE1# should be decoded
by the logic to determine the memory window.
CE0#, CE1#
This is an output enable strobe generated by the host interface. It is used to read data from the Flash ChipSet in Memory
Mode and to read the CIS and configuration registers
OE#
The write enable pin is driven by the host and used for strobing data to the registers of the Flash ChipSet when the Flash
ChipSet is configured in the memory interface mode. It is also used for writing the configuration registers.
WE#
A0-A3 selects the basic registers of the controller to communicate to the module. This requires 16 bytes of host address
space. A0 is optional if CE0# and CE1# are combined to enable 16-bit wide register access.
A0-A10
Busy
The Busy signal is driven low when the product is accessing memory. When Busy is high, register access is allowed. After
a data transfer command is issued, this signal is used to signify that the host can transfer data.
RST
When RST is high, the product is placed in a reset mode. This signal is only valid at power on.
This signal is driven high since a battery is not used with this product
This output line is always driven to a high state in Memory Mode since a batery is not required for this product
This signal is not used in the memory mode.
BVD1
BVD2
IOWR
IORD
This signal is not used in the memory mode.
This signal is used during Memory Cycles to distinguish between common memory and register memory accesses. High
for common memory, low for attribute memory.
REG
INPACK
IO16
This signal is not used in the memory mode.
Optional test signals not used in the Memory Mapped Mode.
Pins are reserved for future expansion and must be left floating.
Power pins. All VCC pins must be connected.
Reserved
VCC
VSS
Ground pins. All VSS pins must be connected.
No connect. Pin internally not connected.
NC
BLOCK DIAGRAM
A0 - A10
6
CE0
n
2
1
D0 - D7
Data
SanDisk
Controller
Control
NAND
Flash
D8 - D15
CE1
Control signals used
in other modes (see
pin list)
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July, 2002
Rev. 0
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WED7GxxxATA33
White Electronic Designs
PRELIMINARY*
PACKAGE
.150
2.660
MAX.
C10
C14
C8
C9
J3
J4
C1
C0
C16
C6
.157
R8
C7
C15
R7
U1
J1
M1
M0
1.045
R1
R2
U2
.157
MIN.
J6
J2 C11 C12 C17
.787
D1
J5
U3
R3
R4
C13
P1
.913
1.291
.181
.050
± .0039
1.112
P 2
C 2
M 4
M 5
M 3
M 2
C 5
C 3
C 4
ALL DIMENSIONS ARE IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July, 2002
Rev. 0
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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