WED7P1G0CFA7001I25 [WEDC]

CompactFlashTM Card; CompactFlashTM卡
WED7P1G0CFA7001I25
型号: WED7P1G0CFA7001I25
厂家: WHITE ELECTRONIC DESIGNS CORPORATION    WHITE ELECTRONIC DESIGNS CORPORATION
描述:

CompactFlashTM Card
CompactFlashTM卡

文件: 总15页 (文件大小:274K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
WED7PxxxCFA70xxI25  
White Electronic Designs  
CompactFlashTM Card  
perfect choice for solid-state mass-storage in industrial  
applications and applications that require performance and  
extended environmental tolerances. Other applications  
include handheld devices such as Digital Cameras, Audio  
Players, and PDAs.  
FEATURES  
CompactFlashTM Compatibility  
• 3.3V or 5.0V single power supply.  
• 50 pin two piece connector with Type-I form  
factor (3.3mm thickness)  
Dimensions:  
• Support for CIS implementation with 256 bytes of  
attribute memory  
Type I card : 36.4mm(L) x 42.8mm (W) x 3.3mm (H)  
Lead free and RoHS compliant  
Storage Capacities:  
Interface modes  
• PC card memory mode  
• PC card I/O mode  
• True IDE mode  
128MB, 256MB, 512MB and 1.02GB (unformatted)  
Operating Voltage:  
3.3V 5%  
5.0V 0.5V  
High performance  
• Interface Transfer speed in PIO mode 4 or Multi  
Word DMA mode 2 cycle timing, 16.6 Mbytes/  
second (theoretical)  
Power consumption:  
• 5V operation  
Active mode:  
• Sustained write: max 6.0 Mbytes/s in ATA PIO  
mode 4 cycle timing  
Write operation: 28 mA (Typ.)  
Read operation: 23 mA (Typ.)  
Power down mode: 1.2mA (Typ.) 2.0mA (max.)  
• Sustained read: max 6.5 Mbytes/s in ATA PIO  
mode 4 cycle timing  
W/E Endurance: 100,000cycles1 /300,000cycles2  
• 3.3V operation  
Active mode:  
Write operation: 25 mA (Typ.)  
Read operation: 21 mA (Typ.)  
Power down mode: 1.0mA (Typ.) 1.5mA (max.)  
Notes: 1. TA = -40 to 85°C  
2. TA = 0 to 70°C  
Environment conditions:  
DESCRIPTION  
• Operating temperature: -40°C to 85°C  
• Storage temperature: -45°C to 90°C  
• Storage humidity: 95% (max) (No condensation)  
The WED7PxxxCFA70xxI25 series CompactFlash™ card  
is an ATA interface flash memory card based on flash  
technology. The CompactFlash™ card is constructed with  
a flash disk controller chip and NAND-type flash memory  
device. Operates from a single 5-Volt or 3.3-Volt power  
source. The card is available in CompactFlash™ type-I  
form factor with 128MB, 256MB, 512MB and 1.02GB  
unformatted capacity. Being able to emulate IDE hard disk  
drives and certified in accordance with the CompactFlash™  
Certification Plan, WEDC’s CompactFlash™ card is a  
* This product is subject to change without notice.  
Notes: CompactFlash™ is a trademark of SanDisk Corporation and is licensed royalty-  
free to the CFA, which in turn will license it royalty-free to CFA members.  
CFA: CompactFlash™ Association.  
PRODUCT TYPES  
Card Density  
128MB  
256MB  
512MB  
1.02GB  
Model No.  
Cylinder  
978  
Head  
Sector  
32  
32  
63  
63  
Memory capacity1  
128,188,416 Byte  
256,376,832 Byte  
512,483,328 Byte  
1024,450,560 Byte  
7P128CFA70xxI25  
7P256CFA70xxI25  
7P512CFA70xxI25  
7P1G0CFA70xxI25  
8
978  
993  
1985  
16  
16  
16  
1: It is the logical address capacity including the area used for File System.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
PIN ASSIGNMENTS AND PIN TYPE  
PC Card Memory Mode  
PC Card I/O Mode  
True IDE Mode  
Signal  
Name  
In, Out  
Type  
Signal  
Pin Type  
Name  
GND  
In, Out  
Type  
Signal  
In, Out  
Type  
Pin  
Pin Type  
Pin  
Pin  
Pin Type  
Name  
GND  
D03  
1
2
3
4
5
6
7
8
9
GND  
D03  
D04  
D05  
D06  
D07  
CE1#  
A10  
Ground  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I3U  
1
2
3
4
5
6
7
8
9
Ground  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I3U  
1
2
3
4
5
6
7
8
9
Ground  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I3U  
I/O  
I/O  
I/O  
I/O  
I/O  
I
D03  
D04  
D05  
D06  
D07  
CE1#  
A10  
I/O  
I/O  
I/O  
I/O  
I/O  
I
I/O  
I/O  
I/O  
I/O  
I/O  
I
D04  
D05  
D06  
D07  
CS0#  
I
I
I3Z  
I4U  
I
I3Z  
I4U  
A102  
I
I
I3Z  
I4U  
OE#  
OE#  
I
ATA# SEL  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
A09  
A08  
A07  
VCC  
A06  
A05  
A04  
A03  
A02  
A01  
A00  
D00  
D01  
D02  
WP  
CD2#  
CD1#  
D111  
D121  
D131  
D141  
D151  
CE21#  
VS1#  
IORD#  
IOWR#  
WE#  
READY  
VCC  
I
I
I
I3Z  
I3Z  
I3Z  
Power  
I3Z  
I3Z  
I3Z  
I3Z  
I3Z  
I3Z  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
A09  
A08  
A07  
VCC  
A06  
A05  
A04  
A03  
A02  
A01  
A00  
D00  
D01  
I
I
I
I3Z  
I3Z  
I3Z  
Power  
I3Z  
I3Z  
I3Z  
I3Z  
I3Z  
I3Z  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
A092  
I
I
I
I3Z  
I3Z  
I3Z  
Power  
I3Z  
I3Z  
I3Z  
I3Z  
I3Z  
I3Z  
A082  
A072  
VCC  
I
I
I
I
I
I
I
I
I
I
A062  
I
I
I
I
I
A052  
A042  
A032  
A02  
A01  
A00  
D00  
D01  
D02  
IOIS16#  
CD2#  
CD1#  
D111  
I
I
I
I
I
I
I3Z  
I3Z  
I3Z  
I/O  
I/O  
I/O  
O
O
O
I/O  
I/O  
I/O  
I/O  
I/O  
I
O
I
I
I
O
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
OT1  
Ground  
Ground  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I3U  
Ground  
I4U  
I4U  
I4U  
OT1  
I/O  
I/O  
I/O  
O
O
O
I/O  
I/O  
I/O  
I/O  
I/O  
I
O
I
I
I
O
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
OT1  
Ground  
Ground  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I3U  
Ground  
I4U  
I4U  
I4U  
OT1  
I/O  
I/O  
I/O  
O
O
O
I/O  
I/O  
I/O  
I/O  
I/O  
I
O
I
I
I
O
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
ON1  
Ground  
Ground  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
I3U  
Ground  
I4U  
I4U  
I4U  
OZ1  
D02  
IOIS16#  
CD2#  
CD1#  
D111  
D121  
D131  
D141  
D151  
CE21#  
VS1#  
IORD#  
IOWR#  
WE#  
IREQ#  
VCC  
D121  
D131  
D141  
D151  
CS11#  
VS1#  
DIOR#  
DIOW#  
WE3#  
INTRQ  
VCC  
Power  
I1U  
OPEN  
I3U  
Power  
I1U  
OPEN  
I3U  
Power  
I1U  
OPEN  
I3U  
CSEL#  
VS2#  
RESET  
I
O
I
CSEL#  
VS2#  
RESET  
I
O
I
CSEL#  
VS2#  
RESET#  
I
O
I
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
PIN ASSIGNMENTS AND PIN TYPE (cont'd)  
PC Card Memory Mode  
PC Card I/O Mode  
True IDE Mode  
Signal  
Name  
In, Out  
Type  
OT1  
OT1  
Signal  
Pin Type  
Name  
In, Out  
Type  
OT1  
OT1  
Signal  
In, Out  
Type  
ON1  
OZ1  
Pin  
Pin Type  
Pin  
Pin  
Pin Type  
Name  
IORDY  
DMARQ  
DMACK#  
DASP#  
PDIAG#  
D081  
42  
43  
44  
45  
46  
47  
48  
49  
50  
WAIT#  
INPACK#  
REG#  
BVD2  
BVD1  
D081  
O
O
42  
43  
44  
45  
46  
47  
48  
49  
50  
WAIT#  
INPACK#  
REG#  
O
O
42  
43  
44  
45  
46  
47  
48  
49  
50  
O
O
I
I3U  
I
I3U  
I
I3U  
I/O  
I/O  
I/O  
I/O  
I/O  
I4U,OT1  
I4U,OT1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
Ground  
SPKR#  
STSCHG#  
D081  
D091  
D101  
I/O  
I/O  
I/O  
I/O  
I/O  
I4U,OT1  
I4U,OT1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
Ground  
I/O  
I/O  
I/O  
I/O  
I/O  
I4U,ON1  
I4U,ON1  
I4Z,OZ1  
I4Z,OZ1  
I4Z,OZ1  
Ground  
D091  
D101  
D091  
D101  
GND  
GND  
GND  
Notes: 1. These signals are required only for 16 bit access and not required when installed in 8 bit systems. Devices allow for 3-state signals to consume no current.  
2. Should be grounded by the host.  
3. Should be tied to VCC by the host.  
ACCESS SPECIFICATIONS  
1. Attribute access specifications  
When CIS-ROM region or Configuration register region is accessed, read and write operations are executed under the  
condition of REG# = ”L” as follows. That region can be accessed by Byte/Word/Odd-byte modes, which are defined by  
PC card standard specifications.  
Attribute Read Access Mode  
Mode  
REG#  
CE2#  
CE1#  
A0  
X
OE#  
WE#  
X
D8 to D15  
High-Z  
High-Z  
High-Z  
invalid  
D0 to D7  
High-Z  
Standby mode  
X
L
L
L
L
H
H
H
L
H
L
X
L
L
L
L
L
H
even byte  
Invalid  
Byte access (8bit)  
L
H
X
H
Word access (16bit)  
Odd byte access (8bit)  
Note: X → L or H  
L
H
even byte  
High-Z  
L
H
X
H
invalid  
Attribute Write Access Mode  
Mode  
REG#  
CE2#  
CE1#  
A0  
X
OE#  
X
WE#  
D8 to D15  
Don’t care  
Don’t care  
Don’t care  
Don’t care  
Don’t care  
D0 to D7  
Don’t care  
even byte  
Don’t care  
even byte  
Don’t care  
Standby mode  
X
L
L
L
L
H
H
H
L
H
L
X
L
L
L
L
L
H
Byte access (8bit)  
L
H
X
H
Word access (16bit)  
L
H
Odd byte access (8bit)  
L
H
X
H
Note: X → L or H  
Write CIS-ROM region is invalid.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
2. Task File register access specifications  
There are two types of Task File register mapping, one is mapped I/O address area, the other is mapped Memory address  
area. Each type of Task File register read and write operation is executed under the condition as follows. That area can  
be accessed by Byte/Word/Odd Byte modes, which are defined by PC card standard specifications.  
(1) I/O address map – Task File Register Read Access Mode (1)  
Mode  
REG#  
CE2#  
CE1#  
A0  
X
IORD#  
IOWR#  
OE#  
X
WE#  
X
D8 to D15  
High-Z  
D0 to D7  
High-Z  
Standby mode  
X
L
L
L
L
H
H
H
L
H
L
X
L
L
L
L
X
H
H
H
H
L
H
H
High-Z  
even byte  
odd byte  
even byte  
High-Z  
Byte access (8bit)  
L
H
X
H
H
High-Z  
Word access (16bit)  
Odd byte access (8bit)  
Note: X → L or H  
L
H
H
odd byte  
odd byte  
L
H
X
H
H
Task File Register Write Access Mode (1)  
Mode  
REG#  
CE2#  
CE1#  
A0  
X
IORD#  
IOWR#  
OE#  
X
WE#  
X
D8 to D15  
Don’t care  
Don’t care  
Don’t care  
odd byte  
D0 to D7  
Don’t care  
even byte  
odd byte  
Standby mode  
X
L
L
L
L
H
H
H
L
H
L
X
H
H
H
H
X
L
L
L
L
L
H
H
Byte access (8bit)  
L
H
X
H
H
Word access (16bit)  
Odd byte access (8bit)  
Note: X → L or H  
L
H
H
even byte  
Don’t care  
L
H
X
H
H
odd byte  
(2) Memory address map – Task File Register Read Access Mode (2)  
Mode  
REG#  
CE2#  
CE1#  
A0  
X
OE#  
WE#  
X
IORD#  
IOWR#  
D8 to D15  
High-Z  
D0 to D7  
High-Z  
Standby mode  
X
H
H
H
H
H
H
H
L
H
L
X
L
L
L
L
X
H
H
H
H
X
H
H
H
H
L
H
High-Z  
even byte  
odd byte  
even byte  
High-Z  
Byte access (8bit)  
L
H
X
H
High-Z  
Word access (16bit)  
Odd byte access (8bit)  
Note: X → L or H  
L
H
odd byte  
odd byte  
L
H
X
H
Task File Register Write Access Mode (2)  
Mode  
REG#  
CE2#  
CE1#  
A0  
X
OE#  
X
WE#  
IORD#  
IOWR#  
D8 to D15  
Don’t care  
Don’t care  
Don’t care  
odd byte  
D0 to D7  
Don’t care  
even byte  
odd byte  
Standby mode  
X
H
H
H
H
H
H
H
L
H
L
X
L
L
L
L
X
H
H
H
H
X
H
H
H
H
L
H
Byte access (8bit)  
L
H
X
H
Word access (16bit)  
Odd byte access (8bit)  
Note: X → L or H  
L
H
even byte  
Don’t care  
L
H
X
H
odd byte  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
3. TRUE IDE MODE  
The card can be configured in a True IDE. This card is configured in this mode only when the OE# input signal is asserted  
to GND by the host during power on . In this True IDE mode Attribute Registers are not accessible from the host. Only  
I/O operation to the task file and data register is allowed. If this card is configured during power on sequence, data  
register is accessed in word (16-bit). The card permits 8-bit accesses if the user issues a Set Feature Command to put  
the device in 8-bit mode.  
True IDE Mode Read I/O Function  
Mode  
CE2#  
CE1#  
A0~A2 DMACK# DIOR#  
DIOW#  
D8~D15  
High-Z  
D0~D7  
High-Z  
Invalid mode  
L
H
H
H
L
L
H
L
X
X
X
H
H
L
X
X
L
L
L
L
X
X
H
H
H
H
Standby mode  
High-Z  
High-Z  
PIO Data register access  
Multiword DMA Data register access  
Alternate status access  
Other task file access  
Note: X → L or H  
0
Odd byte  
Odd byte  
High-Z  
even byte  
even byte  
Status out  
Data  
H
H
L
X
6H  
1~7H  
H
H
H
High-Z  
True IDE Mode Write I/O Function  
Mode  
CE2#  
CE1#  
A0~A2  
DMACK#  
DIOR#  
DIOW#  
D8~D15  
Don’t care  
Don’t care  
Odd byte  
Odd byte  
Don’t care  
Don’t care  
D0~D7  
Don’t care  
Don’t care  
even byte  
even byte  
Control in  
Data  
Invalid mode  
L
H
H
H
L
L
H
L
X
X
X
H
H
L
X
X
H
H
H
H
X
X
L
L
L
L
Standby mode  
PIO Data register access  
Multiword DMA Data register access  
Control register access  
Other task file access  
Note: X → L or H  
0
H
H
L
X
6H  
1~7H  
H
H
H
CARD SYSTEM PERFORMANCE  
ITEM  
PERFORMANCE  
250 ms (max.)  
5.5 ms (max.)  
Set up time (Reset to Ready)  
Set up time (Power down to Ready)  
Data transfer rate to / from host  
Sustained read transfer rate  
16.6 M byte / s burst (max.), theoretically  
6.5 M byte / s (max.), actually *1  
6.0 M byte / s (max.), actually *1  
4 ms (max.)  
Sustained write transfer rate  
Command to DRQ (Sector Re ad at Ready state)  
Command to DRQ (Sector Write at Ready state)  
Data transfer cycle end to ready (Sector write)  
Auto Power down time  
700 ms (max.)  
2 ms (typ.), 200 ms (max.)  
1.5s (min.), 1.8s (typ.)  
Notes:  
1. The actual transfer rate is measured under ATA PIO mode 4 with single cycle time as 120ns.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
ELECTRICAL SPECIFICATION  
SYMBOL  
VIN, VOUT  
VCC  
PARAMETER  
MIN  
-0.3  
-0.6  
MAX  
VCC+0.3  
6.0  
TYP  
UNIT  
V
All input / output voltage  
Power Supply Voltage  
(Absolute Maximum Ratings)  
V
4.5  
3.135  
-40  
5.5  
3.465  
85  
5.0  
3.3  
V
V
Power Supply Voltage  
VCC  
(Recommended Operation Condition)  
TOPR  
TSTG  
Operating Temperature  
Storage Temperature  
°C  
°C  
-45  
90  
Input Leakage Current  
Type  
IxZ  
SYMBOL  
IL  
PARAMETER  
CONDITION  
IH = Vcc / VIL = GND  
MIN  
-1  
MAX  
1
TYP  
UNIT  
µA  
NOTES  
Input leakage current  
Pull Up Resistor  
Pull Down Resister  
V
*1  
*1  
*1  
IxU  
RPU1  
RPD1  
Vcc = 5.0V  
Vcc = 5.0V  
50  
500  
500  
kΩ  
IxD  
50  
kΩ  
Notes:  
1. x refers to the characteristics described in section “DC Characteristics ( Input Characteristics)”. For example, I1U indicates a pull up resister with a type 1 input characteristics.  
Output Drive Type  
Type  
OTx  
OZx  
OPx  
ONx  
OUTPUT TYPE  
Totempole  
VALID CONDITIONS  
IOH & IOL  
NOTES  
*1  
*1  
*1  
*1  
Tri-State N-P Channel  
P-Channel only  
N-Channel only  
IOH & IOL  
IOH Only  
IOL Only  
Notes:  
1. x refers to the characteristics described in section “DC Characteristics ( Output Drive Characteristics)”. Fo r example, OT1 refers to Totempole output with a type 1 Output drive  
characteristics.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
DC CHARACTERISTICS  
VCC = 3.3 V 5ꢀ, 5 V 0.5V, -40°C ≤ TA ≤ 85°C  
SYMBOL PARAMETER  
MIN  
MAX  
1
TYP.  
UNIT  
µA  
TEST CONDITIONS  
ILI  
Input leakage current  
ILO  
IPU  
IPD  
Output leakage current  
Pull-up current (Resistivity)  
Pull-down current (Resistivity)  
1
43 (75)  
-43 (75)  
µA  
µA (kΩ)  
µA (kΩ)  
VOUT = high impedance  
VFORCE = 3.3V  
VFORCE = 0V  
1.5  
2.0  
1.0  
1.2  
VCC = 3.3V  
VCC = 5V  
ICCS  
Power down mode current  
mA  
Operating current @ 3.3V  
Write operation  
Read operation  
Operating current @ 5V  
Write operation  
Read operation  
25  
21  
mA  
VCC = 3.3V operation  
VCC = 5V operation  
ICCO  
28  
23  
mA  
Input Characteristics  
Type  
SYMBOL  
PARAMETER  
MIN  
MAX  
TYP  
UNIT  
CONDITION  
2.0  
2.0  
VCC = 3.3 V  
VCC = 5 V  
VIH  
Input High Voltage CMOS  
1
1.0  
1.0  
VCC = 3.3 V  
VCC = 5 V  
VCC = 3.3 V  
VCC = 5 V  
VCC = 3.3 V  
VCC = 5 V  
VCC = 3.3 V  
VCC = 5 V  
VCC = 3.3 V  
VCC = 5 V  
VCC = 3.3 V  
VCC = 5 V  
VIL  
VIH  
VIL  
VT+  
VT-  
Vt  
Input Low Voltage CMOS  
Input High Voltage  
2.0  
2.0  
2
3
1.0  
0.8  
2.5  
2.5  
Input Low Voltage CMOS  
Input Low to High threshold  
Schmitt trigger  
Input High to Low threshold  
Schmitt trigger  
2.1  
2.1  
1.2  
1.2  
V
0.9  
0.9  
0.5  
0.8  
Hysteresis voltage  
Input Low to High threshold  
Schmitt trigger  
Input High to Low threshold  
Schmit trigger  
2.3  
2.0  
2.1  
1.8  
1.2  
1.1  
VCC = 3.3 V  
VCC = 5 V  
VCC = 3.3 V  
VCC = 5 V  
VT+  
VT-  
Vt  
1.0  
0.8  
0.5  
0.8  
4
VCC = 3.3 V  
Hysteresis voltage  
VCC = 5 V  
Output Drive Characteristics  
Type  
SYMBOL  
VOH  
PARAMETER  
MIN  
VCC - 0.8  
MAX  
TYP  
UNIT  
CONDITION  
Output High Voltage  
Output Low Voltage  
IOH = -4mA  
IOL = 4mA  
1
V
VOL  
Gnd + 0.4  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
AC CHARACTERISTICS  
VCC = 3.3 V 5ꢀ, 5 V 0.5V, -40°C ≤ TA ≤ 85°C  
Attribute Memory Read AC Characteristics  
SYMBOL  
PARAMETER  
Read cycle time  
Address access time  
CE# access time  
OE# access time  
Output disable time (CE#)  
Output disable time (OE#)  
Output enable time (CE#)  
Output enable time (OE#)  
Data valid time (A)  
MIN  
MAX  
UNIT  
tC  
tA  
tA  
250  
5
250  
250  
125  
100  
100  
tA  
tDIS  
tDIS  
tEN  
tEN  
tV  
ns  
5
0
tSU  
Address setup time  
30  
Attribute Memory Write AC Characteristics  
SYMBOL  
PARAMETER  
Write cycle time  
Write pulse time  
Address setup time  
Data setup time (-WE)  
Data hold time  
MIN  
MAX  
UNIT  
tC  
tW  
tSU  
tSU  
tH  
250  
150  
30  
80  
30  
ns  
tREC  
Write recover time  
30  
I/O Access Read AC Characteristics  
SYMBOL  
PARAMETER  
Data delay after IORD#  
MIN  
0
165  
70  
20  
5
20  
5
0
0
MAX  
100  
UNIT  
tD  
tH  
tW  
Data hold following IORD#  
IORD# pulse width  
Address setup before IORD#  
Address hold following IORD#  
CE# setup before IORD#  
CE# hold following IORD#  
REG# setup before IORD#  
REG# hold following -IORD  
INPACK# delay failing from IORD#  
INPACK# delay rising from IORD#  
IOIS#16 delay failing from address  
IOIS#16 delay rising from address  
t
SUA  
tHA  
tSUCE  
tHCE  
ns  
t
SUREG  
tHREG  
tDFINPACK  
tDRINPACK  
tDFIOIS16  
45  
45  
35  
35  
t
DRIOIS16  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
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WED7PxxxCFA70xxI25  
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I/O Access Write AC Characteristics  
SYMBOL  
tSU  
tH  
PARAMETER  
MIN  
60  
30  
165  
70  
20  
5
20  
5
0
MAX  
UNIT  
Data setup before IOWR#  
Data hold following IOWR#  
IOWR# pulse width  
tW  
t
SUA  
Address setup before IOWR#  
Address hold following IOWR#  
CE# setup before IOWR#  
CE# hold following IOWR#  
REG# setup before IOWR#  
REG# hold following IOWR#  
IOIS16# delay failing from address  
IOIS16# delay rising from address  
tHA  
tSUCE  
tHCE  
tSUREG  
tHREG  
tDFIOIS16  
ns  
35  
35  
t
DRIOIS16  
Common Memory Access Read AC Characteristics  
SYMBOL  
PARAMETER  
OE# access time  
MIN  
30  
20  
0
MAX  
UNIT  
tA  
tDIS  
tSU  
tH  
tSU  
tH  
125  
100  
Output disable time (OE#)  
Address setup time  
Address hold time  
CE# setup before OE#  
OE# hold following OE#  
ns  
20  
Common Memory Access Write AC Characteristics  
SYMBOL  
tSU  
tH  
tW  
tH  
tSU  
tSU  
tREC  
tH  
PARAMETER  
MIN  
80  
30  
150  
20  
30  
0
MAX  
UNIT  
Data setup before WE#  
Data hold following WE#  
Write pulse width  
Address hold time  
Address setup time  
CE# setup time  
ns  
Write recover time  
CE# hold following WE#  
30  
20  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
9
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
True IDE Mode IO Read/Write AC Characteristics  
SYMBOL  
PARAMETER  
Cycle time  
MIN  
120  
25  
70  
70  
25  
20  
10  
20  
5
MAX  
UNIT  
t0  
t1  
t2  
t2  
t2i  
t3  
t4  
t5  
t6  
t6z  
t7  
t8  
t9  
Address valid to -DIOW/-DIOR setup  
DIOW#/-DIOR  
DIOW#/-DIOR Register (8bit)  
DIOW#/-DIOR recoverry time  
DIOW# data setup  
DIOW# data hold  
DIOR# data setup  
DIOR# data hold  
DIOR# data tristate  
ns  
10  
30  
35  
35  
Address valid to -IOIS16 assertion  
Address valid to -IOIS16 released  
DIOW#/-DIOR to address valid hold  
True IDE Mode Multiword DMA Read/Write AC Characteristics  
SYMBOL  
t0  
PARAMETER  
MIN  
120  
70  
5
MAX  
50  
UNIT  
Cycle time  
DIOR#/DIOW# assert width  
DIOR# data access  
tD  
tE  
tF  
DIOR# data hold  
tG  
tH  
tI  
tJ  
tKR  
tKW  
tLR  
tLW  
tM  
DIOW#/DIOR# data setup  
DIOW# data hold  
20  
10  
0
35  
35  
DMACK# to DIOR#/DIOW# setup  
DIOR#/DIOW# to DMACK hold  
DIOR# negated width  
DIOW# negated width  
DIOR# to DMARQ delay  
DIOW# to DMARQ delay  
CS0#/CS1# valid to -DIOR#/-DIOW#  
CS0#/CS1# hold  
5
ns  
25  
25  
25  
10  
tN  
tZ  
25  
DMACK# to read data released  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
10  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
Reset Characteristics (only Memory Card Mode or I/O Card Mode)  
SYMBOL  
PARAMETER  
MIN  
100  
1
MAX  
UNIT  
m s  
µs  
tSU  
tREC  
tPR  
tPF  
tW  
Reset setup time  
CE# recover time  
VCC rising up time  
VCC falling down time  
0.1  
3
100  
300  
m s  
m s  
µs  
10  
1
tH  
Reset pulse width  
m s  
m s  
tS  
0
Power on Reset Characteristics  
Power on reset sequence must need by PORST# at the rising edge of VCC  
.
SYMBOL  
tSU  
PARAMETER  
MIN  
100  
0.1  
MAX  
UNIT  
m s  
CE# setup time  
tPR  
VCC rising up time  
100  
m s  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
11  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
PACKAGE DIMENSIONS  
Top View  
1.60mm ± ±.05  
(.063 in ± ± 002)  
.99mm ± ±.05  
(.039 in ±±  002)  
50  
25  
26  
1
2.44mm ± ±.07  
(.096 in ± ± 003)  
3.30mm ±± .10  
(.130 in ± ± 004)  
.01mm ± ±.07(.039 in ± ± 003) .01mm ± ±.07(.039 in ± ± 003)  
Optional Configuration  
(See Note)  
2.15mm ± ±.07  
(.085 in x .003)  
0.76mm ± ±.07(0.30 in ± ± 003)  
0.63mm ±± .07(.025 in ±±  003)  
41.66mm ± ±.13(1.640 in ±  ± 005)  
42.80mm ± ±.10(1.685 in ± ± 004)  
4xR 0.5mm± ±.1  
(4xR.020 in ±±  004)  
Note: The optional notched configuration was shown in the CF Specification Rev.1.0. In Specification  
Rev. 1.2. The notch was removed for ease of tooling. This optional configuration can be used  
but it is not recommended.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
12  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
ATTENTION FOR CARD USE  
In the reset or power off mode, the information in all registers are cleared.  
Note that the card insertion/removal should not be executed while host is active if the card is used in True IDE  
mode.  
After the hard reset, soft reset or power-on reset or ATA reset command is applied the card cannot be accessed  
while READY pin is “low.” Flash card can’t be operated in this mode.  
Before insertion VCC cannot be supplied to the card. After confirmation that CD1#, CD2# pins are set, VCC may  
be supplied to the card.  
OE# must be kept at the VCC level during power on reset in memory card mode and I/O card mode. OE must be  
kept constantly at the GND level in True IDE mode.  
Do not turn off the power or remove WED7PxxxCFA70xxI25 Series from the slot before read/write operation is  
complete. Avoid using WED7PxxxCFA70xxI25 Series when the battery is low. Power shortage, power failure  
and/or removal of WED7PxxxCFA70xxI25 Series from the slot before read/write operation is complete may  
cause malfunction of WED7PxxxCFA70xxI25 Series, data loss and/or damage to data.  
Routine performance of backing-up data (or taking back-up of data) is strongly recommended.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
13  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
PART NUMBERING GUIDE  
WED 7P xxx CFA 70 xx I 25  
WEDC  
Flash  
Memory Size  
Compact Flash  
Industrial Flash  
Housing:  
00 = WEDC Logo  
01 = Blank Housing  
Enhanced Industrial Temp  
Speed  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
14  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WED7PxxxCFA70xxI25  
White Electronic Designs  
Document Title  
128MB to 1GB Industrial Compact Flash  
Revision History  
Rev #  
History  
Release Date Status  
Rev 0  
Initial Release  
March 2005  
Final  
Rev 1  
1.1 Added "ED" to part marking  
July 2005  
Final  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
July 2005  
Rev. 1  
15  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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