WF128K32N-120H1Q5中文资料_数据手册_规格书

WF128K32-XXX5

White Electronic Designs

128KX32 5V FLASH MODULE, SMD 5962-94716

FEATURES

ꢀ

Commercial, Industrial and Military Temperature

Ranges

ꢀ

Access Times of 50**, 60, 70, 90, 120, 150ns

Packaging:

ꢀ

5 Volt Programming. 5V 10ꢀ Supply

Low Power CMOS, 1mA Standby Typical

Embedded Erase and Program Algorithms

TTL Compatible Inputs and CMOS Outputs

•

66 pin, PGA Type, 1.075 inch square, Hermetic

Ceramic HIP (Package 400)

•

68 lead, Hermetic CQFP (G2U), 22.4mm

(0.880 inch) square, 3.56mm (0.140 inch) high

(Package 510)

Built-in Decoupling Caps and Multiple Ground Pins

for Low Noise Operation

•

68 lead, Hermetic CQFP (G2L), 22.4mm

(0.880 inch) square, 4.06mm (0.160 inch) high

(Package 528)

ꢀ

Page Program Operation and Internal Program

Control Time

ꢀ

Sector Architecture

Weight

WF128K32-XG2LX5 - 8 grams typical

WF128K32-XG2UX5 - 8 grams typical

WF128K32-XH1X5 - 13 grams typical

•

8 equal size sectors of 16KBytes each

Any combination of sectors can be concurrently

erased. Also supports full chip erase

ꢀ

100,000 Erase/Program Cycles Typical, 0°C to

+70°C

Note: For programming information refer to Flash Programming 1M5 Application Note.

Organized as 128Kx32

* This product is subject to change without notice.

* * The access time of 50ns is available in Industrial and Commercial temperature

ranges only.

FIGURE 1 – PIN CONFIGURATION FOR WF128K32N-XH1X5

Top View

Pin Description

I/O_0-31

Data Inputs/Outputs

Address Inputs

Write Enables

Chip Selects

Output Enable

Power Supply

Ground

A_0-16

I/O24

V

CC

I/O31

I/O30

I/O29

I/O28

I/O

8

9

WE

2

#

I/O15

I/O14

I/O13

I/O12

OE#

NC

WE_1-4

#

I/O25

I/O26

CS4

#

CS2

#

CS_1-4

OE#

V_CC

#

WE4

I/O10

GND

I/O11

A

7

I/O27

A14

A16

A11

A0

GND

NC

A

12

A

4

5

6

A1

A2

A3

A

V

10

Not Connected

NC

9

Block Diagram

A

13

15

CC

WE1#

WE

1

#

CS

1

#

WE

2

#

CS

2

#

WE

3

#

CS

3

#

4 4

WE # CS #

OE#

A

8

WE

3

#

I/O23

I/O22

I/O21

I/O20

NC

I/O

7

A

0-16

I/O16

I/O17

I/O18

CS

I/O

0

CS

NC

I/O

1

#

6

5

4

128K x 8

GND

I/O¹⁹

1

2

8

3

I/O^0-7

I/O^8-15

I/O^16-23

I/O^24-31

March 2006

Rev. 8

1

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

WF128K32-XXX5

White Electronic Designs

FIGURE 3 – PIN CONFIGURATION FOR WF128K32-XG2UX5 AND WF128K32-XG2LX5

TOP VIEW

PIN DESCRIPTION

I/O_0-31

A_0-16

Data Inputs/Outputs

Address Inputs

Write Enables

Chip Selects

Output Enable

Power Supply

Ground

9

8

7

6

5

4

3

2

1

68 67 66 65 64 63 62 61

60 I/O₁₆

WE_1-4

#

I/O₀10

I/O₁11

I/O₂12

I/O₃13

I/O₄14

I/O₅15

I/O₆16

I/O₇17

GND 18

I/O₈19

I/O₉20

I/O₁₀21

I/O₁₁22

I/O₁₂23

I/O₁₃24

I/O₁₄25

I/O₁₅26

CS_1-4

OE#

V_CC

#

59 I/O₁₇

58 I/O₁₈

57 I/O₁₉

56 I/O₂₀

55 I/O₂₁

54 I/O₂₂

53 I/O₂₃

52 GND

51 I/O₂₄

50 I/O₂₅

49 I/O₂₆

48 I/O₂₇

47 I/O₂₈

46 I/O₂₉

45 I/O₃₀

44 I/O₃₁

GND

NC

Not Connected

BLOCK DIAGRAM

WE

1

#

CS

1

#

WE

2

#

CS

2

#

WE

3

#

CS

3

#

4 4

WE # CS #

OE#

A

0-16

128K x 8

2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

8

I/O^0-7

I/O^8-15

I/O^16-23

I/O^24-31

March 2006

Rev. 8

2

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WF128K32-XXX5

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ABSOLUTE MAXIMUM RATINGS (1)

RECOMMENDED OPERATING CONDITIONS

Parameter

Operating Temperature

Supply Voltage Range (V_CC

Signal voltage range (any pin except A9) (2)

Storage Temperature Range

Unit

°C

V

°C

Parameter

Supply Voltage

Input High Voltage

Input Low Voltage

Operating Temp. (Mil.)

A9 Voltage for Sector Protect

Symbol

V_CC

V_IH

V_IL

T_A

Min

4.5

2.0

-0.5

-55

11.5

Max

5.5

V_CC+ 0.3

+0.8

+125

12.5

Unit

V

°C

V

-55 to +125

-2.0 to +7.0

-65 to +150

+300

)

Lead Temperature (soldering, 10 seconds)

Data Retention Mil Temp

V_ID

10 years

Endurance (write/erase cycles) Mil Temp

A9 Voltage for sector protect (V_ID) (3)

10,000 cycles min.

-2.0 to +14.0

V

CAPACITANCE

NOTES:

Ta = +25°C

1. Stresses above the absolute maximum rating may cause permanent damage to

the device. Extended operation at the maximum levels may degrade performance

and affect reliability.

Parameter

Symbol

C_OE

C_WE

Conditions

Max Unit

OE# capacitance

WE_1-4# capacitance

HIP (PGA) H1

V_IN= 0V, f = 1.0 MHz 50 pF

2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,

inputs may overshoot V_SSto -2.0 V for periods of up to 20ns. Maximum DC

voltage on output and I/O pins is Vcc + 0.5V. During voltage transitions, outputs

may overshoot to V_CC+ 2.0 V for periods of up to 20ns.

3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9 may

overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A9

is +13.5V which may overshoot to 14.0 V for periods up to 20ns.

V_IN= 0V, f = 1.0 MHz

pF

20

15

CQFP G2U/G2L

CS_1-4# capacitance

Data# I/O capacitance

Address input capacitance

C_CS

C_I/O

C_AD

V_IN= 0V, f = 1.0 MHz 20 pF

V_I/O= 0V, f = 1.0 MHz 20 pF

V_IN= 0V, f = 1.0 MHz 50 pF

This parameter is guaranteed by design but not tested.

DC CHARACTERISTICS – CMOS COMPATIBLE

V_CC= 5.0V, V_SS= 0V, -55°C ≤ T_A≤ +125°C

Parameter

Symbol

I_LI

I_LOx32

I_CC1

Conditions

Min

Max

10

140

200

Unit

µA

mA

Input Leakage Current

Output Leakage Current

V_CCActive Current for Read (1)

V_CCActive Current for Program or

Erase (2)

V_CC= 5.5, V_IN= GND to V_CC

CS# = V_IL, OE# = V_IH

I_CC2

V_CCStandby Current

I_CC3

I_CC4

V_OL

V_CC= 5.5, CS# = V_IH, f = 5MHz

V_CC= 5.5, CS# = V_IH

I_OL= 8.0 mA, V_CC= 4.5

I_OH= -2.5 mA, V_CC= 4.5

6.5

0.6

0.45

mA

V

V_CCStatic Current

Output Low Voltage

Output High Voltage

V_OH1

0.85 x

VCC

V

Output High Voltage

V_OH2

V_LKO

I_OH= -100 µA, V_CC= 4.5

VCC

V

-0.4

Low V_CCLock Out Voltage

NOTES:

3.2

1. The I_CCcurrent listed includes both the DC operating current and the frequency

dependent component (at 5 MHz).

The frequency component typically is less than 2 mA/MHz, with OE# at V_IH

.

2.

I_CCactive while Embedded Algorithm (program or erase) is in progress.

3. DC test conditions: V_IL= 0.3V, V_IH= V_CC- 0.3V

March 2006

Rev. 8

3

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WF128K32-XXX5

White Electronic Designs

AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, CS# CONTROLLED

V_CC= 5.0V, V_SS= 0V, -55°C ≤ T_A≤ +125°C

Parameter

Symbol

-50

-60

-70

-90

-120

-150

Unit

Min Max Min Max Min Max Min Max Min Max Min Max

Write Cycle Time

t_AVAVt_WC

t_WLELt_WS

t_ELEHt_CP

t_AVELt_AS

t_DVEHt_DS

t_EHDXt_DH

t_ELAXt_AH

t_EHWHt_WH

t_EHELt_CPH

t_WHWH1

50

0

60

0

70

0

90

0

120

0

150

0

ns

µs

sec

ns

WE# Setup Time

CS# Pulse Width

25

0

30

0

35

0

45

0

50

0

50

0

Address Setup Time

Data Setup Time

25

0

30

0

30

0

45

0

50

0

50

0

Data Hold Time

Address Hold Time

40

0

45

0

45

0

45

0

50

0

50

0

WE# Hold from WE# High

CS# Pulse Width High

Duration of Programming Operation

Duration of Erase Operation

Read Recovery before Write

Chip Programming Time

20

14

2.2

0

20

14

2.2

0

20

14

2.2

0

20

14

2.2

0

20

14

2.2

0

20

14

2.2

0

t_WHWH2

60

t_GHEL

12.5

12.5 sec

FIGURE 4 – AC TEST CIRCUIT

AC Test Conditions

Parameter

Input Pulse Levels

Input Rise and Fall

Input and Output Reference Level

Output Timing Reference Level

Notes:

Typ

_IL= 0, V_IH= 3.0

Unit

V

ns

V

5

1.5

V

_Zis programmable from -2V to +7V.

_OL& I_OHprogrammable from 0 to 16mA.

Tester Impedance Z0 = 75 Ω.

_Zis typically the midpoint of V_OHand V_OL

_OL& I_OHare adjusted to simulate a typical resistive load circuit.

ATE tester includes jig capacitance.

I

V

.

I

March 2006

Rev. 8

4

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

WF128K32-XXX5

White Electronic Designs

AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE# CONTROLLED

V_CC= 5.0V, V_SS= 0V, -55°C ≤ T_A≤ +125°C

Parameter

Symbol

-50

-60

-70

-90

-120

-150

Unit

Min Max Min Max Min Max Min Max Min Max Min Max

Write Cycle Time

t_AVAVt_WC

t_ELWLt_CS

t_WLWHt_WP

t_AVWLt_AS

t_DVWHt_DS

t_WHDXt_DH

t_WLAXt_AH

t_WHEHt_CH

t_WHWLt_WPH

50

0

60

0

70

0

90

0

120

0

150

0

ns

µs

Chip Select Setup Time

Write Enable Pulse Width

Address Setup Time

Data Setup Time

25

0

30

0

35

0

45

0

50

0

50

0

25

0

30

0

30

0

45

0

50

0

50

0

Data Hold Time

Address Hold Time

40

0

45

0

45

0

45

0

50

0

50

0

Chip Select Hold Time

Write Enable Pulse Width High

20

14

20

14

20

14

20

14

20

14

20

14

Duration of Byte Programming Operation t_WHWH1

(min)

Sector Erase Time

t_WHWH2

t_GHWL

2.2

0

60

2.2

0

60

2.2

0

60

2.2

0

60

2.2

0

60

2.2

0

60

sec

ns

Read Recovery Time Before Write

V_CCSetup Time

t_VCS

50

µs

Chip Programming Time

Output Enable Setup Time

Output Enable Hold Time (1)

1. For Toggle and Data Polling.

12.5

12.5 sec

t_OES

t_OEH

0

ns

10

AC CHARACTERISTICS – READ ONLY OPERATIONS

V_CC= 5.0V, V_SS= 0V, -55°C ≤ T_A≤ +125°C

Parameter

Symbol

-50

-60

-70

-90

-120

-150

Unit

Min Max Min Max Min Max Min Max Min Max Min Max

Read Cycle Time

t_AVAVt_RC

t_AVQVt_ACC

t_ELQVt_CE

t_GLQVt_OE

t_EHQZt_DF

t_GHQZt_DF

t_AXQXt_OH

50 60 70 90 120 150

ns

Address Access Time

50

25

20

60

30

20

70

35

20

90

40

25

120

50

150

55

Chip Select Access Time

OE# to Output Valid

Chip Select to Output High Z (1)

OE# High to Output High Z (1)

30

35

30

35

Output Hold from Address, CS# or OE#

Change, whichever is ﬁrst

0

1. Guaranteed by design, not tested.

March 2006

Rev. 8

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WF128K32-XXX5

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FIGURE 5 – AC WAVEFORMS FOR READ OPERATIONS

t_RC

Addresses

Addresses Stable

D_X

t_ACC

CS1#/CS2#

t_DF

t_OE

OE#

WE#

t_CE

t_OH

D_X

High Z

Outputs

Output Valid

March 2006

Rev. 8

6

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WF128K32-XXX5

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FIGURE 6 – WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED

Data# Polling

Addresses

CS#

5555H

t_WC

PA

t_AH

t_RC

t_AS

t_GHWL

OE#

t_WP

t_WHWH1

WE#

Data

t_WPH

t_DH

t_CS

t_DF

t_OE

AOH

PD

D₇#

D_OUT

t_DS

t_OH

5.0 V

t_CE

NOTES:

1. PA is the address of the memory location to be programmed.

2. PD is the data to be programmed at byte address.

3. D₇# is the output of the complement of the data written to the device (for each chip).

4.

D_OUTis the output of the data written to the device.

5. Figure indicates last two bus cycles of four bus cycle sequence.

March 2006

Rev. 8

7

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WF128K32-XXX5

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FIGURE 7 – AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS

t_AH

Addresses

CS#

5555H

t_AS

2AAAH

5555H

2AAAH

SA

t_GHWL

OE#

t_WP

WE#

Data

t_WPH

t_DH

t_CS

AAH

55H

80H

AAH

55H

10H/30H

t_DS

V_CC

t_VDS

Notes:

1. SA is the sector address for Sector Erase.

March 2006

Rev. 8

8

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WF128K32-XXX5

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FIGURE 8 – AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALGORITHM OPERATIONS

t_CH

CS#

t_DF

t_OE

OE#

t_OEH

WE#

t_CE

t_OH

High Z

D7 =

Valid Data

D7#

D7

t_{WHWH 1 or 2}

Data

D0-D7

Valid Data

D0-D6

D0-D6 = Invalid

t_OE

March 2006

Rev. 8

9

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WF128K32-XXX5

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FIGURE 9 – WRITE/ERASE/PROGRAM OPERATION, CS# CONTROLLED

Data# Polling

Addresses

WE#

5555H

t_WC

PA

t_AH

t_AS

t_GHEL

OE#

t_CP

t_WHWH1

CS#

Data

t_CPH

t_WS

t_DH

D₇#

AOH

PD

D_OUT

t_DS

5.0 V

NOTES:

1. PA represents the address of the memory location to be programmed.

2. PD represents the data to be programmed at byte address.

3. D₇# is the output of the complement of the data written to the device (for each chip).

4.

D_OUTis the output of the data written to the device.

5. Figure indicates the last two bus cycles of a four bus cycle sequence.

March 2006

Rev. 8

10

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

WF128K32-XXX5

White Electronic Designs

PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)

4.60 (0.181)

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

March 2006

Rev. 8

11

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

WF128K32-XXX5

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PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)

o

The White 68 lead G2U CQFP ﬁlls the same ﬁt

and function as the JEDEC 68 lead CQFJ or

68 PLCC. But the G2U has the TCE and lead

inspection advantage of the CQFP form.

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

March 2006

Rev. 8

12

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WF128K32-XXX5

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PACKAGE 528 : 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2L)

25.15 (0.990) 0.25 (0.010) MAX

5.10 (0.200) MAX

22.36 (0.880) 0.25 (0.010) MAX

0.25 (0.010) 0.10 (0.002)

0.23 (0.009) REF

24.0 (0.946)

0.25 (0.010)

R 0.127

(0.005)

1.37 (0.054) MIN

0.004

2^O/ 9^O

0.89 (0.035)

1.14 (0.045)

1.27 (0.050) TYP

0.38 (0.015) 0.05 (0.002)

20.31 (0.800) REF

0.940" TYP

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

March 2006

Rev. 8

13

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WF128K32-XXX5

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ORDERING INFORMATION

W F 128K32 X - XXX X X 5 X

LEAD FINISH:

Blank = Gold plated leads

A = Solder dip leads

V^PPPROGRAMMING VOLTAGE

5 = 5V

DEVICE GRADE:

Q = MIL - STD 833 Compliant

M = Military Screened

= Industrial

C = Commercial

-55°C to +125°C

-40°C to +85°C

0°C to + 70°C

I

PACKAGE TYPE:

H1 = 1.075" sq. Ceramic Hex In-line Package, HIP (Package 400)

G2U = 22.4mm Ceramic Quad Flat Pack, Low Proﬁle CQFP (Package 510)

G2L = 22.4mm Ceramic Quad Flat Pack, Low Proﬁle CQFP (Package 528)

ACCESS TIME (ns)

IMPROVEMENT MARK

N = No Connect at pin 8, 21, 28 and 39 in HIP for Upgrade

ORGANIZATION, 128K x 32

User conﬁgurable as 256K x 16 or 512K x 8

Flash

WHITE ELECTRONIC DESIGNS CORP.

March 2006

Rev. 8

14

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WF128K32-XXX5

White Electronic Designs

DEVICE TYPE

128K x 32 Flash

SPEED

150ns

120ns

90ns

PACKAGE

66 pin HIP (H1)

SMD NO.

5962-94716 01H8X

5962-94716 02H8X

5962-94716 03H8X

5962-94716 04H8X

5962-94716 05H8X

70ns

60ns

128K x 32 Flash

150ns

120ns

90ns

68 lead CQFP (G2U)

5962-94716 01HNX

5962-94716 02HNX

5962-94716 03HNX

5962-94716 04HNX

5962-94716 05HNX

70ns

60ns

128K x 32 Flash

150ns

120ns

90ns

68 lead CQFP (G2L)

5962-94716 01HAX

5962-94716 02HAX

5962-94716 03HAX

5962-94716 04HAX

5962-94716 05HAX

70ns

60ns

Note 1: Package Not Recommended For New Design

March 2006

Rev. 8

15

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

型号	制造商	描述	价格	文档
WF128K32N-120H1Q5A	WEDC	128KX32 5V FLASH MODULE, SMD 5962-94716	获取价格
WF128K32N-120H1Q5A	MICROSEMI	Flash Module, 128KX32, 120ns, CPGA66, 1.075 X 1.075 INCH, HERMETIC SEALED, CERAMIC, HIP-66	获取价格
WF128K32N-120HI	WEDC	Flash Module, 512KX8, 120ns, CPGA66, 1.185 X 1.185 INCH, HERMETIC SEALED, CERAMIC, HIP-66	获取价格
WF128K32N-120HI5	ETC	x32 Flash EEPROM Module	获取价格
WF128K32N-120HM	WEDC	Flash Module, 512KX8, 120ns, CPGA66, 1.185 X 1.185 INCH, HERMETIC SEALED, CERAMIC, HIP-66	获取价格
WF128K32N-120HM5	ETC	x32 Flash EEPROM Module	获取价格
WF128K32N-120HSC5A	WEDC	Flash Module, 512KX8, 120ns, CHIP66,	获取价格
WF128K32N-120HSI	WEDC	Flash Module, 512KX8, 120ns, CHIP66,	获取价格
WF128K32N-120HSI5A	WEDC	Flash Module, 512KX8, 120ns, CHIP66,	获取价格
WF128K32N-120HSM	WEDC	Flash Module, 512KX8, 120ns, CPGA66, 1.185 X 1.185 INCH, HERMETIC SEALED, CERAMIC, HIP-66	获取价格

WF128K32N-120H1Q5

WF128K32N-120H1Q5 概述

WF128K32N-120H1Q5 数据手册

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