WS128K32V-35G2UIA [WEDC]
SRAM Module, 128KX32, 35ns, CMOS, CQFP68, 22.40 X 22.40 MM, CERAMIC, QFP-68;
| 型号： | WS128K32V-35G2UIA |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | SRAM Module, 128KX32, 35ns, CMOS, CQFP68, 22.40 X 22.40 MM, CERAMIC, QFP-68 静态存储器 |
| 文件： | 总8页 (文件大小：462K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WS128K32V-XXX
White Electronic Designs
128Kx32 3.3V SRAM MODULE
FEATURES
Access Times of 15**, 17, 20, 25, 35ns
MIL-STD-883 Compliant Devices Available
Low Voltage Operation
3.3 Volt Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
Packaging
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
• 66-pin, PGA Type, 1.075 inch square Hermetic
Ceramic HIP (Package 400)
Weight
WS128K32V-XG2UX - 8 grams typical
WS128K32NV-XH1X - 13 grams typical
• 68 lead, Hermetic CQFP (G2U), 22.4mm (0.880
inch) square (Package 510), 3.56mm (0.140 inch)
high.
Organized as 128Kx32; User Configurable as
256Kx16 or 512Kx8
* This product is subject to change without notice.
** Commercial and Industrial only.
Commercial, Industrial and Military Temperature
Ranges
FIGURE 1 – PIN CONFIGURATION FOR WS128K32NV-XH1X
Pin Description
Top View
1
12
23
34
45
56
I/O0-31
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
I/O8
I/O9
I/O10
A13
WE2#
CS2#
GND
I/O11
A10
I/O15
I/O24
I/O25
I/O26
A6
VCC
CS4#
WE4#
I/O27
A3
I/O31
I/O30
I/O29
I/O28
A0
A0-16
WE1-4
#
I/O14
I/O13
I/O12
OE#
NC
CS1-4
OE#
VCC
#
Output Enable
Power Supply
Ground
GND
NC
A14
A7
Not Connected
A15
A11
NC
A4
A1
Block Diagram
A16
A12
WE1#
I/O7
A8
A5
A2
WE1# CS1#
WE2# CS2#
WE3# CS3#
WE4# CS4#
NC
VCC
CS1#
NC
A9
WE3#
CS3#
GND
I/O19
I/O23
I/O22
I/O21
I/O20
OE#
A0-16
I/O0
I/O1
I/O2
I/O6
I/O16
I/O17
I/O18
128K x 8
128K x 8
128K x 8
128K x 8
I/O5
I/O3
I/O4
8
8
8
8
11
22
33
44
55
66
I/O0-7
I/O8-15
I/O16-23
I/O24-31
March 2006
Rev. 8
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32V-XXX
White Electronic Designs
FIGURE 2 – PIN CONFIGURATION FOR WS128K32V-XG2UX
Top View
Pin Description
I/O0-31
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
A0-16
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60 I/O16
WE1-4
#
I/O0 10
I/O1 11
I/O2 12
I/O3 13
I/O4 14
I/O5 15
I/O6 16
I/O7 17
GND 18
I/O8 19
I/O9 20
I/O10 21
I/O11 22
I/O12 23
I/O13 24
I/O14 25
I/O15 26
CS1-4
OE#
VCC
#
59 I/O17
58 I/O18
57 I/O19
56 I/O20
55 I/O21
54 I/O22
53 I/O23
52 GND
51 I/O24
50 I/O25
49 I/O26
48 I/O27
47 I/O28
46 I/O29
45 I/O30
44 I/O31
Output Enable
Power Supply
Ground
GND
NC
Not Connected
Block Diagram
WE1# CS1#
WE2# CS2#
WE3# CS3#
WE4# CS4#
OE#
A
0-16
128K x 8
128K x 8
128K x 8
128K x 8
2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
March 2006
Rev. 8
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32V-XXX
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
Parameter
Symbol
TA
Min
-55
-65
-0.5
Max
+125
+150
4.6
Unit
°C
°C
V
CS
H
L
OE
X
WE
X
Mode
Standby
Read
Data I/O
High Z
Power
Standby
Active
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
TSTG
VG
L
H
Data Out
Data In
High Z
L
X
L
Write
Active
TJ
150
°C
V
L
H
H
Out Disable
Active
VCC
-0.5
5.5
RECOMMENDED OPERATING CONDITIONS
CAPACITANCE
TA = +25°C, VIN = 0V, F = 1.0 MHz
Parameter
Symbol
VCC
Min
3.0
Max
3.6
Unit
V
Symbol
COE
Max
Unit
pF
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
50
OE# capacitance
VIH
2.2
VCC + 0.3
+0.8
V
CWE
pF
WE1-4# capacitance
HIP (PGA)
VIL
-0.3
V
20
15
20
20
50
CQFP G2U
CCS
CI/O
CAD
pF
pF
pF
CS1-4# capacitance
Data# I/O capacitance
Address input capacitance
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
VCC = 3.3V ±0.3V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Sym
ILI
Conditions
VIN = GND to VCC
Min
Max
10
Units
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Current
μA
μA
mA
mA
V
ILO
CS# = VIH, OE# = VIH, VOUT = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz
CS# = VIH, OE# = VIH, f = 5MHz
IOL = 6mA
10
ICC x 32
ISB
500
32
Output Low Voltage
Output High Voltage
VOL
0.4
VOH
IOH = -4.0mA
2.4
V
March 2006
Rev. 8
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32V-XXX
White Electronic Designs
AC CHARACTERISTICS
VCC = 3.3V, -55°C ≤ TA ≤ +125°C
Parameter
Read Cycle
Symbol
-15*
-17
-20
-25
-35
Units
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
tAA
15
17
20
25
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
15
17
20
25
35
Output Hold from Address Change
Chip Select Access Time
tOH
tACS
tOE
0
0
0
0
0
15
10
17
11
20
12
25
15
35
20
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
1
tCLZ
5
5
5
5
5
5
5
5
5
5
1
tOLZ
1
tCHZ
8
8
9
9
10
10
12
12
15
15
1
tOHZ
1. This parameter is guaranteed by design but not tested.
* Commercial and Industrial only.
AC Characteristics
VCC = 3.3V, -55°C ≤ TA ≤ +125°C
Parameter
Write Cycle
Symbol
-15*
-17
-20
-25
-35
Units
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
tWC
tCW
tAW
tDW
tWP
tAS
15
13
13
10
13
0
17
14
14
11
14
0
20
15
15
12
15
0
25
20
20
15
20
0
35
30
30
18
30
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
tAH
0
0
0
0
0
1
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
tOW
tWHZ
tDH
5
5
5
5
5
1
8
9
10
10
15
0
0
0
0
0
1. This parameter is guaranteed by design but not tested.
* Commercial and Industrial only.
FIGURE 3 – AC TEST CIRCUIT
AC Test Conditions
IOL
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
IL = 0, VIH = 3.0
Unit
V
ns
V
Current Source
V
5
1.5
1.5
D.U.T.
VZ 1.5V
(Bipolar Supply)
V
Ceff = 50 pf
Notes:
V
Z is programmable from -2V to +7V.
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 ý.
Z is typically the midpoint of VOH and VOL
OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
I
IOH
V
I
.
Current Source
March 2006
Rev. 8
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32V-XXX
White Electronic Designs
FIGURE 4 – TIMING WAVEFORM - READ CYCLE
CS#
OE#
READ CYCLE 2, (CS# = OE# = VIL, WE# = VIH
)
READ CYCLE 2 (WE# = VIH
)
FIGURE 5 – WRITE CYCLE - WE# CONTROLLED
CS#
WE#
WRITE CYCLE 1, WE# CONTROLLED
FIGURE 6 – WRITE CYCLE - CS# CONTROLLED
WS32K32-XHX
CS#
WE#
WRITE CYCLE 2, CS# CONTROLLED
March 2006
Rev. 8
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32V-XXX
White Electronic Designs
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
4.60 (0.181)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
March 2006
Rev. 8
6
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32V-XXX
White Electronic Designs
PACKAGE 510: 68 LEAD, LOW PROFILE CERAMIC QUAD FLAT PACK, CQFP (G2U)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
March 2006
Rev. 8
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32V-XXX
White Electronic Designs
W S 128K 32 X V - XXX X X X
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
M = Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C
PACKAGE TYPE:
H1 = Ceramic Hex-In-line Package, HIP (Package 400)
G2U = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 510)
ACCESS TIME (ns)
LOW VOLTAGE SUPPLY 3.3V ± 10%
IMPROVEMENT MARK:
N = No Connect at pins 8, 21, 28, 39 in HIP for upgrade. (H1 only)
ORGANIZATION, 128Kx32
User configurable as 256Kx16 or 512Kx8
SRAM
WHITE ELECTRONIC DESIGNS CORP.
March 2006
Rev. 8
8
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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