WS512K32V-15G1TCA [WEDC]
SRAM Module, 512KX32, 15ns, CMOS, CQFP68, 23.90 MM, CERAMIC, QFP-68;
| 型号： | WS512K32V-15G1TCA |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | SRAM Module, 512KX32, 15ns, CMOS, CQFP68, 23.90 MM, CERAMIC, QFP-68 静态存储器 内存集成电路 |
| 文件： | 总8页 (文件大小：152K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WS512K32V-XXX
White Electronic Designs
PRELIMINARY*
512Kx32 SRAM 3ꢀ3V MULTICHIP PACKAGE
FEATURES
n
Low Voltage Operation:
3ꢀ3V ± 10% Power Supply
n
n
n
Access Times of 15, 17, 20ns
Low Voltage Operation
Packaging
n
n
n
Low Power CMOS
TTL Compatible Inputs and Outputs
Fully Static Operation:
66-pin, PGA Type, 1ꢀ075 inch square, Hermetic
Ceramic HIP (Package 400)
No clock or refresh requiredꢀ
Three State Outputꢀ
68 lead, 23ꢀ9mm (0ꢀ940 inch) sqꢀ, Low Profile CQFP,
(G1T), 4ꢀ06 (0ꢀ160 inch) high, (Package 524)
n
n
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
68 lead, 22ꢀ4mm (0ꢀ880 inch) CQFP, (G2U),
3ꢀ56mm (0ꢀ140"), (Package 510)
n
Weight
68 lead, 23ꢀ9mm (0ꢀ940 inch) sqꢀ, Low Profile
CQFP, (G1U)1, 3ꢀ56mm (0ꢀ140 inch) high,
(Package 519)
WS512K32V-XG1TX - 5 grams typical
WS512K32V-XG1UX1 - 5 grams typical
WS512K32V-XG2UX - 8 grams typical
WS512K32NV-XH1X - 13 grams typical
n
n
Organized as 512Kx32; User Configurable as
1Mx16 or 2Mx8
Note 1: Package Not Recommended For New Design
*This data sheet describes a product under development, not fully
characterized, and is subject to change without notice$
Commercial, Industrial and Military Temperature
Ranges
PIN CONFIGURATION FOR WS512K32NV-XH1X
TOP VIEW
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-18
WE1-4
CS1-4
OE
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
1
12
23
34
45
56
I/O8
I/O9
I/O10
A13
WE2
CS2
GND
I/O11
A10
I/O15
I/O14
I/O13
I/O12
OE
I/O24
I/O25
I/O26
A6
VCC
CS4
WE4
I/O27
A3
I/O31
I/O30
I/O29
I/O28
A0
VCC
GND
NC
Not Connected
A14
A7
A15
A11
A18
NC
A4
A1
BLOCK DIAGRAM
A16
A12
WE1
I/O7
I/O6
I/O5
I/O4
A8
A5
A2
WE3 CS3
WE4 CS4
WE1 CS1
WE2 CS2
A17
VCC
CS1
NC
A9
WE3
CS3
GND
I/O19
I/O23
I/O22
I/O21
I/O20
OE
I/O0
I/O1
I/O2
I/O16
I/O17
I/O18
A0-18
512K x 8
512K x 8
512K x 8
512K x 8
I/O3
11
22
33
44
55
66
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
March2003Revꢀ8
1
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
WS512K32V-XXX
White Electronic Designs
PIN CONFIGURATION FOR WS512K32V-XG1TX, WS512K32V-XG2UXAND WS512K32V-XG1UX1
TOP VIEW
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
A0-18
WE1-4
CS1-4
OE
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
Vcc
GND
NC
GND
I/O
8
9
Not Connected
I/O
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
BLOCK DIAGRAM
WE3 CS3
WE4 CS4
WE1 CS1
WE2 CS2
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
OE
18
A
0
-
512K x 8
512K x 8
512K x 8
512K x 8
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
Note 1: Package Not Recommended For New Design
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
2
WS512K32V-XXX
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
Parameter
Symbol
TA
Min
-55
Max
+125
+150
4ꢀ6
Unit
°C
°C
V
CS
H
L
OE
X
WE
X
Mode
Standby
Read
DataI/O
High Z
Power
Standby
Active
Active
Active
OperatingTemperature
StorageTemperature
Signal Voltage Relative to GND
JunctionTemperature
Supply Voltage
L
H
Data Out
Data In
High Z
TSTG
VG
-65
L
X
L
Write
-0ꢀ5
L
H
H
Out Disable
TJ
150
4ꢀ6
°C
V
VCC
-0ꢀ5
CAPACITANCE
(TA = +25°C)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
V
Parameter
Symbol
COE
Conditions
Max
Unit
pF
Supply Voltage
Input High Voltage
Input Low Voltage
VCC
3ꢀ0
3ꢀ6
OE capacitance
V
V
IN = 0 V, f = 1ꢀ0 MHz
IN = 0 V, f = 1ꢀ0 MHz
50
VIH
2ꢀ2
VCC + 0ꢀ3
+0ꢀ8
V
WE1-4 capacitance
HIP(PGA)
CWE
pF
20
20
VIL
-0ꢀ3
V
CQFPG2U/G1U/G1T
CS1-4 capacitance
CCS
CI/O
CAD
V
IN = 0 V, f = 1ꢀ0 MHz
I/O = 0 V, f = 1ꢀ0 MHz
VIN = 0 V, f = 1ꢀ0 MHz
20
20
50
pF
pF
pF
Data I/O capacitance
V
Addressinputcapacitance
This parameter is guaranteed by design but not tested$
DC CHARACTERISTICS
(VCC = 3ꢀ3V ± 0ꢀ3V, TA = -55°C TO +125°C)
Parameter
Sym
Conditions
Units
Min
Max
InputLeakageCurrent
OutputLeakageCurrent
ILI
ILO
VIN = GND to VCC
10
µA
µA
mA
mA
V
CS = VIH, OE = VIH, VOUT = GND to VCC
CS = VIL, OE = VIH, f = 5MHz, VCC = 3ꢀ6V
CS = VIH, OE = VIH, f = 5MHz, VCC = 3ꢀ6V
IOL = 4ꢀ0mA
10
Operating Supply Current (x 32 Mode)
StandbyCurrent
ICC x 32
ISB
400
200
0ꢀ4
Output Low Voltage
VOL
Output High Voltage
VOH
IOH =-4ꢀ0mA
2ꢀ4
V
NOTE: DC test conditions: VIH = VCC -0$3V, VIL = 0$3V$
NOTE: Contact factory for low power option$
3
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
WS512K32V-XXX
White Electronic Designs
AC CHARACTERISTICS
(VCC = 3ꢀ3V, TA = -55°C TO +125°C)
Parameter
Symbol
-15
-17
-20
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
tAA
15
17
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
15
17
20
Output Hold from Address Change
Chip Select Access Time
tOH
0
0
0
tA C S
tOE
15
8
17
8
20
10
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
tCLZ1
tOLZ1
tCHZ1
tOHZ1
1
0
1
0
1
0
8
8
8
8
10
10
1$ This parameter is guaranteed by design but not tested$
AC CHARACTERISTICS
(VCC = 3ꢀ3V, TA = -55°C TO +125°C)
Parameter
Symbol
-15
-17
-20
Units
Write Cycle
Min
15
12
12
9
Max
Min
17
12
12
9
Max
Min
20
14
14
10
14
0
Max
Write Cycle Time
tWC
tCW
tAW
tDW
tWP
tAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
12
0
14
0
Address Setup Time
Address Hold Time
tAH
0
0
0
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
tOW1
tWHZ1
tDH
2
3
3
8
8
9
0
0
0
1$ This parameter is guaranteed by design but not tested$
AC TEST CIRCUIT
AC TEST CONDITIONS
Typ
Parameter
Unit
IOL
Input Pulse Levels
VIL = 0, VIH = 2ꢀ5
V
ns
V
Current Source
Input Rise and Fall
5
InputandOutputReferenceLevel
Output Timing Reference Level
1ꢀ5
1ꢀ5
V
VZ
≈ 1.5V
(Bipolar Supply)
D.U.T.
Notes:
Ceff = 50 pf
VZ is programmable from -2V to +7V$
IOL & IOH programmable from 0 to 16mA$
Tester Impedance Z0 = 75W$
VZ is typically the midpoint of VOH and VOL$
IOL & IOH are adjusted to simulate a typical resistive load circuit$
IOH
Current Source
ATE tester includes jig capacitance$
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
4
WS512K32V-XXX
White Electronic Designs
TIMING WAVEFORM - READ CYCLE
tRC
tRC
ADDRESS
CS
ADDRESS
tAA
tAA
tOH
tCHZ
DATA I/O
tACS
tCLZ
PREVIOUS DATA VALID
DATA VALID
READ CYCLE 1 (CS = OE = V , WE = V
IL IH
)
OE
tOE
tOLZ
tOHZ
DATA I/O
DATA VALID
HIGH IMPEDANCE
READ CYCLE 2 (WE = V
IH
)
WRITE CYCLE - WE CONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
CS
WE
tAS
tWP
tOW
tDH
tWHZ
tDW
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
WRITE CYCLE - CS CONTROLLED
tWC
ADDRESS
WS32K32-XHX
tAH
tCW
tAW
tAS
CS
tWP
WE
tDW
tDH
DATA I/O
DATA VALID
WRITE CYCLE 2, CS CONTROLLED
5
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
WS512K32V-XXX
White Electronic Designs
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) ± ±0.25 (0.010) SQ
PIN 1 IDENTIFIER
SQUARE PAD
ON BOTTOM
25.4 (1.0) TYP
4.34 (0.171)
MAX
3.81 (0.150)
± ±0.13 (0.005)
1.42 (0.056) ± ±0.13 (0.005)
0.76 (0.030) ± ±0.13 (0.005)
2.54 (0.100)
TYP
1.27 (0.050) TYP DIA
15.24 (0.600) TYP
25.4 (1.0) TYP
0.46 (0.018) ± ±0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 510: 68 LEAD, LOW PROFILE CERAMIC QUAD FLAT PACK, CQFP (G2U)
25.15 (0.990) ± 0.25 (0.010) SQ
3.51 (0.140) MAX
22.36 (0.880) ± 0.25 (0.010) SQ
0.25 (0.010) ± 0.10 (0.002)
Pin 1
0.25 (0.010) REF
R 0.25
(0.010)
24.0 (0.946)
0.25 (0.010)
0.53 (0.021)
0.18 (0.007)
±
±
1° / 7°
1.01 (0.040)
0.13 (0.005)
±
23.87
(0.940) REF
DETAIL A
1.27 (0.050) TYP
SEE DETAIL "A"
0.38 (0.015) ± 0.05 (0.002)
20.3 (0.800) REF
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
6
WS512K32V-XXX
White Electronic Designs
PACKAGE 519: 68 LEAD, LOW PROFILE CERAMIC QUAD FLAT PACK, CQFP (G1U)1
25.27 (0.995) ± ±0.13 (0.005) SQ
3.56 (0.140) MAX
23.88 (0.940) ± ±0.25 (0.010) SQ
0.25 (0.010)
0.61 (0.024)
± ±0.15 (0.006)
0.84 (0.033) REF
DETAIL A
SEE DETAIL "A"
1.27 (0.050)
0.38 (0.015) ± ±0.05 (0.002)
20.3 (0.800) REF
ALL LINEAR DIMENSIONSARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Note 1: Package Not Recommended For New Design
PACKAGE 524: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G1T)
25.27 (0.995) ± ±0.13 (0.005) SQ
4.06 (0.160) MAX
0.25 (0.010) MAX
23.88 (0.940) ± ±0.25 (0.010) SQ
0.83 (0.033)
± ±0.32 (0.013)
0.84 (0.033) REF
DETAIL A
SEE DETAIL "A"
1.27 (0.050)
0.38 (0.015) ± ±0.05 (0.002)
20.3 (0.800) REF
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
7
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
WS512K32V-XXX
White Electronic Designs
ORDERING INFORMATION
W S 512K 32 X V - XXX X X X
WHITE ELECTRONIC DESIGNS CORP.
SRAM
ORGANIZATION, 512Kx32
User configurable as 1Mx16 or 2Mx8
IMPROVEMENT MARK:
N = No Connect at pin 21 and 39 in HIP for Upgrades (H1 only)
Low Voltage Supply 3.3V ± 10%
ACCESS TIME (ns)
PACKAGETYPE:
H1 = 1ꢀ075" sqꢀ Ceramic Hex In Line Package, HIP (Package 400)
G2U = 22ꢀ4mm Ceramic Quad Flat Pack, CQFP (Package 510)
G1U1 = 23ꢀ9mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 519)
G1T = 23ꢀ9mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 524)
DEVICE GRADE:
M = Military
= Industrial
C = Commercial
-55°C to +125°C
-40°C to +85°C
0°C to +70°C
I
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
Note 1: Package Not Recommended For New Design
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
8
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