WSF128K16-72G1UC [WEDC]
128Kx16 SRAM/FLASH MODULE, SMD 5962-96900; 128Kx16 SRAM / FLASH模块， SMD 5962-96900
| 型号： | WSF128K16-72G1UC |
| 厂家： | 
WHITE ELECTRONIC DESIGNS CORPORATION |
| 描述： | 128Kx16 SRAM/FLASH MODULE, SMD 5962-96900 |
| 文件： | 总16页 (文件大小：621K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WSF128K16-XXX
White Electronic Designs
128Kx16 SRAM/FLASH MODULE, SMD 5962-96900
FEATURES
ꢀ
TTL Compatible Inputs and Outputs
ꢀ
ꢀ
ꢀ
Access Times of 35ns (SRAM) and 70ns (FLASH)
Access Times of 70ns (SRAM) and 120ns (FLASH)
Packaging
ꢀ
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
ꢀ
Weight
• 66-pin, PGA Type, 1.075 inch square HIP,
Hermetic Ceramic HIP (Package 400)
• WSF128K16-XHX — 13 grams typical
• WSF128K16-H1X — 13 grams typical
• WSF128K16-XG1UX1 — 5 grams typical
• WSF128K16-XG1TX — 5 grams typical
• 66-pin, PGA Type, 1.185 inch square HIP,
Hermetic Ceramic HIP (Package 401)
• 68 lead, Hermetic CQFP (G1U)1, 22.4mm (0.880
FLASH MEMORY FEATURES
inch) square (Package 519). Designed to fit
ꢀ
10,000 Erase/Program Cycles
Sector Architecture
JEDEC 68 lead 0.990” CQFJ footprint (FIGURE 2)
ꢀ
• 68 lead, Hermetic CQFP (G1T), 22.4mm (0.880
inch) square (Package 524)
• 8 equal size sectors of 16K bytes each
ꢀ
ꢀ
ꢀ
128Kx16 SRAM
• Any combination of sectors can be concurrently
erased. Also supports full chip erase
128Kx16 5V FLASH
ꢀ
ꢀ
ꢀ
ꢀ
5 Volt Programming; 5V 10ꢀ Supply
Embedded Erase and Program Algorithms
Hardware Write Protection
Organized as 128Kx16 of SRAM and 128Kx16 of
Flash Memory with separate Data Buses
ꢀ
Both blocks of memory are User Configurable as
256Kx8
Page Program Operation and Internal Program
Control Time.
Note: For programming information refer to Flash Programming 1M5 Application Note.
Note 1: Package not recommended for new designs
ꢀ
ꢀ
Low Power CMOS
Commercial, Industrial and Military Temperature
Ranges
FIGURE1 PIN CONFIGURATION FOR WSF128K16-XHX AND WSF128K16-XH1X
Top View Pin Description
FD0-15
Flash Data Inputs/Outputs
SRAM Data Inputs/Outputs
Address Inputs
1
12
23
34
45
56
SD0-15
A0-16
SWE1-2#
SCS1-2#
OE#
VCC
GND
NC
FWE1-2#
FCS1-2#
SD
SD
SD
SWE #
SD
SD
SD
SD
FD
FD
V
FD
FD
FD
FD
8
2
15
14
13
12
8
CC
15
14
13
12
SCS #
2
FCS #
2
9
9
SRAM Write Enable
SRAM Chip Selects
Output Enable
Power Supply
Ground
Not Connected
Flash Write Enable
Flash Chip Select
GND
FD
10
FWE #
2
10
A
A
A
A
SD
A
11
A
6
7
FD
11
13
OE#
NC
A
A
A
14
15
16
10
11
3
4
5
0
1
2
7
6
5
4
A
A
V
NC
A
A
SWE #
A
A
A
A
FD
FD
FD
FD
12
CC
1
8
9
0
1
2
Block Diagram
SD
7
SD
6
SD
5
SD
4
FWE #
1
NC
SWE1# SCS1# SWE2# SCS2# FWE1# FCS1# FWE2# FCS2#
OE#
A0-16
SCS #
1
FD
FD
FD
FCS #
1
SD
0
SD
1
SD
2
128K x 8
FLASH
128K x 8
SRAM
128K x 8
SRAM
128K x 8
FLASH
NC
GND
8
8
SD
3
FD
8
8
3
11
22
33
44
55
66
FD0-7
FD8-15
SD0-7
SD8-15
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FIGURE 2 – PIN CONFIGURATION FOR WSF128K16-XG1UX1, WSF128K16-XG1TX
Top View
Pin Description
FD0-15
SD0-15
A0-16
Flash Data Inputs/Outputs
SRAM Data Inputs/Outputs
Address Inputs
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
SWE1-2#
SCS1-2#
OE#
SRAM Write Enable
SRAM Chip Selects
Output Enable
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
GND
SD8
FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7
GND
FD8
FD9
FD10
FD11
FD12
FD13
FD14
FD15
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
VCC
GND
NC
Power Supply
Ground
Not Connected
FWE1-2#
FCS1-2#
Flash Write Enable
Flash Chip Select
SD9
SD10
SD11
SD12
SD13
SD14
SD15
Block Diagram
SWE
1
#
SCS
1
#
SWE
2
#
SCS
2
#
FWE
1
#
FCS
1
#
2 2
FWE # FCS #
OE#
A
0-16
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
128K x 8
FLASH
128K x 8
SRAM
128K x 8
SRAM
128K x 8
FLASH
8
8
8
8
FD0-7
FD8-15
SD0-7
SD8-15
NOTE 1: Package not recommended for new designs
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
SRAM TRUTH TABLE
Parameter
Symbol
TA
TSTG
VG
TJ
VCC
Min
-55
-65
-0.5
Max
+125
+150
7.0
150
7.0
Unit
°C
°C
V
°C
V
SCS#
OE#
X
L
H
X
SWE#
Mode
Standby
Read
Read
Write
Data I/O
High Z
Data Out
High Z
Power
Standby
Active
Active
Active
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
H
L
L
L
X
H
H
L
Data In
-0.5
Parameter
Flash Data Retention
Flash Endurance (write/erase cycles)
CAPACITANCE
TA = +25°C
10 years
10,000
Test
Symbol
Condition
Max Unit
NOTES: 1. Stresses above the absolute maximum rating may cause permanent
damage to the device. Extended operation at the maximum levels may
degrade performance and affect reliability.
OE# Capacitance
COE VIN = 0V, f = 1.0MHz 50 pF
CWE VIN = 0V, f = 1.0MHz 20 pF
CCS VIN = 0V, f = 1.0MHz 20 pF
F/S WE1-2# Capacitance
F/S CS1-2# Capacitance
SD0-15/FD0-15 Capacitance
A0 - A16 Capacitance
CI/O
VIN = 0V, f = 1.0MHz 20 pF
CAD VIN = 0V, f = 1.0MHz 50 pF
RECOMMENDED OPERATING CONDITIONS
This parameter is guaranteed by design but not tested.
Parameter
Symbol
VCC
VIH
Min
4.5
2.2
Max
5.5
VCC + 0.3
+0.8
Unit
V
V
Supply Voltage
Input High Voltage
Input Low Voltage
VIL
-0.5
V
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Input Leakage Current
Output Leakage Current
SRAM Operating Supply Current x 16 Mode
Standby Current
SRAM Output Low Voltage
Symbol
ILI
ILO
ICCx16
ISB
VOL
Conditions
Min
Max
10
10
360
40
0.4
Unit
µA
µA
mA
mA
V
VCC = 5.5, VIN = GND to VCC
SCS# = VIH, OE# = VIH, VOUT = GND to VCC
SCS# = VIL, OE# = FCS# = VIH, f = 5MHz, VCC = 5.5
FCS# = SCS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5
IOL = 2.1mA, VCC = 4.5
SRAM Output High Voltage
Flash VCC Active Current for Read (1)
VOH
ICC1
ICC2
VOL
VOH1
VOH2
VLKO
IOH = -1.0mA, VCC = 4.5
2.4
V
FCS# = VIL, OE# = SCS# = VIH
FCS# = VIL, OE# = SCS# = VIH
IOL = 8.0mA, VCC = 4.5
IOH = -2.5 mA, VCC = 4.5
IOH = -100 µA, VCC = 4.5
100
130
0.45
mA
mA
V
V
V
Flash VCC Active Current for Program or Erase (2)
Flash Output Low Voltage
Flash Output High Voltage
Flash Output High Voltage
Flash Low VCC Lock Out Voltage
NOTES:
0.85 x VCC
VCC -0.4
3.2
V
1. The ICC current listed includes both the DC operating current and the frequency dependent component (@ 5 MHz).
The frequency component typically is less than 2 mA/MHz, with OE# at VIH
2. ICC active while Embedded Algorithm (program or erase) is in progress.
3. DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
SRAM AC CHARACTERISTICS
SRAM AC CHARACTERISTICS
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
-35
-70
-35
-70
Parameter
Read Cycle
Parameter
Write Cycle
Symbol
Unit
Symbol
Unit
Min Max Min Max
Min Max Min Max
Read Cycle Time
Address Access Time
tRC
tAA
35
0
70
3
ns
70 ns
ns
70 ns
35 ns
ns
ns
25 ns
25 ns
Write Cycle Time
tWC
tCW
tAW
tDW
tWP
tAS
35
25
25
20
25
0
70
60
60
30
50
5
ns
ns
ns
ns
ns
ns
ns
35
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold from Write Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
tOH
tACS
tOE
35
20
1
tCLZ
3
0
3
0
1
tOLZ
tCHZ
tAH
0
4
5
5
1
20
20
tOW1
tWHZ1
tDH
ns
1
Output Disable to Output in High Z tOHZ
1. This parameter is guaranteed by design but not tested.
20
25 ns
ns
0
0
1. This parameter is guaranteed by design but not tested.
FIGURE 3
AC Test Circuit
AC TEST CONDITIONS
Parameter
Typ
Unit
V
Input Pulse Levels
VIL = 0, VIH = 3.0
Input Rise and Fall
5
1.5
1.5
ns
V
V
Input and Output Reference Level
Output Timing Reference Level
Notes: VZ is programmable from -2V to +7V.
≈
I
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75Ω.
Z is typically the midpoint of VOH and VOL
OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
V
I
.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FIGURE 4 – SRAM TIMING WAVEFORM — READ CYCLE
tRC
ADDRESS
tAA
tRC
SCS#
ADDRESS
DATA I/O
tAA
tCHZ
tACS
tOH
tCLZ
SOE#
PREVIOUS DATA VALID
DATA VALID
tOE
tOLZ
tOHZ
READ CYCLE 1 (SCS# = OE# = V , SWE# = V
IL IH
)
DATA I/O
DATA VALID
HIGH IMPEDANCE
READ CYCLE 2 (SWE# = V
IH
)
FIGURE 5 – SRAM WRITE CYCLE — SWE# CONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
SCS#
tAS
tWP
SWE#
tOW
tWHZ
tDW
tDH
DATA I/O
DATA VALID
WRITE CYCLE 1, SWE# CONTROLLED
FIGURE 6 – SRAM WRITE CYCLE — SCS# CONTROLLED
tWC
ADDRESS
tAW
tAH
tAS
tCW
SCS#
tWP
SWE#
tDW
tDH
DATA I/O
DATA VALID
WRITE CYCLE 2, SCS# CONTROLLED
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, FWE# CONTROLLED
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
-70
-120
Parameter
Symbol
tAVAV
tELWL
tWLWH
tAVWL
Unit
Min
70
0
35
0
Max
Min
120
0
50
0
Max
Write Cycle Time
tWC
tCS
tWP
tAS
ns
ns
ns
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
ns
Data Setup Time
Data Hold Time
Address Hold Time
Chip Select Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (min)
Chip and Sector Erase Time
Read Recovery Time Before Write
tDVWH
tWHDX
tWLAX
tWHEH
tWHWL
tWHWH1
tWHWH2
tGHWL
tDS
tDH
tAH
tCH
tWPH
30
0
45
0
20
14
2.2
0
50
0
50
0
20
14
2.2
0
ns
ns
ns
ns
ns
µs
sec
µs
µs
sec
ns
60
60
VCC Set-up Time
tVCS
50
50
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (1)
1. For Toggle and Data# Polling.
12.5
12.5
tOES
tOEH
0
10
0
10
ns
FLASH AC CHARACTERISTICS – READ ONLY OPERATIONS
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
-70
-120
Parameter
Symbol
Unit
Min
Max
Min
Max
Read Cycle Time
Address Access Time
Chip Select Access Time
OE# to Output Valid
Chip Select to Output High Z (1)
OE# High to Output High Z (1)
Output Hold from Address, CS# or OE# Change, whichever is first
1. Guaranteed by design, not tested.
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
tRC
tACC
tCE
tOE
tDF
70
120
ns
ns
ns
ns
ns
ns
ns
70
70
35
20
20
120
120
50
30
30
tDF
tOH
0
0
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, FCS# CONTROLLED
VCC = 5.0V, -55°C ≤ TA ≤ +125°C
-70
-120
Parameter
Symbol
tAVAV
tWLEL
tELEH
Unit
Min
70
0
35
0
Max
Min
120
0
50
0
Max
Write Cycle Time
Fwe# Setup Time
Fcs# Pulse Width
Address Setup Time
tWC
tWS
tCP
ns
ns
ns
tAVEL
tAS
ns
Data Setup Time
Data Hold Time
Address Hold Time
Fwe# Hold From Fwe# High
Fcs# Pulse Width High
Duration Of Programming Operation
Duration Of Erase Operation
Read Recovery Before Write
Chip Programming Time
tDVEH
tEHDX
tELAX
tEHWH
tEHEL
tWHWH1
tWHWH2
tGHEL
tDS
tDH
tAH
tWH
tCPH
30
0
45
0
20
14
2.2
0
50
0
50
0
20
14
2.2
0
ns
ns
ns
ns
ns
µs
sec
ns
60
60
12.5
12.5
sec
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
7
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FIGURE 7 – AC WAVEFORMS FOR FLASH MEMORY READ OPERATIONS
tRC
Addresses
Addresses Stable
tACC
FCS#
OE#
tDF
tOE
FWE#
tCE
tOH
High Z
High Z
Outputs
Output Valid
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FIGURE 8 – WRITE/ERASE/PROGRAM OPERATION, FLASH MEMORY FWE# CONTROLLED
Data# Polling
Addresses
FCS#
5555H
tWC
PA
PA
tAH
tRC
tAS
tGHWL
OE#
tWP
tWHWH1
FWE#
tWPH
tDH
tCS
tDF
tOH
tOE
A0H
PD
DOUT
D7#
Data
tDS
5.0 V
tCE
NOTES:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device.
4.
DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
9
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FIGURE 9 – AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS FOR FLASH MEMORY
tAH
tAS
Addresses
FCS#
5555H
2AAAH
5555H
5555H
2AAAH
SA
tGHWL
OE#
tWP
FWE#
tWPH
tCS
tDH
Data
VCC
AAH
55H
80H
AAH
55H
10H/30H
tDS
tVCS
Note: SA is the sector address for Sector Erase.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
10
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FIGURE 10 – AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALGORITHM
OPERATIONS FOR FLASH MEMORY
tCH
FCS#
tDF
tOE
OE#
tOEH
FWE#
tCE
tOH
High Z
D7 =
Valid Data
D7#
D7
tWHWH 1 or 2
D0-D7
D0-D6 = Invalid
D7
D0-D6
D7
Valid Data
tOE
High Z
D7
Valid Data
tWHWH 1 or 2
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
11
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
FIGURE 11 – WRITE/ERASE/PROGRAM OPERATION FOR FLASH MEMORY, CS# CONTROLLED
Data# Polling
Addresses
FWE#
5555H
tWC
PA
PA
tAH
tAS
tGHEL
OE#
tCP
tWHWH1
FCS#
tCPH
tDH
tWS
D7#
A0H
PD
DOUT
Data
tDS
5.0 V
NOTES:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device.
4.
DOUT is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
12
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
13
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G1U)1
NOTE 1: Package not recommended for new designs
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
14
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
PACKAGE 524: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1T)
25.27 (0.995) 0.13 (0.005) SQ
4.06 (0.160) MAX
23.88 (0.940) 0.25 (0.010) SQ
0.25 (0.010) MAX
0.83 (0.033)
0.32 (0.013)
0.84 (0.033) REF
DETAIL A
SEE DETAIL "A"
1.27 (0.050)
0.38 (0.015) 0.05 (0.002)
20.3 (0.800) REF
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
15
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WSF128K16-XXX
White Electronic Designs
ORDERING INFORMATION
W S F 128K16 - XXX X X X
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
M = Military Screened
I = Industrial
-55°C to +125°C
-40°C to +85°C
0°C to +70°C
C = Commercial
PACKAGE TYPE:
H1 = 1.075" sq. Ceramic Hex In-line Package, HIP (Package 400)
H = 1.185" sq. Ceramic Hex In-line Package, HIP (Package 401)
G1U = 22.4 mm Ceramic Quad Flat Pack, CQFP (Package 519)
G1T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 524)
ACCESS TIME (ns)
37 = 35ns SRAM and 70ns FLASH
72 = 70ns SRAM and 120ns FLASH
ORGANIZATION, 128K x 16
FLASH
SRAM
WHITE ELECTRONIC DESIGNS CORP.
DEVICE TYPE
SRAM SPEED FLASH SPEED
PACKAGE
SMD NO.
128K x 16 Mixed Module
128K x 16 Mixed Module
128K x 16 Mixed Module
70ns
70ns
70ns
120ns
120ns
120ns
66 pin HIP (H)
5962-96900 01HXX
5962-96900 01HYX
5962-96900 01H9X
66 pin HIP (H1)
68 lead CQFP/J (G1U)
128K x 16 Mixed Module
128K x 16 Mixed Module
128K x 16 Mixed Module
35ns
35ns
35ns
70ns
70ns
70ns
66 pin HIP (H)
5962-96900 02HXX
5962-96900 02HYX
5962-96900 02H9X
66 pin HIP (H1)
68 lead CQFP/J (G1U)
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May 2003
Rev. 6
16
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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