W24B02B-55LE [WINBOND]
Standard SRAM, 256KX8, 55ns, CMOS, PBGA48, TFBGA-48;
| 型号： | W24B02B-55LE |
| 厂家： | 
WINBOND |
| 描述： | Standard SRAM, 256KX8, 55ns, CMOS, PBGA48, TFBGA-48 静态存储器 内存集成电路 |
| 文件： | 总11页 (文件大小：194K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary W24B02
´ 8 CMOS STATIC RAM
256K
GENERAL DESCRIPTION
The W24B02 is a normal-speed, very low-power CMOS static RAM organized as 262144 x 8 bits that
operates on a wide voltage range from 2.7V to 3.6V power supply. The W24B02, W24B02-LE and
W24B02-LI, can meet the requirement of various operating temperature. This device is manufactured
using Winbond’s high performance CMOS technology.
FEATURES
· Low power consumption
· Three-state outputs
· Access time: 55/70 nS
· 2.7V to 3.6V supply voltage
· Fully static operation
· Battery back-up operation capability
· Data retention voltage: 1.5V (min.)
· Available packages: TFBGA and 32-pin Type
· All inputs and outputs directly TTL compatible
one TSOP (8 x 13.4 mm and 8 x 20 mm)
PIN CONFIGURATIONS
BLOCK DIAGRAM
PRECHARGE CKT.
CLK GEN.
A18
A17
A16
A15
A14
#OE
A10
#CS
I/O8
I/O7
I/O6
I/O5
I/O4
Vss
I/O3
I/O2
I/O1
A0
A1
A2
A3
A11
A9
A8
1
2
3
4
5
6
7
8
9
32
31
R
O
W
30
29
28
27
26
25
24
23
22
21
20
CORE CELL ARRAY
1024 ROWS
A13
#WE
NC
A15
VDD
A17
A16
A14
A12
A7
A6
A5
A4
D
E
C
O
D
E
R
256 X 8 COLUMNS
A13
A12
A10
A8
32-pin
TSOP
10
11
12
13
14
15
16
A7
I/O1
:
I/O8
I/O CKT.
COLUMN DECODER
19
18
17
DATA
CNTRL.
CLK
GEN.
A4
A2
A1 A0
A11 A9 A6 A5
A3
#WE
#CS
#OE
TFBGA TOP VIEW
1
2
3
4
5
6
A
B
C
D
E
F
A1
A2
A0
NC
A3
A4
A5
A8
A6
A7
PIN DESCRIPTION
I/O5
I/O6
I/O1
I/O2
#WE
NC
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
A0 - A17
I/O1 - I/O8
#CS
V
V
SS
DD
V
DD
V
SS
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
I/O7
A17
A16
A12
I/O3
I/O4
A14
NC
#CS
A11
#WE
G
H
#OE
A10
I/O8
A9
A15
A13
#OE
VDD
VSS
Ground
NC
No Connection
Publication Release Date: May 6, 2002
Revision A1
- 1 -
Preliminary W24B02
TRUTH TABLE
#CS
H
L
#OE
X
#WE
X
MODE
Not Selected
VDD CURRENT
ISB, ISB1
I/O1
High Z
- I/O8
H
L
H
Output Disable
2 Bytes Read
High Z
DOUT
DOUT
High Z
DIN
IDD
L
H
IDD
L
L
H
Lower Byte Read
Upper Byte Read
2 Bytes Write
IDD
L
L
H
IDD
L
X
L
IDD
L
X
L
Lower Byte Write
Upper Byte Write
Not Selected
DIN
IDD
L
X
L
High Z
High Z
IDD
X
X
X
ISB, ISB1
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER
Supply Voltage to VSS Potential
Input/Output to VSS Potential
Allowable Power Dissipation
Storage Temperature
RATING
UNIT
V
-0.5 to +4.6
-0.5 to VDD +0.5
1.0
V
W
-65 to +150
-20 to 85
°C
°C
°C
LE
LI
Operating Temperature
-40 to 85
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Operating Characteristics
(VSS = 0V; TA (°C) = -20 to 85 for LE, -40 to 85 for LI)
TEST
W24B02
MAX.
PARAMETER
SYM.
UNIT
CONDITIONS
MIN.
2.7
Operating Power Voltage
Input Low Voltage
VDD
VIL
VIH
ILI
-
-
-
3.6
+0.4
V
V
-0.2
+2.2
-1
Input High Voltage
VDD +0.3
+1
V
Input Leakage Current
VIN = VSS to VDD
mA
VI/O = VSS to VDD; #CS = VIH
(min.) or #OE = VIH (min.)
or #WE = VIL (max.)
Output Leakage Current
Output Low Voltage
ILO
-1
-
+1
mA
VOL
IOL = +0.1 mA
0.4
V
- 2 -
Preliminary W24B02
Operating Characteristics, continued
PARAMETER
TEST
W24B02
UNIT
SYM.
CONDITIONS
MIN.
MAX.
Output High Voltage
VOH
IDD
IOH = -1.0 mA
2.4
-
V
Operating Power Supply
Current
#CS = VIL (max.), I/O = 0 mA;
Cycle = min. Duty = 100%
-
20
mA
ISB
#CS = VIH (min.)
-
-
0.3
5
mA
Standby Power Supply
Current
ISB1
#CS
³
VDD -0.2V
mA
CAPACITANCE
(TA = 25° C, f = 1 MHz)
PARAMETER
Input Capacitance
SYM.
CIN
CONDITIONS
MAX.
UNIT
VIN = 0V
8
pF
pF
Input/Output Capacitance
CI/O
VOUT = 0V
10
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER
Input Pulse Levels
CONDITIONS
0V to 3.0V
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
5 nS
1.5V
See the drawing below
AC Test Loads and Waveform
1 TTL
1 TTL
OUTPUT
OUTPUT
5 pF
30 pF
Including
Jig and
Scope
Including
Jig and
Scope
(For TCLZ, TOLZ, TCHZ, TOHZ, TWHZ, TOW
)
3.0V
90%
10%
90%
10%
0V
5 nS
5 nS
Publication Release Date: May 6, 2002
Revision A1
- 3 -
Preliminary W24B02
AC Characteristics, continued
(VSS = 0V; TA (°C) = -20 to 85 for LE, -40 to 85 for LI)
Read Cycle
W24B02-55
W24B02-70
MIN. MAX.
70
PARAMETER
SYM.
UNIT
MIN.
MAX.
Read Cycle Time
TRC
55
-
-
-
nS
nS
nS
nS
nS
nS
nS
nS
nS
Address Access Time
TAA
55
55
35
-
-
-
70
70
35
-
Chip Select Access Time
TACS
TAOE
TCLZ*
TOLZ*
TCHZ*
TOHZ*
TOH
-
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
*These parameters are sampled but not 100% tested
-
-
10
5
10
5
-
-
-
-
25
25
-
30
30
-
-
-
10
10
Write Cycle
W24B02-55
W24B02-70
MIN. MAX.
70
PARAMETER
SYM.
UNIT
MIN.
55
45
45
0
MAX.
Write Cycle Time
TWC
TCW
TAW
TAS
-
-
-
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
60
60
0
-
-
-
-
-
Write Pulse Width
TWP
TWR
TDW
TDH
45
0
-
55
0
-
Write Recovery Time
#CS, #WE
-
-
Data Valid to End of Write
40
0
-
40
0
-
Data Hold from End of Write
-
-
Write to Output in High Z
TWHZ*
TOHZ*
TOW
-
25
25
-
-
30
30
-
Output Disable to Output in High Z
Output Active from End of Write
*These parameters are sampled but not 100% tested
-
-
5
5
- 4 -
Preliminary W24B02
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
T
RC
Address
T
AA
T
OH
TOH
D
OUT
Read Cycle 2
(Chip Select Controlled, #OE = VIL, #WE= VIH)
T
RC
Address
#CS
T
ACS
T
CHZ
T
CLZ
#OE
OUT
T
AOE
T
OHZ
T
OLZ
HIGH-Z
HIGH-Z
D
Publication Release Date: May 6, 2002
Revision A1
- 5 -
Preliminary W24B02
Timing Waveforms, continued
Read Cycle 3
(Output Enable
Controlled)
T
R
Address
#OE
T
AA
T
OH
TAOE
TOLZ
#CS
T
OHZ
TACS
TCLZ
CHZ
T
D
OUT
Write Cycle 1
(#OE Clock)
WC
Address
#OE
T
CW
#CS
T
AW
T
WP
T
AS
T
OHZ
(1, 4)
D
OUT
DIN
T
T
DH
DW
- 6 -
Preliminary W24B02
Timing Waveforms, continued
Write Cycle 2
(#OE = VIL Fixed)
T
WC
Address
#CS
T
WR
T
CW
T
AW
#WE
T
T
OH
WP
T
AS
(2)
(3)
T
WHZ
T
OW
(1, 4)
D
OUT
T
DW
T
DH
D
IN
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. DOUT provides the read data for the next address.
4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
Publication Release Date: May 6, 2002
- 7 -
Revision A1
Preliminary W24B02
DATA RETENTION CHARACTERISTICS
(TA (°C) = -20 to 85 for LE; -40 to 85 for LI)
PARAMETER
VDD for Data Retention
Data Retention Current
SYM.
VDR
TEST CONDITIONS
#CS ³ VDD -0.2V
MIN.
1.5
-
TYP. MAX. UNIT
-
-
-
-
5
-
V
IDDDR
#CS ³ VDD -0.2V, VDD = 3.0V
mA
nS
Chip Deselect to Data
Retention Time
TCDR See data retention waveform
0
Operation Recovery Time TR
TRC*
-
-
nS
* Read Cycle Time
DATA RETENTION WAVEFORM
V
DD
0.9 x VDD
>
0.9 x VDD
VDR 1.5V
=
TR
T
CDR
#CS
>
#CS
VDD
- 0.2V
=
ORDERING INFORMATION
OPERATING
TEMPERATURE
ACCESS
TIME
(nS)
OPERATING VOLTAGE (V)
PART NO.
PACKAGE
TFBGA
STANDBY CURRENT (mA)
(°C)
W24B02B-70LE
W24B02Q-70LE
W24B02T-70LE
W24B02B-70LI
W24B02Q-70LI
W24B02T-70LI
W24B02B-55LE
W24B02Q-55LE
W24B02T-55LE
W24B02B-55LI
W24B02Q-55LI
W24B02T-55LI
Notes:
70
70
70
70
70
70
55
55
55
55
55
55
-20 to 85
-20 to 85
-20 to 85
-40 to 85
-40 to 85
-40 to 85
-20 to 85
-20 to 85
-20 to 85
-40 to 85
-40 to 85
-40 to 85
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
3V/5 mA
TSOP I (8 x 13.4 mm)
TSOP I (8 x 20 mm)
TFBGA
TSOP I (8 x 13.4 mm)
TSOP I (8 x 20 mm)
TFBGA
TSOP I (8 x 13.4 mm)
TSOP I (8 x 20 mm)
TFBGA
TSOP I (8 x 13.4 mm)
TSOP I (8 x 20 mm)
1. Winbond reserves the right to make changes to its products without prior notice.
2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications
where personal injury might occur as a consequence of product failure.
- 8 -
Preliminary W24B02
PACKAGE DIMENSIONS
TFBGA
32-Lead Small Type One TSOP (8x13.4)
D
H
Dimension in Inches
Min. Nom. Max.
Dimension in mm
Symbol
Min.
Nom.
Max.
1.25
D
c
A
0.049
0.002
1
0.006 0.05
0.15
1.05
0.27
A
1
2
1.00
A
b
c
0.037 0.039 0.041 0.95
e
0.008 0.009 0.17 0.20
0.0056 0.0059 0.0062 0.14 0.15
0.007
E
0.16
D
E
0.461
0.311
0.520
0.469 11.70 11.80 11.90
0.465
0.315
b
0.319 7.90 8.00
8.10
0.528
H
e
D
0.536 13.20 13.40 13.60
0.50
0.020
0.020
L
0.012
0.028
0.50
0.70
0.30
0.675
0.00
L 1 0.027
2
A
A
0.000
0.004
5
0.10
5
Y
q
A
q
1
L
0
3
0
3
Y
L
1
Controlling dimension: Millimeters
Publication Release Date: May 6, 2002
Revision A1
- 9 -
Preliminary W24B02
Package Dimensions, continued
32-Lead TSOP (8 x 20 mm)
H D
D
Dimension in Inches
Dimension in mm
Min. Nom.
Max.
Symbol
Min.
__
Nom. Max.
__
__
__
A
1.20
0.15
1.05
0.047
c
__
__
0.002
0.037
0.006
0.05
0.95
A 1
0.041
0.009
1.00
0.20
0.15
0.039
2
A
M
e
0.007 0.008
0.17
0.12
0.23
0.17
b
E
c
0.005 0.006
0.720 0.724
0.007
0.728
0.10(0.004)
18.30 18.40 18.50
D
E
b
0.311 0.315
0.780 0.787
7.90
8.00
8.10
0.319
19.80
__
20.00 20.20
0.795
__
HD
e
__
__
0.020
0.50
0.016 0.020
0.40
__
0.50
0.60
__
0.024
__
L
__
0.031
0.80
__
L 1
A
__
0.000
0.004
5
0.10
5
0.00
1
Y
A2
1
3
3
q
q
L
1
A
Y
L1
Note:
Controlling dimension: Millimeters
- 10 -
Preliminary W24B02
VERSION HISTORY
VERSION
DATE
PAGE
DESCRIPTION
A1
May 6, 2002
-
Initial Issued
Headquarters
Winbond Electronics Corporation America Winbond Electronics (Shanghai) Ltd.
27F, 2299 Yan An W. Rd. Shanghai,
2727 North First Street, San Jose,
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5665577
200336 China
CA 95134, U.S.A.
TEL: 1-408-9436666
FAX: 1-408-5441798
TEL: 86-21-62365999
FAX: 86-21-62365998
http://www.winbond.com.tw/
Taipei Office
Winbond Electronics Corporation Japan
7F Daini-ueno BLDG, 3-7-18
Shinyokohama Kohoku-ku,
Yokohama, 222-0033
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City,
No. 378 Kwun Tong Rd.,
Kowloon, Hong Kong
9F, No.480, Rueiguang Rd.,
Neihu Chiu, Taipei, 114,
Taiwan, R.O.C.
TEL: 886-2-8177-7168
FAX: 886-2-8751-3579
TEL: 81-45-4781881
FAX: 81-45-4781800
TEL: 852-27513100
FAX: 852-27552064
Please note that all data and specifications are subject to change without notice.
All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
Publication Release Date: May 6, 2002
Revision A1
- 11 -
相关型号：
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