W5281_技术文档

W528X Application Note

ADPCM VOICE SYNTHESIZER

(PowerSpeech)

INTRODUCTION

The W528x family are programmable speech synthesis ICs that utilize the ADPCM coding method to

generate all types of voice effects.

The W528x's LOAD and JUMP commands and four programmable registers provide powerful user-

programmable functions that make this chip suitable for an extremely wide range of speech IC

applications. Before developing their own PowerSpeech programs and codes, customers should

review the application notes presented below.

The W528x family includes the W5281, W5282, W5283, W5284, W5289, W5285, W5286, W5287,

and W5288. The ROM size of each of these products is shown below:

BODY

W5281

W5282

W5283

W5284

W5289

W5285

W5286

W5287

W5288

ROM Size

80K

160K

240K

320K

416K

512K

768K

1M

1.5M

FEATURES

· Programmable speech synthesizer

· Wide operating voltage range: 2.4 to 5.0 volts

· 4-bit ADPCM synthesis method

· Provides 4 direct trigger inputs that can easily be extended to 8 or 12 matrix trigger inputs

· Two trigger input debounce times ( Long/ Short ) can be set

· Provides up to 2 LEDs and 3 STOP outputs

· Every LED pin can drive 3 LEDs simultaneously

· LED flash frequency: 3 Hz

· AUD output current: 5 mA

· Flexible functions programmable through the following:

- LD (load), JP (jump) commands

- Four registers: R0, EN, STOP, and MODE

- Conditional instructions

- Speech equation

- END instruction

- Global repeat (GR) setting

- Output frequency and LED flash type setting

· Programmable power-on initialization (POI) (can be interrupted by trigger inputs)

· POI delay time of 160 mS ensures stable voltage when chip is powered on

Version C

Release Date: May 1998

- 1 -

W528X Application Note

· Can be programmed for the following functions:

- Interrupt or non-interrupt for rising or falling edge of each trigger pin (this feature determines

retriggerable, non-retriggerable, overwrite, and non-overwrite features of each trigger pin)

- Four playing modes:

One Shot (OS)

Level Hold (LH)

Single-cycle level hold (S_LH)

Complete-cycle level hold (C_LH)

- Stop output signal setting

- Serial, direct, or random trigger mode setting

· Four frequency options (4/4.8/6/8 KHz) and LED On/Off control can be set independently in each

GO instruction of speech equation

· Independent control of LED 1 and LED 2

· Total of 256 voice group entries available for programming

· Provides the following mask options:

- LED flash type: synchronous/alternate

- LED 1 section-controlled: Yes/No

- LED 2 section-controlled/STPC-controlled

- LED volume-controlled: No/Yes

- 2 -

W528X Application Note

FUNCTIONAL DESCRIPTION

1. Instruction Sets

The W528X family PowerSpeech program instruction sets include unconditional instructions and

conditional instructions. Most of these instructions are programmed by writing "LD (Load)" and "JP

(Jump)" commands and by modifying the content of the R0, EN, STOP, and MODE registers.

Registers

A. R0 Register

R0 is an 8-bit register that stores the entry values of from 0 to 255 voice groups. The structure of this

register is shown below:

R0:

Bit:

7

6

5

4

3

2

1

0

B. EN Register

EN is an 8-bit register that stores the rising/falling edge enable or disable status information for all

trigger pins, which determines whether each trigger pin is retriggerable, non-retriggerable, overwrite, or

non-overwrite. The 8-bit structure of this register and the rising or falling edge of the triggers

corresponding to each bit are shown below:

EN:

Bit:

7

6

5

4

3

2

1

0

Trigger:

4r

3r 2r

1r

4f

3f

2f 1f

The digits 1 to 4 represent triggers 1 to 4, respectively; "r" represents the rising edge; and "f"

represents the falling edge. When any one of the eight bits is set to "1," the rising or falling edge of the

corresponding trigger pin can be enabled, interrupting the current state.

C. STOP Register

The STOP register stores stop output status information to determine the voltage level of each stop

output pin. The 8-bit structure of this register and the stop output pin corresponding to each bit are

shown below:

STOP:

Bit:

7

6

5

4

3

2

1

0

STOP:

X

STPC STPB STPA

"X" indicates a "don't care" bit.

D. MODE Register

The MODE register is used to store operand information to select among various operating modes as

shown below.

MODE:

3 -

W528X Application Note

Bit:

7

6

5

4

3

2

1

0

MODE:

Flash/DC

LED2/STPC

TG4/LED2-STPC

Long / Short

X

Bit 7 is used to determine the output status of LED1 and/or LED2: Flash alternate or synchronous

output (by mask option), or DC (LED will be lit constantly without flash).

Bit 6 and bit 5 together determine whether the I/O pin (i.e., pin 4) acts as a trigger input pin, LED output

pin, or STOP output pin.

Bit 4 is used to determine whether the debounce time for all trigger inputs is long ( arround 45 mS ) or

short ( arround 350mS).

Commands

A. Unconditional Instructions

Load (LD) command:

This command can load value or operand data into the R0, EN, STOP, or MODE register.

LD R0, value:

This instruction is used to load a voice group entry value into register R0, as shown in the following

example.

Example:

(decimal)

LD R0, 167

(hexadecimal)

0xA7

B

1

0

1

0

1

Value: 0 to 255

LD EN, operand:

This instruction is used to define the trigger interrupt settings by loading the operand message into

register EN. The following example illustrates how the settings are defined.

Example:

LD EN, 0x41

(hexadecimal)

0100 0001 (binary)

0

1

0

1

TG:

Group:

4r

7

3r 2r 1r 4f

3f

2

2f 1f

6

5

4

3

1

0

a. When the rising edge of TG3 (3R) is activated, the EN register will cause TG3 to interrupt the

current playing state and jump immediately to voice group 6, the voice group that corresponds to

3R.

- 4 -

W528X Application Note

b. When the falling edge of TG1 goes active, the EN register will cause TG1 to interrupt the current

playing state and jump immediately to voice group 0, the voice group that corresponds to 1F.

c. No action will be taken when the other trigger pins are pressed, because the corresponding bits are

set to "0."

LD STOP, operand:

This instruction loads the operand message into the STOP register to set the output levels of the stop

signals. When a particular STOP bit is set to "1," the corresponding stop signal will be an active low

output.

Example:

LD STOP, 0x43

0

1

0

1

0

STOP:

X

STPC STPB STPA

a. The STPA and STPB output signals will be high outputs.

b. The STPC output signal will be a low output.

c. The second bit "1" is a "don't care" bit and so has no effect on the stop signal output setting.

LD MODE, operand:

This instruction is used to select among various operating modes. It loads an operand message into

the MODE register to select one mode from each of several pairs of modes.

A "1" for one of these bits selects the first of the pair of modes indicated; a "0" selects the second of

the pair. The following example describes the MODE setting of the W528X product.

Example:

LD MODE, 0xD0

0

1

0

1

0

1

MODE: Flash

Long

don't care

LED2

LED2-STPC

a. The LED is set as a flash type, with the flash frequency 3 Hz.

b. Pin 4 (TG4/LED2-STPC) is configured as either the LED2 or STPC output (determined by bit 6,

LED2/STPC).

c. Pin 4 is configured as the LED2 output pin.

d. The debounce time of the trigger inputs is set to long (arround 45 mS).

JUMP (JP) Command:

JP value:

5 -

W528X Application Note

Instructs device to jump directly to the voice group corresponding to the value indicated. The voice

group value may range from 0 to 127.

JP R0:

Instructs device to jump to whatever voice group is indicated by the value currently stored in register

R0.

B. Conditional Instructions:

Conditional instructions are executed only when the conditions specified in the instructions hold. The

conditional instructions are listed below. An explanation of the notation used in the instructions follows.

(Note: There are no conditional instructions for LD MODE.)

Load (LD) command:

LD R0, value @LAST:

Load the voice group entry value into R0 when the last global repeat sound cycle is finished.

LD R0, value @TGn_HIGH (or_LOW):

If the n-th (n: 1 to 4) trigger pin status is kept at "High" (or "Low") voltage level, then load the value into

R0 register.

LD EN, operand @LAST:

Load the operand message into EN register when the last global repeat sound cycle is finished.

LD STOP, operand @LAST:

Load the operand message into STOP register when the last global repeat sound cycle is finished.

Jump (JP) command:

JP value @LAST:

When the last global repeat sound cycle is finished, jump to the group entry value indicated (range: 0

to 127) and begin execution.

JP R0 @LAST:

When the last global repeat sound cycle is finished, jump to the group entry value indicated by the R0

register and begin execution.

JP value @TGn_HIGH (or _LOW):

If the n-th (n: 1 to 4) trigger pin is kept at "High" (or "Low") voltage level, then jump to the indicated

value (range: 0 to 127) and begin execution.

JP R0 @TGn_HIGH (or _LOW):

If the n-th (n: 1 to 4) trigger pin is kept at "High" (or "Low") voltage level, then jump to the group entry

value indicated by the R0 register and begin execution.

- 6 -

W528X Application Note

C. End Instruction:

END:

This command instructs the chip to cease all activity immediately.

D. Instruction Set List:

INSTRUCTION

LD R0, value

RANGE

DESCRIPTION

R0 <-- value

DEFAULT VALUE

0000 0000

Unconditional

0- 255

LD EN, operand

LD STOP, operand

LD MODE, operand

JP value

EN <-- operand

1111 1111

-

STOP <-- operand

MODE <-- operand

xxxx x111

-

1111 xxxx

-

Jump to the group entry

value indicated

0- 127

JP R0

Jump to the group entry

indicated by R0

0- 255

-

LD R0, value @LAST

If last global repeat finished,

R0 <-- value

Conditional

LD R0, value

@TGn_HIGH

If TGn (n: 1-4) status is high

level, R0 <-- value

LD R0, value

@TGn_LOW

If TGn (n: 1-4) status is low

level, R0 <-- value

LD EN, operand @LAST

If last global repeat finished,

EN <-- operand

LD STOP, operand

@LAST

If last global repeat finished,

STOP <-- operand

-

JP value @LAST

If last global repeat finished,

jump to the group entry

value indicated

0- 127

JP R0 @LAST

If last global repeat finished,

jump to the group entry

value indicated in R0

0- 255

0- 127

0- 255

JP value @TGn_HIGH

JP value @TGn_LOW

JP R0 @TGn_HIGH

If TGn (n: 1-4) status is high

level, jump to the group

entry value indicated

If TGn (n: 1-4) status is low

level, jump to the group

entry value indicated

If TGn (n: 1-4) status is high

level, jump to the group

entry value indicated in R0

7 -

W528X Application Note

Instruction Set List, continued

INSTRUCTION

RANGE

DESCRIPTION

DEFAULT VALUE

JP R0 @TGn_LOW

If TGn (n: 1-4) status is low

level, jump to the group

entry value indicated in R0

Conditional

0- 255

END

Stop all activity and enter

standby state

END

-

2. Mask Option Description

The mask options of the W528X PowerSpeech are used to select features that cannot be programmed

through the chip's registers. The W528X provides four mask options, which are listed in the following

table:

MASK OPTION

LED flash type

INSTRUCTION

DEMO CHIP OPTION

LED_ASYN; (default)

LED_SYN

-

(Asynchronous/Synchronous)

LED volume controlled

(No/Yes)

LED_VOL_OFF; (default)

LED_VOL_ON

If LED_VOL_ON is set, the other

mask options will be of no use

LED1: section-controlled

(Yes/No)

LED1_S_CTL; (default)

LED1_S_OFF

-

LED2: section-controlled

/STPC-controlled

LED2_S_CTL; (default)

LED2_STC_CTL

-

Notes:

1.The demo chip for the W528X series is the W5280.

2. The mask options can be configured automatically by the W5280.

3. Speech Equation Description

Speech equations are used to define the combination of playback sounds. The following is an example

of the speech equation format:

GR = N

H4+m1*Sound1_FL+m2*Sound2_FL+SIL[1FFFF]+...T4

END

where

GR = N defines the number of global repeats (from 1 to 16);

m1 and m2 define the number of local repeats (from 1 to 7);

Sound1 and Sound2 are files containing ADPCM converted voice data;

- 8 -

W528X Application Note

_FL is the section control setting, for which the parameters F and L are as follows:

F

0

1

2

3

Frequency

4 KHz

4.8 KHz

6 KHz

8 KHz

L

1

0

LED status

On

Off

SIL[1FFFF] is a period of silence of length 1FFFF.

H4 and T4 are the Head file and Tail file with 4-bit ADPCM data format. These two files can be used to

eliminate the popping sound when the sound starts and stops. The following is a sample waveform:

V

1/2V

H4

T4

0.25Kbit

0

4. Programmable Power-on Initialization

Whenever the W528X PowerSpeech is powered on, the programs contained in the 32nd voice group

will be executed immediately. Thus the user can write programs into this group to set the initial power-

on state. If the user does not wish to execute any programs at power-on, an "END" instruction should

be entered in group 32.

5. PowerSpeech Program Format

The W528X PowerSpeech enables users to define the functions of their products using the W528X

PowerSpeech programming language. An example (for reference only) of the W528X PowerSpeech

program format is shown below. (Explanatory notes follow the example.)

9 -

W528X Application Note

(6)

W5281

(1)

(2)

LED_ASYN

; (default)/ [LED_SYN ]

; (default)/ [LED1_S_OFF ]

; (default)/ [LED2_STC_CTL ]

; (default)/ [LED_VOL_ON ]

LED1_S_CTL

LED2_S_CTL

LED_VOL_OFF

LED0

FREQ2

; (default)/ [LED1 ]

; (default)/ [FREQ0, FREQ1, FREQ3 ]

(3)

32: GR = 5

(7)

H4+SN_01+SN_20+SN_31+T4

END

GR = 3

H4+S11+S2+[1FFF]+T4

END

(8)

(4)

(5)

0:

2:

(9)

LD R0, 64

; disable all triggers

; LED flash, Stop C, 20 mS

; Stop C = 1, Stop A, Stop B = 0

LD EN, 0X00

LD MODE, 0X90

LD STOP, 04

END

Notes:

(1) Bodies: The user must first define the PowerSpeech body to be used, or else an error message will appear during

compiling. The PowerSpeech bodies include the following:

W528x: W5281, W5282, W5283, W5284, W5289, W5285, W5286, W5287, and W5288

(2) Mask Options: See page 8 above.

(3) Declarations: State the output frequency and LED on/off state, as follows:

LED on/off:

LED0: LED off (default)

LED1: LED on

Output frequency:

FREQ0: 4KHz

FREQ1: 4.8 KHz

FREQ2: 6 KHz (default)

FREQ3: 8 KHz

(4) Program body: Write application program and speech operations, including the following:

Define entry point of speech group.

Determine number of global repeats.

Describe speech equations.

Define the register values.

(5) Group body: Define the voice group entry point.

PRODUCT

GROUP ENTRY POINTS

TG H/W ENTRY POINTS

POWER-ON ENTRY POINT

W528X

0-255

0-7

32

(6) Note: A semicolon (";") is used to distinguish characters that are not part of the program. Characters written to the right of

the semicolon are not considered part of the content of the program.

- 10 -

W528X Application Note

(7) Global Repeat: The global repeat instruction is "GR = n," where n is from 1 to 16. This instruction must be placed on the

same line as the group entry point. The global repeat instruction can be represented in three ways, as shown below.

0: GR = 3

H4+sound+T4

END

0: 3

H4+sound+T4

END

0: ; default = 1

H4+sound+T4

END

(8) Speech equation: See page 8 and page 9 above.

(9) Blank: A voice group entry point must be followed by one full blank line without any instructions or speech equations.

The "GR = n" instruction must follow the entry point, however.

6. Programming Examples (for reference only)

This section presents several examples of how the functions of the W528X PowerSpeech may be

programmed. Customer programs should be written in ASCII code using a text editor; after compiling,

the sound effects resulting from the programs can be tested using a Winbond demo board.

Example1: Four playing mode settings

a. One-shot Trigger Mode

0:

; TG1 falling edge group entry point

; Enable TG1 falling edge input only

LD EN, 0X01

H4+sound+T4

END

The timing diagram for this example is shown below:

CASE 1:

CASE 2:

TG1:

Sound 1

AUD:

11 -

W528X Application Note

b. Level Hold Trigger Mode

0:

; TG1 falling edge group entry point

; Enable TG1 falling and rising edge input

LD EN, 0X11

H4+sound1+T4

JP 0

4:

; TG1 rising edge group entry point

END

The timing diagram is shown below:

CASE 1:

CASE 2:

TG1:

Stop immediately

S1

AUD:

c. Completed Cycle Level Hold

0:

; TG1 falling edge group entry point

; Enable TG1 falling edge input only

LD EN, 0X01

H4+sound1+T4

JP 0 @TG1_LOW ; If TG1 state is low, jump to 0 entry point

END

The timing diagram is shown below:

CASE 1:

CASE 2:

TG1:

S1

AUD:

d. Single Cycle Level Hold

0:

; TG1 falling edge group entry point

LD EN, 0X11

H4+sound1+T4

END

; Enable TG1 falling and rising edge input

4:

END

The timing diagram is shown below:

- 12 -

W528X Application Note

CASE 1:

CASE 2:

TG1:

Stop immediately

S1

AUD:

Example 2: Retriggerable and Non-retriggerable setting

a. Retriggerable:

0: LD EN, 0x01

.

END

The timing diagram is shown below:

TG1:

AUD:

Sound 1

Restart

b. Non-retriggerable:

0: LD EN, 0x00

.

LD EN, 0x11

END

The timing diagram is shown below:

TG1:

Sound 1

AUD:

Sound 1

13 -

W528X Application Note

Example 3: Serial Playing Mode (5 segments)

W5281

32:

10:

11:

12:

LD R0, 8

LD EN, 0X01

END

LD R0, 11

H4+S3+T4

END

0:

8:

JP R0

LD R0, 12

H4+S4+T4

END

LD R0, 9

H4+S1+T4

END

LD R0, 8

H4+S5+T4

END

9:

LD R0, 10

H4+S2+T4

END

The timing diagram is shown below:

TG1

1

5

2

3

1

S1

S2

S3

S1

S5

AUD

Example 4: Random (1)

W5281

32:

18:

19:

20:

LD EN, 0X01

H4+S1+T4

LD R0, 9

JP 31

LD R0, 8

END

0:

LD EN, 0X00

H4+S2+T4

LD R0, 8

JP 31

JP R0

8:

JP 18 @TG1_HIGH

9:

H4+S3+T4

LD R0, 11

JP 19 @TG1_HIGH

- 14 -

W528X Application Note

Example 4, continued

10:

JP 31

JP 20 @TG1_HIGH

21:

31:

11:

H4+S4+T4

LD R0, 10

JP 21 @TG1_HIGH

JP 8

LD EN, 0X01

END

The timing diagram is shown below:

TG1

1

5

2

3

...

1

...

S3

S1

S4

S2

S4

AUD

Example 5: Random (2)

W5281

32:

8:

LD EN, 0X11

END

H4+S4+T4

END

0:

9:

LD R0, 8

H4+S1+T4

END

LD R0, 9

10:

11:

12:

H4+S5+T4

END

LD R0, 10

LD R0, 11

LD R0, 12

H4+S3+T4

END

H4+S2+T4

END

JP 0

4:

JP R0

The timing diagram is shown below:

15 -

W528X Application Note

TG1

1

2

3

5

...

1

...

S1

S5

S3

S2

S4

AUD

7. Application Examples (for reference only)

The following paragraph presents several special application examples.

Example 1: Power-on Trigger:

If one of the trigger pins is always grounded, then the sound corresponding to that trigger will be played

out at power-on.

Program:

9:

W5281

32:

H4+S2+T4

LD EN, 0X0F

END

LD EN, 0X00

JP 8 @TG1_LOW

JP 9 @TG2_LOW

JP 10 @TG3_LOW

JP 11 @TG4_LOW

LD EN, 0X0F

2:

10

H4+S3+END

LD EN, 0X0F

END

0:

8:

3:

H4+S1+T4

LD EN, 0X0F

END

11:

H4+S4+T4

LD EN, 0X0F

END

1:

- 16 -

W528X Application Note

Application Circuit:

V

DD

TG1

TG2

AUD

TG3

TG4

W528X

LED1

STB

STA

Example 2: 8 TG Input Application:

In this application, the 4 trigger inputs are expanded to 8 trigger inputs.

Program:

W5281

32:

LD MODE, 0XA0

LD STOP, 0X00

LD EN, 0X0F

END

; STPA set to low level

; One Shot play mode

0:

LD STOP, 0X01

JP 8 @TG1_HIGH

H4+V1+T4

; STPA set to high level

; check high

; play V1

LD STOP, 0X00

END

; STPA set to low level

8:

1:

; pseudo trigger pin

; play V2

; STPA set to low level

H4+V2+T4

LD STOP, 0X00

END

LD STOP, 0X01

JP 9 @TG2_HIGH

H4+V3+T4

; STPA set to high level

; check high

; play V3

LD STOP, 0X00

END

; STPA set to low level

9:

; pseudo trigger pin

; play V4

H4+V4+T4

17 -

W528X Application Note

Example 2, Continued

LD STOP, 0X00

; STPA set to low level

END

2:

LD STOP, 0X01

JP 10 @TG3_HIGH

H4+V5+T4

; STPA set to high level

; check high

; play V5

LD STOP, 0X00

END

; STPA set to low level

10:

3:

; pseudo trigger pin

; play V6

; STPA set to low level

H4+V6+T4

LD STOP, 0X00

END

LD STOP, 0X01

JP 11 @TG4_HIGH

H4+V7+T4

; STPA set to high level

; check high

; play V7

LD STOP, 0X00

END

; STPA set to low level

11:

; pseudo trigger pin

; play V8

; STPA set to low level

H4+V8+T4

LD STOP, 0X00

END

Application Circuit

V

DD

V1

V2

TG1

TG2

TG3

TG4

V3

V4

AUD

V5

V6

W528X

V7

V8

LED1

STB

STA

- 18 -

W528X Application Note

Example 3: 12 TG Inputs Application

Program:

W5281

32:

LD MODE, 0X80

LD STOP, 0X00

LD EN, 0X0F

END

; pin4 set as STPC output

; set STPA, STPB, and STPC = 0

0:

LD EN, 0X00

LD STOP, 0X07

JP 10 @TG1_LOW

LD STOP, 0X06

JP 13 @TG1_LOW

LD STOP, 0X05

JP 16 @TG1_LOW

LD STOP, 0X03

JP 19 @TG1_LOW

LD EN,0X0F

; disable all TGs

; STPA, STPB, STPC all set to 1

; play V1

; STPC, STPB, STPA = "110"

; play V4

; STPC, STPB, STPA = "101"

; play V7

; STPC, STPB, STPA = "011"

; play V10

END

1:

LD EN, 0X00

LD STOP, 0X07

JP 11 @TG2_LOW

LD STOP, 0X06

JP 14 @TG2_LOW

LD STOP, 0X05

JP 17 @TG2_LOW

LD STOP, 0X03

JP 20 @TG2_LOW

LD EN,0X0F

; disable all TGs

; STPA, STPB, STPC all set to 1

; play V2

; STPC, STPB, STPA = "110"

; play V5

; STPC, STPB, STPA = "101"

; play V8

; STPC, STPB, STPA = "011"

; play V11

END

2:

LD EN, 0X00

LD STOP, 0X07

JP 12 @TG3_LOW

LD STOP, 0X06

JP 15 @TG3_LOW

LD STOP, 0X05

JP 18 @TG3_LOW

LD STOP, 0X03

JP 21 @TG3_LOW

; disable all TGs

; STPA, STPB, STPC all set to 1

; play V3

; STPC, STPB, STPA = "110"

; play V6

; STPC, STPB, STPA = "101"

; play V9

; STPC, STPB, STPA = "011"

; play V12

19 -

W528X Application Note

Example 3, Continued

LD EN,0X0F

END

10:

H4+V1+T4

LD STOP, 0X00

LD EN, 0X0F

END

11:

H4+V2+T4

LD STOP, 0X00

LD EN, 0X0F

END

_

20:

H4+V11+T4

LD STOP, 0X00

LD EN, 0X0F

END

21:

H4+V12+T4

LD STOP, 0X00

LD EN, 0X0F

END

- 20 -

W528X Application Note

Application Circuit

V7

V1 V10

V4

V5

V6

TG1

V11 V8

V2

V3

AUD

TG2

TG3

V12

V9

W528X

LED1

STC

STB

STA

21 -

W528X Application Note

Example 4: Power-on Reset Application

If a product designer wants to use the POI (Power-On Initialize) function while adding a large capacitor

between VDD and ground to eliminate voltage ripple or noise, then a discharge resistor must be added

between VDD and ground. This discharge resistor prevents the system from hanging when the power is

turned off and then on again. The application circuit is shown below:

Application Circuit

TG1

TG2

AUD

TG3

TG4

W528X

LED1

STB

STA

V_DD

Vss

+

V

R

R = 1 to 2 MW if C is larger than 470 mF.

- 22 -


型号：	W5281
厂家：	WINBOND
描述：	Speech Synthesizer, 3s 语音集成电路商用集成电路
文件：	总22页 (文件大小：111K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

W5281 [WINBOND]

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