W536030P [WINBOND]
VOICE & MELODY CONTROLLER; VOICE & MELODY控制器型号: | W536030P |
厂家: | WINBOND |
描述: | VOICE & MELODY CONTROLLER |
文件: | 总14页 (文件大小:554K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
W536030P/060P/090P/120P
VOICE & MELODY CONTROLLER
(ViewTalk TM Series)
Table of Contents-
1.
2.
3.
4.
5.
GENERAL DESCRIPTION ......................................................................................................... 2
FEATURES................................................................................................................................. 3
BLOCK DIAGRAM ...................................................................................................................... 5
PAD DESCRIPTION ................................................................................................................... 6
ELECTRICAL CHARACTERISTICS........................................................................................... 7
5.1 Absolute Maximum Ratings............................................................................................... 7
5.2 DC Characteristics............................................................................................................. 8
5.3 AC Characteristics............................................................................................................. 9
6.
7.
TYPICAL APPLICATION CIRCUITS ........................................................................................ 12
6.1 Sub Clock with RC Mode................................................................................................. 12
6.2 Sub Clock with Xtal Mode................................................................................................ 13
REVISION HISTORY................................................................................................................ 14
Publication Release Date: May 21, 2003
- 1 -
Revision A4
W536030P/060P/090P/120P
1. GENERAL DESCRIPTION
The W536XXXP, a member of ViewTalkTM family, is a high-performance 4-bit micro-controller (uC)
with built-in 8KW uC program. The 4-bit uC core contains dual clock source, 4-bit ALU, two 8-bit
timers, one 14 bits divider, maximum 32 pads for input or output, 8 interrupt sources and 8-level
nesting for subroutine/interrupt applications. Speech unit, integrated as a single chip with maximum
128 seconds (based on 6.4K sample rate with 5 bits MDPCM), is capable of expanding to 512
seconds speech addressed by external memory W55XXX with serial bus interface. It can be
implemented with Winbond Power Speech using MDPCM algorithm. Melody unit provides dual tone
output and can store up to 1k notes. Power reduction mode is also built in to minimize power
dissipation. It is ideal for educational toys, remote controllers and other application products which
incorporate both melody and speech.
BODY
W536030P
W536060P
W536090P
90 sec
W536120P
120 sec
Voice
30 sec
60 sec
8I/O, 12I, 12O
8I/O, 12I, 12O
8I/O, 8I
(RA/RB/RC/RD)
8I/O, 8I
(RA/RB/RC/RD)
I/O pad
(RA/RB/RC/RD/RE
(RA/RB/RC/RD/RE/
/RF/RG/RH)
RF/RG/RH)
WDT disable/Enable
(Mask Option)
Y
Y
Y
Y
Y
Y
Y
Y
Sub-clock
RC/XTAL mode
(Mask Option)
Tri-state serial bus
(Mask Option)( 1)
Y
Y
Y
Y
Y
N
Y
Y
Cascaded Voice through
serial bus (2)
Notes:
1. Tri-state serial bus mask option can float serial bus while voice playing is no active. Let this mask option is disabled to get
minimum power consumption in general.
2. Cascaded Voice ROM user option help to expand voice up to 512 sec through serial bus by W55XXX chip.
- 2 -
W536030P/060P/090P/120P
2. FEATURES
• Operating voltage: 2.4 volt ~ 5.5 volt
• Watch dog disabled/enabled by mask option
• Dual clock operating system
− Main clock with Ring/Crystal (400 KHz to 4 MHz)
− Sub-clock with 32.768 KHz RC/Crystal by mask option
• Memory
− Program ROM (P-ROM): 8 K × 20 (ROM Bank0)
− Data RAM (W-RAM): 1K × 4 bit
(RAM Bank 0 is 512 nibbles from 0: 000~0: 1FF and 0:380~0:3FF are mapped to special
register.
RAM Bank F is 512 nibbles from F: 200~F: 3FF either data RAM or dedicated to script
kernel)
• Maximum 32 input/output pads
− Ports for input only: 12 pads (RC, RD and RG port; RG for W536090P/120P only)
− Ports for output only: 12 pads (RE, RF and RH port; RH for W536090P/120P only)
− Ports for Input/output: 8 pads
• Power-down mode
− Hold mode (except for 32KHz oscillator)
− Stop mode (including 32KHz oscillator and release by RD or RC port)
• Eight types of interrupts
− Five internal interrupts (Divider, Timer 0, Timer 1, Speech, Melody)
− Three external interrupts (Port RC, RD, RA)
• One built-in 14-bit clock frequency divider circuit
• Two built-in 8-bit programmable countdown timers
− Timer 0: one of two clock sources (FOSC/4 or FOSC/1024) can be selected
− Timer 1: built-in auto-reload function includes internal timer, external event counter from
RC.0
• Built-in 18/14-bit watchdog timer for system reset.
• Powerful instruction sets.
• 8-level subroutine (including interrupt) nesting
Publication Release Date: May 21, 2003
- 3 -
Revision A4
W536030P/060P/090P/120P
• Speech function
− Provided 1M / 2M/ 3M/ 4M bits Voice ROM for W536030P/060P/090P/120P based on 5
bits MDPCM algorithm
− Voice ROM (V-ROM) available for uC data.
− Maximum 8*256 Label/Interrupt vector (voice section number) available
− Provide two types of speech busy flag to either each GO or each trigger
− Maximum up to 16M bits speech address capability interface with external memory
W55XXX through serial bus.
• Melody function
− Provide 1K notes (22bits/note) dedicated melody ROM
− Provide two types of melody busy flag to uC either each note or each song
− Provide 6 kinds of beat, 16 kinds of tempo, and pitch range from G3# to C7
− Tremolo, triple frequency and 3 kinds of percussion available
− Maximum 31 songs available
• Can mix speech with melody
• Multi-engine controller
• Direct driving speaker/buzzer or DAC output
• Chip On Board available
- 4 -
W536030P/060P/090P/120P
3. BLOCK DIAGRAM
PORT RA
RA0~3
RB0~3
Data RAM
1K* 4Bit
TONE
PORT RB
PORT RC
PORT RD
RC0~3
RD0~3
ACC
ALU
ROM
8K*20Bit
PORT RE
RE0~3
RF0~3
PORT RF
PORT RG
PC
Special Register
RG0~3
RH0~3
IEF
HCF
HEF PEF
SPC MLD
EVF
PORT RH
FLAG0
ADDR
Parallel
to
Serial
PM
0
MR
0
STACK
(8
Levels)
FLAG1
LPX0
LPX4
PSR0
LPX3
LPY1
CLK
LPX1 LPX2
DATA
SPC_busy
SPC_play
LPXY
VDDA
LPX5 LPY0
Speech
ROSC
VSSA
MDPCM
Shared_ROM Data
core
VSSP
PWM1/DAC
PWM2
Interrupt ,Hold
& Stop Control
Voice ROM
(1M /2M/3M/4M
bits)
Timer 1
(8 Bit)
Timer 0
(8 Bit)
PWM/DAC
MLD_busy
MLD_play
Mix
VDDP
VDD
Block
VSS
Divide
Dual Tone
Melody
(1K notes)
Watch Dog Timer
(18/14 Bit)
r
TEST
RES
(14/10 Bit)
Timing Generator
XIN XOUT X32I X32O
Publication Release Date: May 21, 2003
Revision A4
- 5 -
W536030P/060P/090P/120P
4. PAD DESCRIPTION
SYMBOL
I/O
FUNCTION
Input pad for main clock oscillator. It can be connected to crystal when
crystal mode is selected (SCR0.2=1), otherwise connect a resistor to
VDD to generate main system clock while Ring mode is selected
(SCR0.2=0 and default). Oscillator can be enabled or stopped by set
SCR0.1 to 1 or clear to 0 separately. External capacitor connects to
start oscillation and get more accurate clock when crystal mode
XIN/RXIN
I
Output pad for oscillator which is connected to another crystal pad
when in crystal mode. External capacitor connects to start oscillation
when in crystal mode.
32.768 KHz crystal input pad or external resistor node 1 by mask
option. External 15~20pF capacitor connects to start oscillation and
get more accurate clock when in crystal mode.
32.768 KHz crystal output pad or external resistor node 2 by mask
option. External 15~20pF capacitor connects to start oscillation when
in crystal mode.
XOUT
O
I
X32I/RSUB1
X32O/RSUB2
O
General Input/Output port specified by PM1 register. If output mode is
selected, PM0 register bit 0 can be used to specify CMOS/NMOS
driving capability option. Initial state is input mode. RA3 may be uses
as TONE if bit 0 of MR0 special register is set to logic 1. An interrupt
source.
RA0 ~ RA3/TONE
(4)
I/O
General Input/Output port specified by PM2 register. If output mode is
selected, PM0 register bit 1 can be used to specify CMOS/NMOS
driving capability option. Initial state is input mode.
4-bit schmitter input with internal pull high option specified by PM3
register bit 2. Each pad has an independent interrupt capability
specified by PEFL special register. Interrupt and STOP mode wake up
source. RC0 is also the external event counter source of Timer1.
RB0 ~ RB3
(4)
I/O
I
RC0 ~ RC3
4-bit schmitter input port with internal pull high option specified by PM3
register bit 3. Each pad has an independent interrupt capability
specified by PEFH special register. Interrupt and STOP mode wake up
source.
RD0 ~ RD3
I
RE0~RE3
(4)
Output port only. PM3 register bit 0 can be used to specify
CMOS/NMOS driving capability option.
O
RF0~RF3
(4)
Output port only. PM3 register bit 1 can be used to specify
CMOS/NMOS driving capability option.
O
I
Input port with internal pull high option specified by PM6 register bit 0.
(W536090P/W536120P only)
RG0 ~ RG3
RH0 ~ RH3
(4)
Output port only. PM6 register bit 1 can be used to specify
O
I
CMOS/NMOS driving capability option. (W536090P/W536120P only)
System reset pad, active low with internal pull-high resistor.
RES
- 6 -
W536030P/060P/090P/120P
PAD Description, continued
SYMBOL
I/O
FUNCTION
TEST
I
Test pad. Active high with internal pull low resistor.
Connect resistor to VDD pad to generate speech or melody playing
ROSC
I
clock source.
While speech or melody is active, PWM1/DAC is speaker direct driving
output or DAC output controlled by voice output file.
PWM1/DAC
PWM2
O
O
While speech or melody is active, PWM2 is another speaker direct
driving output.
ADDR
CLK
DATA
VSS
VSSP
VSSA (3)
VDD
VDDP
VDDA (3)
Notes:
O
O
I/O
I
I
I
I
I
I
External serial memory address write clock for voice extension.
External serial memory address read clock for voice extension.
External serial memory data in/out for voice extension.
Chip ground.
Chip ground for PWM or DAC playing output.
Chip ground. (W536090P/120P only)
Power source.
Power source for PWM or DAC playing output.
Power source. (W536090P/120P only)
(3). VDDA, VSSA for W536090P/120P only. To sure chip operation properly, please bond all VDD, VDDA, VDDP, VSS, VSSA
and VSSP pads, and connect VSS, VSSP form chip external PCB circuit.
(4). When working at NMOS open drain mode, external pull high voltage can't higher than VDD to avoid leakage current.
5. ELECTRICAL CHARACTERISTICS
5.1 Absolute Maximum Ratings
PARAMETER
Supply Voltage to Ground Potential
Applied Input/Output Voltage
Power Dissipation
RATING
-0.3 to +7.0
-0.3 to +7.0
120
UNIT
V
V
mW
Ambient Operating Temperature
0 to +70
°C
°C
Storage Temperature
-55 to +150
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Publication Release Date: May 21, 2003
- 7 -
Revision A4
W536030P/060P/090P/120P
5.2 DC Characteristics
(VDD−VSS = 3.0V, No load, FM = 4 MHz with Ring mode, Fs = 32.768 KHz, with Xtal mode, TA = 25° C unless otherwise
specified)
PARAMETER
Op. Voltage
SYM.
VDD
CONDITIONS
MIN
2.4
-
TYP
MAX UNIT
5.5
500
500
30
6
V
Op. Current
IOP1
Dual clock with crystal
Dual clock with Ring type
Sub-clock only
400
400
15
µA
(No Load, no Voice, no
Melody)
Hold Mode Current
Stop Mode Current
IOP2
IOP3
Sub-clock active only
4
µA
µA
1
CLK/ADDR Output High
Current
CLK/ADDR Output low
Current
IoH1
IoL1
Vout = 2.7V
Vout = 0.4V
-0.8
0.8
mA
mA
Input Low Voltage
Input High Voltage
VIL
VIH
-
-
VSS
0.7
-
-
0.3
1
VDD
VDD
Port RA, RB, RE, RF and RH
Output Low Voltage
Port RA, RB, RE, RF and RH
Output High Voltage
VABL
IOL = 2.0 mA
-
-
-
0.4
-
V
V
VABH IOH = -2.0 mA
2.4
Pull-up Resistor
RCD
RRES
ISPH
Port RC, RD, RG
-
200
50
300
100
-20
-70
-110
-135
20
400
200
KΩ
KΩ
mA
RES Pull-up Resistor
PWM1/2 Source Current (4)
(RLOAD = 8Ω between PWM1
And PWM2)
Volume Option = 00
Volume Option = 01
Volume Option = 10
Volume Option = 11
Volume Option = 00
Volume Option = 01
Volume Option = 10
Volume Option = 11
VDD = 3V, RL = 100ohm
PWM1/2 Sink Current (4)
(RLOAD = 8Ω between PWM1
And PWM2)
ISPL
IDAC
mA
mA
70
110
135
-5
DAC output Current
-4
-6
Notes:
(4). PWM current deviation will be ±20%.
- 8 -
W536030P/060P/090P/120P
5.3 AC Characteristics
(VDD−VSS = 3.0V, No load, FM = 4 MHz with Ring mode, Fs = 32.768 KHz, with Xtal mode, TA = 25° C unless otherwise
specified)
PARAMETER
SYM. CONDITIONS
MIN.
TYP.
MAX. UNIT
Crystal type and X32IN
Sub-clock Frequency
FSUB
and X32O with 17pF
external cap.
32768
Hz
Main-clock Frequency
FM
Ring type/Crystal type
400K
-
32768
-
4M
Hz
Hz
Chip Operation Frequency
FOSC
SCR0.0 = 1, FSYS = FSUB
SCR0.0 = 0; FSYS = FMAIN
400K
4M
Instruction Cycle Time
Reset Active Width
TCYC One machine cycle
TRAW FOSC = 32.768 KHz
-
4/FOSC
-
-
-
-
S
1
1
µS
µS
Hz
Interrupt Active Width
TIAW
FOSC = 32.768 KHz
RXIN = 680KΩ
RXIN = 330K Ω
RXIN = 200KΩ
RXIN = 130KΩ
RSUB = 680KΩ
-
Main clock Ring frequency FRXIN
1M
2M
3M
4M
32
Sub-Clock RC Oscillator
FRSUB
FSTOP
KHz
S
Sub-Clock Oscillation
0.8
1
RSUB = 680KΩ
Stable Time @ Cold Start
∆f
f(3V)− f(2.4V)
Frequency Deviation of
10
%
%
main-clock FRXIN ≤ 2 MHz
f(3V)
f
∆f
f(3V)− f(2.4V)
Frequency Deviation of
15
20
main-clock FRXIN = 3 MHz
f(3V)
f
∆f
f(3V)− f(2.4V)
Frequency Deviation of
%
MHz
%
main-clock FRXIN = 4 MHz
f(3V)
f
FROS
C
ROSC Frequency
3
ROSC = 680KΩ
∆f
f(3V)− f(2.4V)
Frequency Deviation of
FROSC = 3MHz
7.5
f(3V)
f
Notes:
(5). The deviation will be +20% while VDD drops from 5.5V to 2.4V based on same resistor
Publication Release Date: May 21, 2003
Revision A4
- 9 -
W536030P/060P/090P/120P
Iop Vs. Main clock RC mode
800
600
400
200
0
3V
Iop (uA)
4.5V
1
2
3
4
Freq (MhZ)
Oscillation Freq Vs. Sub-Clock
44
40
36
32
28
24
20
3V
4.5V
)
hZ
(K
b
u
Fs
560 620 680 750 820
1K
Rsub (Kohm)
- 10 -
W536030P/060P/090P/120P
Main Freq Vs. Rxin
6
5
4
3
2
1
0
2.4V
3v
4.5V
5.5V
Fmain
(MhZ)
130 150 160 200 330 680 2K 3K
RXIN (Kohm)
Voice Operating Freq. Vs. ROSC
4.5
4
3.5
3
3V
4.5V
Fr
eq
(M
h
Z)
2.5
2
470
560
680
910
ROSC (Kohm)
Publication Release Date: May 21, 2003
Revision A4
- 11 -
W536030P/060P/090P/120P
6. TYPICAL APPLICATION CIRCUITS
6.1 Sub Clock with RC Mode
VDDP
VDDP
(*1)
R5
SWITCH
C4
SPEAKER
Q1
8050
___
RES
VDDP
470
(*3)
VDDA
VDD
W536XXXP
R4
C1
Rosc
PWM1/DAC
C6
C2C3
R1
SPEAKER
Battery
XIN
(*2)
VDDP
R3
C5
PWM2
(*2)
ADDR
CLK
W55MXX
X32IN
DATA
R2
X32IO
(*4)
COMPONENT
C1
C2~C4
C5~C6
C7~C8
R1
680KΩ
R2
R3
R4
650KΩ/1MHz
100pF
350KΩ/2MHz
225KΩ/3MHz
160KΩ/4MHz
Value
4.7uF
0.1uF
-
680KΩ
100Ω
Notes:
1. Option R5 equals to 100Ω if high noise immunity is needed.
2. For DAC option application.
3. To ensure that three batteries function well in W536F20 demo board. C6 should stay close to pad PWM/PWM2 at its best.
Under the mask ROM version, C5 and C6 can be skipped.
4. Sure chip operation properly, please bond all VDDP, VDDA, VDD, VSSP, VSSA and VSS; and connect VSSP pad to VSS from external
PCB circuit. VDDA, VSSA are only for W536090P/120P.
- 12 -
W536030P/060P/090P/120P
6.2 Sub Clock with Xtal Mode
VDDP
R5
(*1)
VDDP
SWITCH
___
C4
RES
SPEAKER
Q1
8050
VDDP
VDDA
VDD
(*3)
470
W536XXXP
R4
C1
Rosc
C2
R1
C3
PWM1/DAC
Battery
XIN
SPEAKER
VDDP
(*2)
R3
C5
C6
PWM2
(*2)
ADDR
CLK
W55MXX
X32IN
X32IO
DATA
C7
32K
C8
(*4)
COMPONENT
C1
C2~C4
C5~C6
C7~C8
R1
R2
R3
R4
650KΩ/1MHz
350KΩ/2MHz
225KΩ/3MHz
160KΩ/4M/Hz
100pF
Value
4.7uF
0.1uF
15~30PF
680KΩ
-
100Ω
Notes:
1. Option R5 equals to 100Ω if high noise immunity is needed.
2. For DAC option application.
3. To ensure that three batteries function well in W536F20 demo board. C6 should stay close to pad PWM/PWM2 at its best.
Under the mask ROM version, C5 and C6 can be skipped.
4. Sure chip operation properly, please bond all VDDP, VDDA, VDD, VSSP, VSSA and VSS; and connect VSSP pad to VSS from external
PCB circuit. VDDA, VSSA are only for W536090P/120P.
Publication Release Date: May 21, 2003
- 13 -
Revision A4
W536030P/060P/090P/120P
7. REVISION HISTORY
VERSION
DATE
WRITER
DESCRIPTION
(10)W536060A to 12io only, and external speech
shared RD port except W536120X Part No
A1
April 19, 2000
Judy Kuo
A2
A3
Aug. 7, 2000
Jun. 1, 2001
Jimmy Chen
Jimmy Chen
• Speech Function Modify
• Speech Function Modify
• Modify some errors and add "Tri-state serial bus"
A4
May 21, 2003
Jimmy Chen
mask option and cascaded voice ROM function
Headquarters
Winbond Electronics Corporation America Winbond Electronics (Shanghai) Ltd.
27F, 2299 Yan An W. Rd. Shanghai,
200336 China
2727 North First Street, San Jose,
CA 95134, U.S.A.
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 1-408-9436666
TEL: 86-21-62365999
FAX: 86-21-62365998
TEL: 886-3-5770066
FAX: 1-408-5441798
FAX: 886-3-5665577
http://www.winbond.com.tw/
Taipei Office
Winbond Electronics Corporation Japan
7F Daini-ueno BLDG, 3-7-18
Shinyokohama Kohoku-ku,
Yokohama, 222-0033
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City,
No. 378 Kwun Tong Rd.,
Kowloon, Hong Kong
9F, No.480, Rueiguang Rd.,
Neihu District, Taipei, 114,
Taiwan, R.O.C.
TEL: 886-2-8177-7168
FAX: 886-2-8751-3579
TEL: 81-45-4781881
TEL: 852-27513100
FAX: 81-45-4781800
FAX: 852-27552064
Please note that all data and specifications are subject to change without notice.
All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
Information contained in this publication regarding device applications and the like is intended for suggestion
only and may be superseded updates. No representation or warranty is given and no liability is assumed by
Winbond Electronics Corp. with respect to the accuracy or use of such information, or infringement of patents
or other intellectual property.
- 14 -
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