W583L99_技术文档

W583LXX

TM

LOW VOLTAGE PowerSpeech

Table of Contents-

1.

2.

3.

4.

5.

GENERAL DESCRIPTION ......................................................................................................... 2

FEATURES................................................................................................................................. 2

BLOCK DIAGRAM ...................................................................................................................... 3

PIN DESCRIPTION..................................................................................................................... 4

FUNCTIONAL DESCRIPTION.................................................................................................... 6

5.1

5.2

5.3

5.4

Register Definition And Control....................................................................................... 6

Option Control Function................................................................................................... 9

Interrupt Vector Allocation ............................................................................................... 9

Instruction Set................................................................................................................ 10

6.

ELECTRICAL CHARACTERISTICS......................................................................................... 11

6.1

6.2

6.3

Absolute Maximum Ratings........................................................................................... 11

DC Characteristics......................................................................................................... 11

AC Characteristics......................................................................................................... 12

7.

8.

9.

TYPICAL APPLICATION CIRCUIT........................................................................................... 12

BONDING PAD DIAGRAM ....................................................................................................... 13

REVISION HISTORY................................................................................................................ 15

Publication Release Date: May 16, 2003

- 1 -

Revision A2

W583LXX

1. GENERAL DESCRIPTION

W583Lxxx family is a new PowerSpeech synthesizer series with 1.8V ~ 3.6V operation voltage

range. W583Lxxx provides IR function, CPU interface, PAD option for Ring or Crystal oscillator and

voice output in DAC current or PWM type.

According to different voice duration, there are 8 part numbers in W583Lxxx family, listed as below.

PART NO.

ROM size (K bits)

PART NO.

W583L10

384

W583L15

640

W583L20

768

W583L25

896

W583L30

1024

W583L40

1472

W583L50

1760

W583L60

2048

W583L80

3072

W583L99

3520

W583L02

4096

ROM size (K bits)

Note: W583L10 provides less I/O pins, and do not provide crystal oscillator.

2. FEATURES

• Programmable speech synthesizer

• 5bit MDPCM algorithm to generate high sound quality

• Operating voltage range: 1.8 – 3.6 Volts

• Direct drive speaker by PWM output or Built-in 8-bit D/A converter

• Supports CPU interface operation

• IR interface for command Transmission and Receiving

• Symbolic compiler supported

• Instruction cycle ≤ 400 µS typically

• Section control

− Variable frequency: 4.8/6/8/12 KHz

− LED: ON/OFF

• Eight general-purpose registers R0-R7

• Pad option for Ring or Crystal oscillator. (W583L10 only provides Ring oscillator)

• 8 trigger inputs - with separate control of falling/rising edge trigger. (4 triggers for W583L10)

• 8 STOP outputs (5 outputs for W583L10)

• Number of interrupt vector / label up to 2,048

- 2 -

W583LXX

3. BLOCK DIAGRAM

RESET

OSC/XIN

XOUT

TIMING

GENERATOR

ROM

SEL

TG1

:

TG3/IRIN

:

SPEECH

SYNTHESIZER

TG8

CONTROLLER

STPA/BUSY

STPB

LED2/STPC

:

VDD1

VSS1

D/A CONVERTER

PWM DRIVER

STPH

LED1

IROUTVDD VSS

TEST AUD/SPK+ SPK-

W583L15~L02

Publication Release Date: May 16, 2003

Revision A2

- 3 -

W583LXX

Block Diagram, continued

RESET

OSC

OSCO

TIMING

GENERATOR

ROM

TG1

TG2

TG3/IRIN

TG4

STPA/BUSY

STPB

SPEECH

SYNTHESIZER

CONTROLLER

LED2/STPC

D/A

VDD1

VSS1

STPD

STPE

CONVERTER

PWM DRIVER

LED1

IROUT VDD VSS

TEST AUD/SPK+ SPK-

W583L10

4. PIN DESCRIPTION

NAME

I/O

DESCRIPTION

VDD

TEST

-

I

Positive power supply

Test pin, internally pulled low

Reset all, functions as POR, internally pulled high

RESET

TG1

TG2

I

Direct trigger input 1, internally pulled high

Direct trigger input 2, internally pulled high

Direct trigger input 3 or IR input, internally pulled high. Once this pin is

pulled low, the oscillation circuit is active even the chip enters standby

mode.

TG3/IRIN

TG4

VSS

LED1

IROUT

STPA/BUSY

STPB

I

-

O

Direct trigger input 4, internally pulled high

Negative power supply

LED1 output

IR signal output pin, active low

Stop signal A or Busy signal

Stop signal B

- 4 -

W583LXX

NAME

LED2/STPC

STPD

STPE

AUD/SPK+

SPK-

I/O

O

-

DESCRIPTION

LED2 output or Stop signal C

Stop signal D

Stop signal E

Current type output or PWM output for speaker

PWM output

VSS1

Negative power supply

VDD1

-

Positive power supply

OSC/XIN

*XOUT

*SEL

I

Ring oscillator input or crystal input

Crystal input or oscillator clock output

Ring/Crystal oscillator select, internally pulled high. Floating for Ring and

grounded for crystal.

I/O

I

*TG5

*TG6

*TG7

*TG8

*STPF

*STPG

*STPH

I

Direct trigger input 5, internally pulled high

Direct trigger input 6, internally pulled high

Direct trigger input 7, internally pulled high

Direct trigger input 8, internally pulled high

Stop signal F

I

O

Stop signal G

Stop signal H

*: These pins no provided in W583L10

Pin Description only for W583L10

NAME

OSC

OSCO

I/O

I

O

DESCRIPTION

Ring oscillator input

Oscillator clock output

Publication Release Date: May 16, 2003

Revision A2

- 5 -

W583LXX

5. FUNCTIONAL DESCRIPTION

There are up to 8 trigger inputs and 8 STOP outputs in W583Lxx. The maximal number of software

key pad by scanning matrix is up to 8 × 9 = 72 keys. There are 8 general purpose registers, R0-R7.

R0-R7 can apply not only for "LD" and "JP" instructions but also for "MV" instruction. Only R0 can

apply for "INC" instruction.

W583Lxx provides IR interface to transmit and receive commands. For example, when X chip

executes the "TX R1" instruction, the Pulse Position Modulation waveform (with 38 KHz carrier)

outputs from IROUT pin to drive a photo diode. Y chips within a certain distance will receive the IR

signal through an IR receiver module to TG3/IRIN pin and execute a "JP" instruction to the interrupt

vector/label pointed by R1 of X chip.

There are two kinds of events that can cause the W583Lxx to enter the POI (Power On Initialization)

process: one is power on, and the other is direct trigger from RESET pin. The interrupt vector "32" is

allocated for this special event, and its priority is above all, i.e., no triggers can override the POI

process if they all happen simultaneously. So the user can write a program into this interrupt vector to

set the power on initial state. If the user does not wish to execute a program on power on, he should

write an "END" instruction in interrupt vector "32". During the POI process, triggers can then override it

successfully; if the EN0, EN1 and MODE0, MODE1 registers are set properly.

If more than two events happen simultaneously, the priority that is set by the internal H/W is: POI >

TG1F > TG1R > TG2F > TG2R > TG3F > TG3R > TG4F > TG4R > TG5F > TG5R > TG6F > TG6R >

TG7F > TG7R > TG8F > TG8R > "JP" instruction.

5.1 Register Definition And Control

The register file of the W583Lxx family is composed of 14 registers, including 8 general purpose

registers and 6 special purpose registers.

They are defined to facilitate the operations for various purposes. The default setting values of the

registers are given in the following table.

REGISTER

General Register

NAME

DEFAULT SETTING

00100000B

R0-R7

EN0, EN1

MODE0, MODE1

STOP

11111111B

Special Register

PAGE

00000000B

Note: EN1 register and bits 5-7 of STOP register are not provided in W583L10.

5.1.1 MODE0 Register

BIT

7

DESCRIPTION

LED mode

DEFINITION

1: Flash

0: DC

6

LED2/STPC

pin selection

1: LED2 output

0: STPC output

- 6 -

W583LXX

1. MODE0 Register, continued

BIT

5

DESCRIPTION

IR output source

DEFINITION

1: Hardware control IR output

0: STPC control IR output

1: Long

4

Debounce time

0: Short

3, 1, 0 Reserved

-

2

STPA/BUSY

pin selection

1: STPA output

0: BUSY output

MODE0.7 controls the output type of LED1 (and LED2) pin. MODE0.6 controls the configuration of

LED2/STPC pin. MODE0.5 controls the output source of IR. If hardware control IR output is selected,

IR output can have signal with carrier or without carrier which is selected by MODE1.0. MODE0.4

controls the trigger pin debounce time. MODE0.2 controls the behavior of the STPA/BUSY pin which

is usually used as Busy signal in CPU mode.

5.1.2 MODE1 Register

BIT

7, 6, 1

5

DESCRIPTION

Reserved

LED Flash type

DEFINITION

1: Alternate

0: Synchronous

1: YES

4

3

2

0

LED1 section

control

LED2 control

0: NO

1: SECTION control

0: STPC control

LED1 volume

control

IR output format

1: OFF

0: ON

1: IR output carrier with duty cycle 75%

0: IR output without carrier

MODE1.5 is for LED flash type control. MODE1.4 is for LED1 section control ON/OFF. MODE1.3 is for

LED2 Section/STPC control. MODE1.2 is for LED1 volume control. MODE1.0 is for IR output with or

without carrier and this bit is useful only MODE0.5 is "1". For STPC control IR output (MODE0.5 is 0),

the IR output always has 38 KHz carrier signal no matter what the setting of MODE1.0 is.

Publication Release Date: May 16, 2003

- 7 -

Revision A2

W583LXX

5.1.3 PAGE Register

BIT

7

6

5

4

3

2

1

0

PAGE

-

PG4

PG3

PG2

PG1

PG0

Bits 5-7 of PAGE register are reserved; bits 0-4 are used for page selection. The user must setup the

page mode configuration described in the Option Control Function section. Once the page mode is

decided, the working page is selected by the bits 0-4 of PAGE register. Hence, the user can execute

"LD PAGE, value" instruction to change the working page of the voice entry group. Not all of the bits

0-4 of PAGE register are used in different page mode; they are listed below.

PAGE MODE

1-page

PG4

PG3

PG2

PG1

PG0

×

√

×

√

×

√

×

√

×

√

8-page

16-page

32-page

Where "×" means don′t care and "√" means must be set properly.

5.1.4 EN0, EN1 Registers

BIT

EN0

EN1

7

6

5

4

3

2

1

0

TG4R

TG8R

TG3R

TG7R

TG2R

TG6R

TG1R

TG5R

TG4F

TG8F

TG3F

TG7F

TG2F

TG6F

TG1F

TG5F

A "1" means "enabled", while a "0" means "disabled" for that edge of the particular TG pin. For

example, the instruction "LD EN0, 0x0F" enables all the falling edge triggers of TG1-TG4, while

disabling all the rising edge triggers of TG1-TG4. The user can modify the EN0 and EN1 registers

during operation of the W583Lxx to achieve various kinds of trigger functions, like retriggerable or not,

one shot or level hold play mode, etc.

That is to say, users can change the contents of EN0, EN1 register during synthesis at will to

determine which trigger pin is to be enabled or disabled for its falling/rising edge.

EN1 register is provided only in W583L10.

5.1.5 STOP Register

BIT

7

6

5

4

3

2

1

0

STOP

STH

STG

STF

STE

STD

STC

STB

STA

The STOP register is used to control the status of the STPA-STPH pins. For example STB bit, the

corresponding bit 1 of the STOP register is used to drive the output buffer of STPB pin, an inverted

stage, to show its logic status. Notes that bits 5-7 of STOP register are reserved in W583L10.

5.1.6 R0-R7 Registers

These eight registers function as general purpose registers. They can be used to hold interrupt

vector/label. R0 is a special register which can be incremented by "INC" instruction.

- 8 -

W583LXX

5.2 Option Control Function

There are four types of option control in W583Lxx. They can be determined by a declaration in the

user′s program file, but cannot be controlled by register.

MASK OPTION

FUNCTION

DEFINITION

DECLARATION

DEFPAGE 1

256 interrupt vector/label for 1 page, 1 page in total (1-page mode)

256 interrupt vector/label for 1 page, 8 pages in total (8-page mode)

128 interrupt vector/label for 1 page, 16 pages in total (16-page mode)

64 interrupt vector/label for 1 page, 32 pages in total (32-page mode)

Normal mode operation

Page Mode

DEFPAGE 8

Configuration DEFPAGE 16

DEFPAGE 32

Operation

Mode

NORMAL

CPU

CPU mode operation

Oscillator

Frequency

Voice

OSC_3MHz

OSC_1.5MHz

VOUT_DAC

VOUT_PWM

3 MHz oscillator

1.5 MHz oscillator

DAC (AUD) output

Output Type

PWM output

"DEFPAGE" decides the page operation mode of W583Lxx. The default setting of the page mode is

1-page mode. The 8-page, 16-page or 32-page mode must be declared in order to reach the interrupt

vector/label from 256 to 2047 when the interrupt vector/label is beyond 0-255.

The W583Lxx can communicate with an external microprocessor through the simple serial CPU

interface. The CPU interface consists of the TG1, TG2, and STPA/BUSY pins. "NORMAL" and "CPU"

decide whether the operation mode of W583Lxx will be normal mode or CPU mode.

"OSC_3MHz" and "OSC_1.5MHz" select the frequency of the system clock. "VOUT_DAC" and

"VOUT_PWM" select the voice output type.

5.3 Interrupt Vector Allocation

The W583Lxx provides a total of 8 trigger inputs to communicate with the outside world. Each trigger

pin can invoke 2 dedicate interrupt vectors depending on TG pin status. The table below shows the

relationship between TG pin’s status and interrupt vectors.

Interrupt vectors, 8-15, are not allocated for TG pins in W583L10 because only TG1-TG4 pins are

provided in this chip.

INTERRUPT VECTOR

TRIGGER SOURCE

TG1F

INTERRUPT VECTOR

TRIGGER SOURCE

TG5F

0

1

2

3

8

9

10

11

TG2F

TG3F

TG4F

TG6F

TG7F

TG8F

Publication Release Date: May 16, 2003

Revision A2

- 9 -

W583LXX

Continued

INTERRUPT VECTOR

TRIGGER SOURCE

INTERRUPT VECTOR

TRIGGER SOURCE

4

5

6

7

32

TG1R

TG2R

TG3R

TG4R

POI

12

13

14

15

-

TG5R

TG6R

TG7R

TG8R

-

5.4 Instruction Set

There are two types of instruction in the W583Lxx, unconditional and conditional instructions. The first

type of instructions are executed immediately after they are issued. The second type of instructions

are executed only when the conditions specified in the instruction are satisfied. All the instructions are

listed in the following table.

The cycle time for each instruction is 2/Sampling Frequency(Fs). For Fs = 6.0 KHz, the cycle time is

333 µS.

UNCONDITIONAL

CONDITIONAL

JP

G

Rn

JP

G

Rn

@STS

LD

END

MV

INC

TX

EN0, value

EN1, value

MODEi, value

STOP, value

PAGE, value

Rn, value

LD

END

MV

INC

TX

EN0, value

EN1, value

MODEi, value

STOP, value

PAGE, value

Rn, value

*

Rn, Rm

Rn

Rn, Rm

Rn

Legend:

G: Interrupt vector/label

Rn: R0-R7

Rm: R0-R7

MODEi: MODE0, MODE1

value: 8-bit data

@STS can be the following: @LAST, @TGn_HIGH, @TGn_LOW, n = 1−8.

But n = 1−4 for W583L10.

*: These instructions are not provided in W583L10.

- 10 -

W583LXX

6. ELECTRICAL CHARACTERISTICS

6.1 Absolute Maximum Ratings

PARAMETER

Power Supply

Input Voltage

Storage Temp.

Operating Temp.

SYMBOL

VDD−VSS

VIN

TSTG

TOPR

CONDITIONS

RATED VALUE

UNIT

V

°C

-

-0.3 to +7.0

VSS -0.3 to VDD +0.3

-55 to +150

All Inputs

-

0 to +70

Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability

of the device.

6.2 DC Characteristics

(TA = 25° C, VSS = 0V, VDD = 4.5V unless otherwise specified.)

PARAMETER

Operating Voltage

Input Voltage

SYM.

VDD

VIL

CONDITIONS

MIN.

1.8

VSS -0.3

0.7 × VDD

TYP.

3

-

MAX.

3.6

0.3 × VDD

VDD

UNIT

V

VIH

-

VDD = 1.8V, All I/O pins

unconnected, No Playing

Standby Current

ISB1

1

µA

VDD = 3.6V, All I/O pins

ISB2

IOP1

1

µA

unconnected, No Playing

Operating Current

(Ring type)

VDD = 3V, No Load

500

Operating Current

(Crystal type)

Input Current of

TG1-TG8 pins

Input Current of

TEST pin

IOP3

600

µA

IIN1

IIN2

VDD = 3V, Vin = 0V

VDD = 3V, Vin = 3V

-8

µA

30

Input Current of

SEL, RESET

IIN3

VDD = 3V, Vin = 0V

-8

µA

SPK (D/A Full

IDAC

-3.0

-4.0

-5.0

mA

VDD = 3V, Rl = 100Ω

Scale)

Output Current of

STPA-STPH

Output Current of

SPK+, SPK-

IOL1

IOH1

IOL2

IOH2

VDD = 3V, Vout = 0.4V

VDD = 3V, Vout = 2.7V

VDD = 3V, Rl = 8Ω

0.8

-0.8

100

-100

mA

Publication Release Date: May 16, 2003

Revision A2

- 11 -

W583LXX

6.3 AC Characteristics

PARAMETER

Oscillation Frequency¹

SYM.

CONDITIONS

MIN. TYP. MAX.

UNIT

Fosc

2.7

1.3

3

3.3

1.7

MHz

Ring Oscillator, Rosc = 560 KΩ

Ring Oscillator, Rosc = 1.2 MΩ

1.5

Oscillation Frequency

Deviation by Voltage

Drop

F(3V)-F(2.4V)

F(3V)

∆Fosc

Fosc

7.5

%

Instruction Cycle Time

POI Delay Time

Long Debounce Time

Short Debounce Time²

Notes:

Tins

TPD

TDEBL

TDEBS

Fosc = 3 MHz, SR = 6 KHz

Fosc = 3 MHz

Fosc = 3 MHz, SR = 6 KHz

1/3

160

mS

µS

50

400

1. This parameter is different from that of W58300.

2. For ring oscillator only.

7. TYPICAL APPLICATION CIRCUIT

VCC

VDD

STPA/BUSY

VDD1

STPB

LED2/STPC

STPD

STPE

STPF

STPG

STPH

IROUT

TG1

W583LXX

TG2

VCC

TG3/IRIN

TG4

LED1

TG5

TG6

TG7

AUD/SPK+

SPK-

TG8

Rosc

VCC

OSC/XIN

XOUT

SEL

TEST

RESET

VSS1 VSS

- 12 -

W583LXX

8. BONDING PAD DIAGRAM

(For W583L10 only)

(0,0)

21

20

1

2

3

4

5

6

7

8

9 10 11 12 13 14 15 16 17 18 19

PAD NO.

PAD NAME

VDD

PAD NO.

PAD NAME

LED1

STPA/BUSY

STPB

LED2/STPC

STPD

1

2

3

4

5

12

13

14

15

16

OSC

OSCO

TEST

RESET

TG1

TG2

TG3/IRIN

TG4

6

7

8

9

10

11

17

18

19

20

21

-

STPE

VSS1

VDD1

SPK-

AUD/SPK+

-

VSS

IROUT

Publication Release Date: May 16, 2003

Revision A2

- 13 -

W583LXX

(For W583L15 to W583L02)

(0,0)

1

2

3

4

5

29

28

6

7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

27

PAD NO.

PAD NAME

VDD

OSC/XIN

XOUT

SEL

PAD NO.

PAD NAME

IROUT

LED1

STPA/BUSY

STPB

1

2

3

4

5

6

16

17

18

19

20

21

TEST

LED2/STPC

STPD

RESET

TG1

TG2

TG3/IRIN

TG4

7

8

9

10

11

12

13

14

15

22

23

24

25

26

27

28

29

-

STPE

STPF

STPG

STPH

VSS1

TG5

TG6

TG7

TG8

VDD1

SPK-

AUD/SPK+

-

VSS

- 14 -

W583LXX

9. REVISION HISTORY

VERSION

DATE

EDITOR

DESCRIPTION

A0

A1

A2

Aug. 30, 2002

Oct. 3, 2002

May 16, 2003

Steven Lin

Initial Issued

Modify Rosc value on page 11

Add W583L80~W583L02

Headquarters

Winbond Electronics Corporation America Winbond Electronics (Shanghai) Ltd.

27F, 2299 Yan An W. Rd. Shanghai,

200336 China

2727 North First Street, San Jose,

CA 95134, U.S.A.

No. 4, Creation Rd. III,

Science-Based Industrial Park,

Hsinchu, Taiwan

TEL: 1-408-9436666

TEL: 86-21-62365999

FAX: 86-21-62365998

TEL: 886-3-5770066

FAX: 1-408-5441798

FAX: 886-3-5665577

http://www.winbond.com.tw/

Taipei Office

Winbond Electronics Corporation Japan

7F Daini-ueno BLDG, 3-7-18

Shinyokohama Kohoku-ku,

Yokohama, 222-0033

Winbond Electronics (H.K.) Ltd.

Unit 9-15, 22F, Millennium City,

No. 378 Kwun Tong Rd.,

Kowloon, Hong Kong

9F, No.480, Rueiguang Rd.,

Neihu District, Taipei, 114,

Taiwan, R.O.C.

TEL: 886-2-8177-7168

FAX: 886-2-8751-3579

TEL: 81-45-4781881

TEL: 852-27513100

FAX: 81-45-4781800

FAX: 852-27552064

Please note that all data and specifications are subject to change without notice.

All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.

Publication Release Date: May 16, 2003

Revision A2

- 15 -


型号：	W583L99
厂家：	WINBOND
描述：	Speech Synthesizer, 99s, DIE-29
文件：	总15页 (文件大小：252K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

W583L99 [WINBOND]

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