W588A120 [WINBOND]

Microcontroller, 8-Bit, MROM, 8MHz, CMOS;
W588A120
型号: W588A120
厂家: WINBOND    WINBOND
描述:

Microcontroller, 8-Bit, MROM, 8MHz, CMOS

时钟 微控制器 外围集成电路
文件: 总8页 (文件大小:226K)
中文:  中文翻译
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W588AXXX Data Sheet  
8-BIT MCU WITH VOICE SYNTHESIZER  
(PowerSpeechTM Series)  
Table of Contents-  
1.  
2.  
3.  
4.  
5.  
GENERAL DESCRIPTION ......................................................................................................... 2  
FEATURES................................................................................................................................. 2  
PIN DESCRIPTION..................................................................................................................... 3  
BLOCK DIAGRAM ...................................................................................................................... 4  
ELECTRICAL CHARACTERISTICS........................................................................................... 4  
5.1  
5.2  
5.3  
Absolute Maximum Ratings .......................................................................................... 4  
D.C. Characteristics ...................................................................................................... 5  
A.C. Characteristics....................................................................................................... 6  
6.  
7.  
APPLICATION CIRCUITS .......................................................................................................... 7  
6.1  
6.2  
PWM Output.................................................................................................................. 7  
DAC Output................................................................................................................... 7  
REVISION HISTORY.................................................................................................................. 8  
Publication Release Date: June 29, 2004  
- 1 -  
Revision A5  
W588AXXX  
1. GENERAL DESCRIPTION  
The W588Axxx is a 8-bit microcontroller-based speech synthesizer with PWM mode output to drive  
speaker directly. It is suitable for multi-tasking toy application.  
The W588Axxx family contains several items with different playback duration as shown below:  
W588A003  
4 sec.  
W588A020  
25 sec.  
W588A060  
66 sec.  
W588A006  
7 sec.  
W588A025  
29 sec.  
W588A080  
100 sec.  
W588A009  
12 sec.  
W588S030  
32 sec.  
W588A100  
118 sec.  
W588A012  
16 sec.  
W588A040  
50 sec.  
W588A120  
133 sec.  
W588A015  
19 sec.  
W588A050  
58 sec.  
Item  
*Duration  
Item  
Duration  
Item  
Duration  
Note: *: The duration time is based on 5-bit MDPCM at 6KHz sampling rate. The firmware library and program code have been  
excluded from user’s ROM space for the duration estimation.  
2. FEATURES  
Wide Operating voltage: 2.4 ~ 5.5 volt  
System clock  
4 MHz at 2.4 ~ 5.5 volt  
8 MHz at 3.6 ~ 5.5 volt  
F/W speech synthesis  
5-bit MDPCM, 4-bit ADPCM, or 8-bit PCM algorithm can be used  
Programmable sample rate  
Provides DAC and/or PWM output to drive speaker (W588A003/006 only PWM)  
Built-in 1~2 timer (Timer0/1) for speech synthesis, tone melody and IR application  
Provide power management to save current consumption:  
4 ~ 8 MHz system clock, with Ring type oscillator  
Stop mode for stopping all IC operations  
Provides 4 I/O and 4 Out in W588A003~A006 and 8I/O in W588A009~A120  
Provides IR carrier generation  
Provides watch dog timer (WDT)  
Provides low-voltage-reset (LVR)  
Shared ROM for voice and program storage  
Support PowerScriptTM for developing codes in easy way  
Full-fledged development system  
Source-level ICE debugger (Assembly and PowerScriptTM format)  
Event synchronization mechanism  
Compatible with W566B/C, W567S, W588S system  
User-friendly GUI environment  
- 2 -  
 
W588AXXX  
3. PIN DESCRIPTION  
NAME  
I/O  
DESCRIPTION  
VSS,  
VSS1_SPK,  
VSS2_SPK  
-
Negative power supply for Up, peripherals and PWM.  
PWM+/DAC  
PWM-  
O
O
PWM driver positive output / DAC output.  
PWM driver negative output  
VDD,  
-
Positive power supply for uP and peripherals.  
VDD1_SPK  
/RESET  
TEST  
I
I
Active low reset pin, to reset whole device.  
Test pin, internally pulled low.  
*OP0[3:0]  
O
Output port. The pins of OP0 are Inverter-type output.  
I/O multiplexed port.  
As output port, the pins can be set as open–drain type or CMOS type.  
As input port, the pins can be set with pull-high resistor or not.  
Interrupt will be generated to release IC from STOP mode upon  
triggering.  
BP0[7:4]  
**BP0[0:3]  
I/O  
When BP0[7] is used as output pin, it can be the IR transmission  
carrier output for IR applications.  
OSC  
I
Connect ROSC to VSS to generate the master clock  
*: Only for W588A003~A006  
**: Only for W588A009~A120  
Publication Release Date: June 29, 2004  
Revision A5  
- 3 -  
 
W588AXXX  
4. BLOCK DIAGRAM  
ROM  
RAM  
Decoder  
OSC  
OSC  
Divider  
65C02  
Timer  
RESET  
Interrupt  
Logic  
Voice  
Channel  
SPK  
SPK  
BP04~0  
IO Port  
PWM  
OP00~0  
5. ELECTRICAL CHARACTERISTICS  
5.1 Absolute Maximum Ratings  
PARAMETER  
Power Supply  
Input Voltage  
Storage Temp.  
Operating Temp.  
SYMBOL  
VDD VSS  
VIN  
CONDITIONS  
RATED VALUE  
-0.3 to +7.0  
VSS -0.3 to VDD +0.3  
-55 to +150  
UNIT  
V
V
-
All Inputs  
TSTG  
-
-
°C  
°C  
TOPR  
0 to +70  
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability  
of the device.  
- 4 -  
 
W588AXXX  
5.2 D.C. Characteristics  
(VDD VSS = 4.5 V, Ta = 25° C, No Load unless otherwise specified)  
PARAMETER  
SYM.  
CONDITIONS  
FSYS = 4M Hz  
FSYS = 8M Hz  
No load, Fosc = 4 MHz  
No load  
All input pins  
MIN.  
2.4  
3.6  
-
-
VSS  
0.7VDD  
-15  
8
TYP. MAX.  
UNIT  
--  
--  
3
1
-
5.5  
5.5  
5
2
Operating Voltage  
VDD  
V
Operating Current  
Standby Current (STOP)  
Input Low Voltage  
Input High Voltage  
Input Current (BP0)  
IOP1  
IDD1  
VIL  
VIH  
IIN  
IOL  
IOH  
IOL  
mA  
µA  
V
0.3VDD  
All input pins  
VIN = 0V  
-
VDD  
V
-
-45  
µA  
mA  
mA  
mA  
mA  
VDD = 3V, VOUT = 0.4V  
VDD = 3V, VOUT = 2.6V  
VDD = 3V, VOUT = 0.4V  
VDD = 3V, VOUT = 2.6V  
RL = 8 Ohm,  
-
-
-
-
-
-
-
-
Output Current (BP0)  
Output Current (OP0)  
-4  
4
-4  
IOH  
IOL1  
+200  
-
-
mA  
Output Current  
SPK+ / SPK-  
Connection:  
[SPK+]----[RL]----[SPK-]  
IOH1  
-200  
-
-
mA  
DAC full scale current  
-2.4  
-4.0  
-3.0  
-5.0  
-3.6  
-6.0  
IDAC  
ILVR  
VDD=4.5V, RL = 100Ω  
mA  
uA  
Operation Current of Low  
Voltage Reset  
VDD = 4.5V  
60  
--  
All input pins except  
RESETB  
RESERB  
450  
100  
--  
--  
KΩ  
KΩ  
Pull-low Resistor  
RIN  
--  
Publication Release Date: June 29, 2004  
Revision A5  
- 5 -  
 
W588AXXX  
5.3 A.C. Characteristics  
(VDDVSS = 4.5 V, Ta= 25°C, No Load unless otherwise specified)  
PARAMETER  
SYM.  
CONDITIONS  
ROSC = 300 Kohm  
ROSC = 150 Kohm  
MIN. TYP. MAX.  
UNIT  
3.6  
7.2  
4
8
4.4  
8.8  
Main-clock Frequency  
FM  
MHz  
Ring type, CPU clock = 4  
MHz  
Main-clock Wake-up Delay WDm  
Frequency Deviation by  
-
3
5
mS  
F  
FMAX - FMIN  
Voltage Drop  
-
3
7.5  
%
F
FMIN  
Main Oscillator, Ring  
Cycle Time  
Tcyc  
TRST  
CPU clock = 4 MHz  
FM is enabled  
250  
4
-
-
DC  
-
nS  
Clocks  
of FM  
Reset Signal Width  
- 6 -  
 
W588AXXX  
6. APPLICATION CIRCUITS  
6.1 PWM Output  
W588A PWM Type  
10  
VDD  
BP04  
|
BP07  
4.7uF  
0.1uF  
VDD1_SPK  
OSC  
OP00  
|
OP03  
W588Axxx  
ROSC  
PWM+  
PWM-  
Speaker  
VSS/  
VSS1_SPK/  
VSS2_SPK  
/RESET  
Reset  
Switch  
0.1uF  
6.2 DAC Output  
W588A DAC Type  
10  
VCC  
VDD  
BP00  
|
BP07  
VDD1_SPK  
4.7uF  
0.1uF  
VCC  
OSC  
W588Axxx  
ROSC  
Speaker  
8050  
SPK+  
SPK-  
Rs  
VSS/  
VSS1_SPK/  
VSS2_SPK  
/RESET  
Reset  
0.1uF  
Switch  
Notes:  
1. The typical value of Rosc is 150 Kfor 8MHz and 300 Kfor 4MHz and should be connected to GND (VSS).  
2. Please refer to design guide to get typical Rosc value for each part number.  
3. In PCB layout, VSS1_SPK, VSS2_SPK should be connected to VSS; VDD1_SPK should be connected to VDD.  
4. The Rs value is suggested in 270~ 1Kto limit too large DAC output current flowing into transistor.  
5. The capacitor, 0.1uF, shunts between VDD and GND is necessary to filter power noise.  
6. The capacitor, 4.7uF, shunts between VDD and GND is optional as power stability.  
7. The 10that between VDD and GND is to limit huge current flow into chip as driving too heavy loading.  
8. The above application circuits are for reference only. No warranty for mass production.  
Publication Release Date: June 29, 2004  
- 7 -  
Revision A5  
 
W588AXXX  
7. REVISION HISTORY  
REVISION  
DATE  
MODIFICATIONS  
A1  
Oct. 23, 2002  
Preliminary release.  
Change the name Low-Voltage-Detect (LVD) to Low-Voltage-Reset  
(LVR).  
A2  
April 8, 2004  
Add Pull High Resistance as 450K ohm in D.C. Characteristics.  
Change the pin description name  
Change application circuit diagram  
A3  
May 11, 2004  
A4  
A5  
May 31, 2004  
June 29, 2004  
Add the operation current of Low-Voltage-Reset  
Modify provides 4 I/O and 4 Out in W588A003~A006 and 8I/O in  
W588A009~A120  
Headquarters  
Winbond Electronics Corporation America Winbond Electronics (Shanghai) Ltd.  
27F, 2299 Yan An W. Rd. Shanghai,  
200336 China  
2727 North First Street, San Jose,  
CA 95134, U.S.A.  
No. 4, Creation Rd. III,  
Science-Based Industrial Park,  
Hsinchu, Taiwan  
TEL: 1-408-9436666  
TEL: 86-21-62365999  
FAX: 86-21-62365998  
TEL: 886-3-5770066  
FAX: 1-408-5441798  
FAX: 886-3-5665577  
http://www.winbond.com.tw/  
Taipei Office  
Winbond Electronics Corporation Japan  
7F Daini-ueno BLDG, 3-7-18  
Shinyokohama Kohoku-ku,  
Yokohama, 222-0033  
Winbond Electronics (H.K.) Ltd.  
Unit 9-15, 22F, Millennium City,  
No. 378 Kwun Tong Rd.,  
Kowloon, Hong Kong  
9F, No.480, Rueiguang Rd.,  
Neihu District, Taipei, 114,  
Taiwan, R.O.C.  
TEL: 886-2-8177-7168  
FAX: 886-2-8751-3579  
TEL: 81-45-4781881  
TEL: 852-27513100  
FAX: 81-45-4781800  
FAX: 852-27552064  
Please note that all data and specifications are subject to change without notice.  
All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.  
- 8 -  
 

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