5962-8751419YC [XICOR]

8K X 8 EEPROM 5V, 300 ns, CQCC32, CERAMIC, LCC-32;
5962-8751419YC
型号: 5962-8751419YC
厂家: XICOR INC.    XICOR INC.
描述:

8K X 8 EEPROM 5V, 300 ns, CQCC32, CERAMIC, LCC-32

可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 内存集成电路
文件: 总26页 (文件大小:194K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
REVISIONS  
LTR  
A
DESCRIPTION  
DATE (YR-MO-DA)  
89-08-07  
APPROVED  
M. A. Frye  
Add case outline letter U. Add vendor CAGE number 60395 to  
drawing. Editorial changes throughout.  
B
C
D
E
Add device type 28 to drawing. Editorial changes throughout.  
Add software data protect to drawing. Updated boilerplate.  
Changes in accordance with NOR 5962-R409-97  
93-01-05  
97-04-06  
97-08-12  
04-06-04  
M. A. Frye  
Raymond Monnin  
Raymond Monnin  
Raymond Monnin  
Editorial correction to page 1, correction of number of pages. Figure  
1 redrawn with 32 leads vs 44 leads and dimension table corrected.  
ksr  
THE ORIGINAL FIRST PAGE OF THE DRAWING HAS BEEN REPLACED.  
REV  
SHEET  
REV  
E
E
E
E
E
E
E
21  
E
E
22  
E
E
23  
E
SHEET  
15  
16  
17  
18  
19  
20  
REV STATUS  
OF SHEETS  
PMIC N/A  
REV  
E
4
E
5
E
6
E
7
E
8
E
9
E
E
E
E
E
SHEET  
1
2
3
10  
11  
12  
13  
14  
PREPARED BY  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
http://www.dscc.dla.mil  
Kenneth Rice  
CHECKED BY  
STANDARD  
Charles Reusing  
APPROVED BY  
MICROCIRCUIT  
DRAWING  
Michael A. Frye  
MICROCIRCUIT, MEMORY,  
DIGITAL, CMOS 8K X 8-BIT  
EEPROM, MONOLITHIC SILICON  
THIS DRAWING IS AVAILABLE  
FOR USE BY ALL  
DEPARTMENTS  
AND AGENCIES OF THE  
DEPARTMENT OF DEFENSE  
DRAWING APPROVAL DATE  
88-07-01  
REVISION LEVEL  
E
AMSC N/A  
SIZE  
A
CAGE CODE  
5962-87514  
67268  
SHEET  
1 OF 23  
DSCC FORM 2233  
APR 97  
5962-E141-04  
1. SCOPE  
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in  
accordance with MIL-PRF-38535, appendix A.  
1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example:  
5962-87514  
01  
X
X
Drawing number  
Device type  
(see 1.2.1)  
Case outline  
(see 1.2.2)  
Lead finish per  
MIL-PRF-38535  
appendix A  
1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows:  
Generic  
number  
Access  
time  
Write  
speed  
Write  
mode  
End of write  
indicator  
Device type  
Circuit function  
Endurance  
01  
02  
03  
04  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
(see 6.4) (8K X 8 EEPROM)  
350 ns  
300 ns  
250 ns  
200 ns  
250 ns  
350 ns  
300 ns  
250 ns  
200 ns  
120 ns  
90 ns  
10 ms byte/page  
10 ms byte/page  
10 ms byte/page  
10 ms byte/page  
10 ms byte/page  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 100,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
2 ms  
2 ms  
2 ms  
2 ms  
2 ms  
2 ms  
2 ms  
1 ms  
1 ms  
1 ms  
1 ms  
1 ms  
1 ms  
1 ms  
1 ms  
1 ms  
1 ms  
byte/page  
byte/page  
byte/page  
byte/page  
byte/page  
byte/page  
byte/page  
byte  
byte  
byte  
byte  
byte  
70 ns  
350 ns  
300 ns  
250 ns  
200 ns  
150 ns  
350 ns  
300 ns  
250 ns  
200 ns  
150 ns  
350 ns  
300 ns  
250 ns  
200 ns  
250 ns  
200 ns  
RDY/BUSY  
RDY/BUSY  
RDY/BUSY  
RDY/BUSY  
RDY/BUSY  
10,000 cycles  
10,000 cycles  
10,000 cycles  
10,000 cycles  
10,000 cycles  
byte  
byte  
byte  
byte  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
DATA polling 10,000 cycles  
byte  
10 ms byte/page  
10 ms byte/page  
10 ms byte/page  
10 ms byte/page  
10 ms byte/page  
200 µs byte  
RDY/BUSY  
RDY/BUSY  
RDY/BUSY  
RDY/BUSY  
RDY/BUSY  
RDY/BUSY  
10,000 cycles  
10,000 cycles  
10,000 cycles  
10,000 cycles  
100,000 cycles  
10,000 cycles  
1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:  
Outline letter  
Descriptive designator  
Terminals  
Package style  
U
X
Y
Z
See figure 1  
GDIP1-T28 or CDIP2-T28  
CQCC1-N32  
32  
28  
32  
28  
"J" leaded cerquad package  
Dual-in-line  
Rectangular leadless chip carrier  
Flat pack  
CDFP4-F28  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
SHEET  
E
2
DSCC FORM 2234  
APR 97  
1.3 Absolute maximum ratings. 1/  
Supply voltage range (VCC) ...................................................................... -0.3 V dc to +6.25 V dc  
Storage temperature range...................................................................... -65°C to +150°C  
Maximum power dissipation (PD).............................................................. 1.0 W  
Lead temperature (soldering, 10 seconds) .............................................. +300°C  
Junction temperature (TJ) 2/.................................................................... +175°C  
Thermal resistance, junction-to-case (ΘJC) .............................................. See MIL-STD-1835  
Input voltage range (VIL, VIH).................................................................... -0.3 V dc to +6.25 V dc  
Data retention........................................................................................... 10 years (minimum)  
Endurance:  
Device types 01 through 04, 06 through 26, and 28 ............................. 10,000 cycles/byte (minimum)  
Device types 05 and 27.......................................................................... 100,000 cycles/byte (minimum)  
Chip clear voltage (VH)............................................................................. 13.0 V dc  
1.4 Recommended operating conditions. 1/  
Supply voltage range (VCC) ...................................................................... +4.5 V dc to +5.5 V dc  
Case operating temperature range (TC)................................................... -55°C to +125°C  
Input voltage, low range (VIL) ................................................................... -0.1 V dc to +0.8 V dc  
Input voltage, high range (VIH) ................................................................. +2.0 V dc to VCC +0.3 V dc  
Chip clear voltage range (VH)................................................................... 12 V dc to 13 V dc  
2. APPLICABLE DOCUMENTS  
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a  
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in  
the solicitation or contract.  
DEPARTMENT OF DEFENSE SPECIFICATION  
MIL-PRF-38535 -- Integrated Circuits, Manufacturing, General Specification for.  
DEPARTMENT OF DEFENSE STANDARDS  
MIL-STD-883  
-
Test Method Standard Microcircuits.  
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.  
DEPARTMENT OF DEFENSE HANDBOOKS  
MIL-HDBK-103 -- List of Standard Microcircuit Drawings.  
MIL-HDBK-780 - Standard Microcircuit Drawings.  
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from  
the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.)  
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text  
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a  
specific exemption has been obtained.  
1/ All voltages are referenced to VSS (ground).  
2/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in  
accordance with method 5004 of MIL-STD-883.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
3
DSCC FORM 2234  
APR 97  
3. REQUIREMENTS  
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-  
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer  
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-  
PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying  
activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan  
may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.  
These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-  
PRF-38535 is required to identify when the QML flow option is used.  
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as  
specified in MIL-PRF-38535, appendix A and herein.  
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein and figure 1.  
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.  
3.2.3 Truth table for unprogrammed devices. The truth table for unprogrammed devices shall be as specified on figure 3.  
3.2.3.1 Programmed devices. The truth table for programmed devices shall be as specified by an attached altered item  
drawing.  
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics  
are as specified in table I and shall apply over the full (case or ambient) operating temperature range.  
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical  
tests for each subgroup are described in table I.  
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be  
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the  
manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator  
shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device  
class M shall be in accordance with MIL-PRF-38535, appendix A.  
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in  
compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification  
mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used.  
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an  
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to  
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-  
38535, appendix A and the requirements herein.  
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided  
with each lot of microcircuits delivered to this drawing.  
3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.  
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's  
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the  
reviewer.  
3.10 Processing EEPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the  
manufacturer prior to delivery.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
4
DSCC FORM 2234  
APR 97  
3.10.1 Erasure of EEPROMS. When specified, devices shall be erased in accordance with the procedures and  
characteristics specified in 4.4.1. Devices shall be shipped in the erased (logic "1's) and verified state unless otherwise  
specified.  
3.10.2 Programmability of EEPROMS. When specified, devices shall be programmed to the specified pattern using the  
procedures and characteristics specified in 4.4.  
3.10.3 Verification of erasure or programmability of EEPROMS. When specified, devices shall be verified as either  
programmed to the specified pattern or erased. As a minimum, verification shall consist of reading the device in accordance  
with the procedures and characteristics specified in 4.4.2. Any bit that does not verify to be in the proper state shall constitute  
a device failure, and shall be removed from the lot.  
3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This  
reprogrammability test shall be done for initial characterization and after any design or process changes which may affect the  
reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of  
program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendor's procedure  
shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along  
with test data.  
3.13 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test  
shall be done for initial characterization and after any design or process change, which may affect data retention. The  
methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the  
full military temperature range. The vendor's procedure shall be kept under document control and shall be made available  
upon request of the acquiring or preparing activity, along with test data.  
4. VERIFICATION  
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix  
A.  
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices  
prior to quality conformance inspection. The following additional criteria shall apply:  
a. Burn-in test, method 1015 of MIL-STD-883.  
(1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control  
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the  
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method  
1015 of MIL-STD-883.  
(2) TA = +125°C, minimum.  
(3) Devices shall be burned-in containing a checkerboard pattern or equivalent.  
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter  
tests prior to burn-in are optional at the discretion of the manufacturer.  
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of  
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.  
4.3.1 Group A inspection.  
a. Tests shall be as specified in table II herein.  
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.  
c. Subgroup 4 (CI and CO measurements) shall be measured only for the initial test and after process or design changes  
which may affect capacitance. Sample size is 15 devices with no failures, and all input and output terminals tested.  
d. Subgroups 7 and 8 shall include verification of the truth table.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
5
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
Test  
Symbol │  
Conditions 1/ 2/  
Group A Device  
subgroupstype  
Limits  
Unit  
-55°C < TC <+125°C  
VSS = 0 V 4.5 V < VCC < 5.5 V  
unless otherwise specified  
Min  
Max  
ICC  
60  
80  
Supply current  
(active)  
CE = OE = VIL, WE = VIH  
All I/O's = open  
Inputs = VCC = 5.5 V  
1,2,3  
01-05,  
23-27  
06-12  
mA  
13-22,28 │  
45  
ICC1  
3  
Supply current  
(TTL standby)  
CE = VIH, OE = VIL  
All I/O's = open  
1,2,3  
All  
mA  
Inputs = X  
Supply current  
(CMOS standby)  
ICC2  
CE = VCC -0.3 V  
All I/O's = open  
Inputs = VIL to VCC -0.3 V  
1,2,3  
01-12,  
23-27  
250  
µA  
13-22,28 │  
150  
Input leakage  
(high)  
IIH  
VIN = 5.5 V  
1,2,3  
All  
-10  
10  
µA  
Input leakage  
(low)  
IIL  
VIN = 0.1 V  
1,2,3  
All  
-10  
10  
µA  
Output leakage 3/  
(high)  
IOHZ  
VOUT = 5.5 V, CE = VIH  
1,2,3  
All  
-10  
10  
µA  
Output leakage 3/  
(low)  
IOLZ  
VOUT = 0.1 V, CE = VIH  
1,2,3  
All  
-10  
10  
µA  
Input voltage  
low  
VIL  
1,2,3  
All  
-0.1  
0.8  
V  
Input voltage  
high  
VIH  
1,2,3  
All  
2.0  
VCC+0.3 V  
Output voltage  
low  
VOL  
IOL = 2.1 mA, VIH = 2.0 V  
VCC = 4.5 V, VIL = 0.8 V  
IOH = -400 µA, VIH = 2.0 V  
VCC = 4.5 V, VIL = 0.8 V  
1,2,3  
All  
0.45  
V  
Output voltage  
high  
VOH  
1,2,3  
All  
2.4  
V  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
6
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol │  
CI  
Conditions 1/ 2/  
Group A Device  
subgroupstype  
Limits  
Unit  
pF  
-55°C < TC <+125°C  
VSS = 0 V 4.5 V < VCC < 5.5 V  
unless otherwise specified  
VI = 0 V, VCC = 5.0 V  
TA = +25ºC, f = 1 MHz  
See 4.3.1c  
VO = 0 V, VCC = 5.0 V  
TA = +25ºC, f = 1 MHz  
See 4.3.1c  
All  
All  
Min  
Max  
10  
10  
Input  
capacitance 4/ 5/  
4
4
Output  
capacitance 4/ 5/  
CO  
pF  
Functional tests  
See 4.3.1d  
7,8A,8B All  
Read cycle time 6/  
tAVAV See figure 4  
9,10,11 01,06,13, 350  
350  
300  
250  
200  
150  
120  
90  
70  
ns  
ns  
tAVQV  
18,23  
02,07,14, 300  
19,24  
03,05,08, 250  
15,20,25, │  
27  
04,09,16, 200  
21,26,28 │  
17,22,  
10  
11  
12  
150  
120  
90  
70  
Address access  
time  
9,10,11 01,06,13, │  
18,23  
02,07,14, │  
19,24  
03,05,08, │  
15,20,25, │  
27  
04,09,16, │  
21,26,28 │  
17,22  
10  
11  
12  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
7
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol │  
Conditions 1/ 2/  
Group A Device  
subgroupstype  
Limits  
Unit  
-55°C < TC <+125°C  
VSS = 0 V 4.5 V < VCC < 5.5 V  
unless otherwise specified  
Min  
Max  
Chip enable  
access time  
tELQV See figure 4  
9,10,11 01,06,13, │  
350  
300  
250  
200  
150  
120  
90  
70  
100  
50  
80  
55  
ns  
18,23  
02,07,14, │  
19,24  
03,05,08, │  
15,20,25, │  
27  
04,09,16, │  
21,26,28 │  
17,22  
10  
11  
12  
ns  
ns  
ns  
10  
Output enable  
access time  
tOLQV  
9,10,11 01-05,  
13-22,  
23-28  
06-12,  
Chip enable to 5/  
output in  
low Z  
tELQX  
9,10,11 All  
Chip disable to 5/  
output in  
high Z  
tEHQZ  
9,10,11 01-08,  
13-15,  
18-20,  
23-27  
09-12,16, │  
17,21,22, │  
ns  
28  
Output enable to 5/  
output in low Z  
tOLQX  
9,10,11 All  
10  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
8
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol  
Conditions 1/ 2/  
-55°C < TC <+125°C  
Group A Device  
subgroupstype  
Limits  
Unit  
VSS = 0 V 4.5 V < VCC < 5.5 V │  
unless otherwise specified  
Min  
Max  
80  
55  
Output disable  
to output in  
high Z  
tOHQZ  
See figure 4  
9,10,11 01-08,  
ns  
13-15,  
18-20,  
23-27  
09-12,16, │  
17,21,22, │  
5/  
28  
Output hold from 6/  
address change  
tAVQX  
9,10,11 All  
0  
ns  
CE to power up 5/  
tpu  
9,10,11 All  
250  
ns  
CE to power down 5/ tpd  
9,10,11 All  
50  
ns  
Write cycle time  
tWHWL1  
9,10,11 01-05,  
10  
ms  
tEHEL1  
See figures 5 and 6  
23-27  
06-12  
13-22  
28  
2.0  
1.0  
0.2  
Address setup 6/  
time  
tAVEL  
See figures 5, 6, and 7  
9,10,11 All  
20  
ns  
tAVWL  
Address hold 6/  
time  
tELAX  
9,10,11 All  
150  
ns  
tWLAX  
Write setup time 6/  
Write hold time 6/  
tWLEL  
9,10,11 All  
0  
ns  
tELWL  
tWHEH  
9,10,11 All  
0  
ns  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
9
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol  
Conditions 1/ 2/  
Group A Device  
subgroupstype  
Limits  
Unit  
-55°C < TC <+125°C  
VSS = 0 V 4.5 V < VCC < 5.5 V  
unless otherwise specified  
Min  
Max  
OE setup time 6/  
tOHEL  
See figures 5, 6, or 7  
9,10,11 All  
20  
ns  
tOHWL  
as applicable  
OE hold time  
tWHOL  
9,10,11 All  
20  
ns  
WE pulse width 6/  
tELEH  
9,10,11 All  
150  
ns  
tWLWH  
Data setup time 6/  
tDVEH  
9,10,11 All  
50  
ns  
tDVWH  
Data hold time 6/  
Byte load cycle  
tEHDX  
tWHDX  
tEHEL2  
tWHWL2  
9,10,11 All  
10  
ns  
See figures 5 or 6  
9,10,11 All  
0.2  
2  
µs  
Last byte loaded 6/  
to data polling  
tWHEL  
See figure 5  
9,10,11 06-12,  
200  
ns  
18-22  
CE setup time 6/  
tELWL  
See figure 5  
9,10,11 All  
1  
µs  
Output setup 6/  
time  
tOVHWL  
See figure 8  
9,10,11 All  
1  
µs  
CE hold time 6/  
OE hold time 6/  
Erase time 6/  
tEHWH  
See figure 6  
9,10,11 All  
1  
µs  
µs  
1  
200  
tWHOH  
See figure 8, configuration  
A or B  
9,10,11 All  
tOHAV  
9,10,11 01-05,  
ms  
23-27  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
10  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol  
Conditions 1/ 2/  
Group A Device  
subgroupstype  
Limits  
Unit  
-55°C < TC <+125°C  
VSS = 0 V 4.5 V < VCC < 5.5 V  
unless otherwise specified  
Min  
Max  
Chip erase time 6/  
High voltage 6/  
tWLWH2  
See figure 8, configuration  
A or B  
9,10,11 01-05,  
150  
13  
ns  
ms  
V  
23-27  
06-22,28 10  
6/  
VH  
9,10,11 All  
12  
Time to device  
busy  
tEHRL  
tWHRL  
See figures 6 and 7  
9,10,11 13-17,28 │  
50  
100  
ns  
23-27  
Write cycle time  
RDY/BUSY  
tELRH  
tWLRH  
9,10,11 13-17,28 │  
1  
10  
1  
ms  
23-27  
Maximum time to 6/  
valid data after  
WE/CE low  
tWLDV  
tELDV  
9,10,11 13-22,28 │  
µs  
1/ DC and read mode.  
2/ Equivalent ac test conditions:  
Device types: 01 through 09 and 13 through 28.  
Output load: 1 TTL gate and C1 = 100 pF,  
Input rise and fall times < 10 ns.  
Input pulse levels: 0.4 V and 2.4 V.  
Timing measurements reference levels:  
Inputs 1 V and 2 V.  
Device types: 10 through 12.  
Output load: 1 TTL gate and C1 = 30 pF.  
Input rise and fall times < 5 ns.  
Input pulse levels: 0.4 V and 2.4 V.  
Inputs 1 V and 2 V.  
Outputs 0.8 V and 2 V.  
Outputs 0.8 V and 2 V.  
3/ Connect all address inputs and OE to VIH and measure IOLZ and IOHZ with the output under test connected to VOUT  
4/ All pins not being tested are to be open.  
.
5/ Tested initially and after any design or process changes that affect that parameter, and therefore guaranteed to the limits  
specified in table I.  
6/ Tested by application of specified timing signals and conditions, see footnote 2/.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
11  
DSCC FORM 2234  
APR 97  
Case U  
FIGURE 1. Case outline.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-87514  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
12  
DSCC FORM 2234  
APR 97  
Case U  
Dimensions  
Ltr  
Inches  
Millimeters  
Min Max  
Min  
Max  
.167  
.140  
3.56  
4.24  
A
.073  
.027  
.006  
.485  
.445  
.390  
.585  
.545  
.490  
.103  
.045  
.010  
.495  
.465  
.430  
.595  
.565  
.530  
1.85  
2.62  
A1  
A2  
c
0.69  
1.14  
0.15  
0.25  
12.32  
11.30  
9.91  
12.57  
11.81  
10.92  
15.11  
14.35  
13.46  
D
D1  
D2  
E
14.86  
13.84  
12.45  
1.27 TYP  
0.43  
E1  
E2  
e
.050 TYP  
.017  
.026  
.021  
.032  
0.53  
0.81  
b
0.66  
b1  
N
32  
NOTES:  
1. Controlling dimensions are inches, metric provided for convenience.  
2. Dimensions D1 and E1 do not include glass protrusion. Glass protrusion to be .010 inch (0.25 mm) maximum.  
3. All dimensions and tolerances include lead trim offset and lead finish.  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
13  
DSCC FORM 2234  
APR 97  
Device types  
Case outlines  
01 through 28  
X and Z U and Y  
Terminal symbol  
Terminal  
number  
1
2
NC (See note)  
NC  
A12  
A7  
NC (See note)  
3
A12  
A7  
4
A6  
5
A5  
A6  
6
A4  
A5  
7
A3  
A4  
8
A2  
A3  
9
A1  
A2  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
A0  
A1  
I/O0  
I/O1  
I/O2  
GND  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
A0  
NC  
I/O0  
I/O1  
I/O2  
GND  
NC  
I/O3  
I/O4  
I/O5  
CE  
A10  
21  
22  
I/O6  
I/O7  
OE  
A11  
23  
CE  
A10  
24  
25  
A9  
A8  
OE  
NC  
A11  
26  
27  
NC  
WE  
VCC  
---  
28  
29  
30  
31  
A9  
A8  
---  
NC  
---  
WE  
VCC  
32  
---  
FIGURE 2. Terminal connections.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
14  
DSCC FORM 2234  
APR 97  
Mode  
I/O  
Device types  
CE  
OE  
WE  
Read  
VIL  
VIL  
VIL  
X
VIL  
VH  
VIH  
VIL  
X
VIH  
VIL  
VIL  
X
DOUT  
X
All  
All  
All  
All  
All  
All  
Chip clear  
Byte write  
Write inhibit  
Write inhibit  
Standby  
Data in  
High Z/DOUT  
High Z/DOUT  
High Z  
X
VIH  
X
VIH  
X
FIGURE 3. Truth table.  
NOTES:  
1. VCC shall be applied simultaneously or after WE and removed simultaneously or before WE .  
2. See footnote 2 of table I.  
FIGURE 4. Read cycle timing.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-87514  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
15  
DSCC FORM 2234  
APR 97  
NOTES:  
1. See footnote 2 of table I.  
2. Program verify equivalent to the read mode.  
3. Page load is 1 to 64 bytes of data for device types 01 through 12, and 23 through 27.  
4. WE is noise protected. Less than 20 ns write pulse will not activate a write cycle.  
5. WE and CE both must be active to initiate a write cycle; therefore, the sequence of  
WE or CE (e.g., for WE or CE controlled write) is verified interchangeable without  
duplicate testing.  
FIGURE 5. Page write programming waveforms.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-87514  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
16  
DSCC FORM 2234  
APR 97  
NOTES:  
1. See footnote 2 of table I.  
2. Program verify equivalent to the read mode.  
3. WE and CE both must be active to initiate a write cycle; therefore, the sequence of  
WE and CE (e.g., for WE or CE controlled write) is verified interchangeable without  
duplicate testing.  
FIGURE 6. CE _controlled byte write programming waveforms.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-87514  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
17  
DSCC FORM 2234  
APR 97  
NOTES:  
1. See footnote 2 of table I.  
2. Program verify equivalent to the read mode.  
3. WE and CE both must be active to initiate a write cycle; therefore, the sequence of  
WE and CE (e.g., for WE or CE controlled write) is verified interchangeable without  
duplicate testing.  
FIGURE 7. WE controlled byte write programming waveforms.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-87514  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
18  
DSCC FORM 2234  
APR 97  
FIGURE 8. Chip clear waveforms.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-87514  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
19  
DSCC FORM 2234  
APR 97  
NOTES:  
1. Set software data protection timings are referenced to WE or CE inputs, whichever is last to go low, and the  
WE or CE inputs, whichever is first to go high.  
2. The command sequence must conform to the page write timing.  
3. The command sequence and subsequent data must conform to the page write timing.  
FIGURE 9. Set software data protect and software protected write algorithm (device types 01- 05 and 08 - 12).  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
20  
DSCC FORM 2234  
APR 97  
NOTES:  
1. Reset software data protection timings are referenced to WE or CE inputs, whichever is last to go low,  
and the WE or CE inputs, whichever is first to go high.  
2. The command sequence must conform to the page write timing.  
FIGURE 10. Reset software data protect algorithm (device types 01- 05 and 08 - 12).  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-87514  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
21  
DSCC FORM 2234  
APR 97  
TABLE II. Electrical test requirements.  
Subgroups 1/ 2/  
MIL-STD-883 test requirements  
(in accordance with  
MIL-STD-883, method  
5005, table I)  
Interim electrical parameters  
(method 5004)  
1, 7, 9,  
or  
2, 8A, 10  
Final electrical test parameters  
(method 5004)  
1*, 2, 3, 7*, 8,  
9, 10, 11 3/  
1, 2, 3, 4**, 7,  
8, 9, 10, 11 4/ 5/  
1, 2, 3, 7,  
Group A test requirements  
(method 5005)  
Groups C and D end-point electrical  
parameters (method 5005)  
8, 9, 10, 11  
1/ Any or all subgroups may be combined when using multifunction testers.  
2/ For all electrical tests, the device shall be programmed to the data pattern specified.  
3/ (*) Indicates PDA applies to subgroups 1 and 7.  
4/ Subgroups 7 and 8 shall consist of writing and reading the data pattern specified  
in accordance with the limits of table I subgroups 9, 10, and 11.  
5/ (**) Indicates that subgroup 4 will only be performed during initial qualification and after design  
or process changes (see 4.3.1c).  
4.3.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.  
The following additional criteria shall apply.  
a. End-point electrical parameters shall be as specified in table II herein.  
b. Steady-state life test conditions, method 1005 of MIL-STD-883.  
(1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control  
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the  
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method  
1005 of MIL-STD-883.  
(2) TA = +125°C, minimum.  
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.  
4.3.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.  
4.4 Programming procedure. The following procedure shall be followed when programming (Write) is performed. The  
waveforms and timing relationships shown on figure 5 (per appropriate device type) and the conditions specified in table I shall  
be adhered to. Information is introduced by selectively programming a TTL low or TTL high on each I/O of the address desired.  
Functionality shall be verified at all temperatures (group A, subgroups 7 and 8) by programming all bytes of each device and  
verifying the pattern used.  
4.4.1 Erasing procedure. There are two forms of erasure, chip and byte, whereby all bits or the address selected will be  
erased to a TTL high.  
a. Chip erase is performed in accordance with the waveforms and timing relationships shown on figure 8 (in accordance  
with appropriate device type) and the conditions specified in table I.  
b. Byte erase is performed in accordance with the waveforms and timing relationships shown on figure 5 (in accordance  
with appropriate device type) and the conditions specified in table I.  
4.4.2 Read mode operation. The waveforms and timing relationships shown on figure 4 and the conditions specified in table I  
shall be applied when reading the device. Pattern verification utilizes the read mode.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
22  
DSCC FORM 2234  
APR 97  
4.4.3 RDY/BUSY. While the write operation is in progress, the RDY/BUSY output is at a TTL low. An internal timer times  
out the required byte write time and at the end of this time, the device signals the RDY/BUSY pin to a TTL high. The  
RDY/BUSY pin is an open drain output and a typical 3 kpull-up resistor to VCC is required. The pull-up resistor value is  
dependent on the number of OR-tied RDY/BUSY pins (applies to device types 13 through 17 and 23 through 28).  
4.4.4 Set software data protection. Device types 01-05 and 08-12 software data protection offers a method of preventing  
inadvertent writes. These devices are placed in protected state by writing a series of instructions (see figure 9) to the device.  
Once protected, writing to the device may only be performed by executing the same sequence of instructions appended with  
either a byte write operation or page write operation. The waveforms and timing relationships shown on figures 4 - 8 and the  
test conditions and limits specified in table I shall apply.  
4.4.4.1 Reset software data protection. Device types 01-05 and 08-12 protection feature is reset by writing a series of  
instructions (see figure 10) to the device. The waveforms and timing relationships shown on figures 4 - 8 and the test  
conditions and limits specified in table I shall apply.  
5. PACKAGING  
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.  
6. NOTES  
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications  
(original equipment), design applications, and logistics purposes.  
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-  
prepared specification or drawing.  
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for  
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.  
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system  
application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be  
used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC  
5962) should contact DSCC-VA, telephone (614) 692-0544.  
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone  
(614) 692-0547.  
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-  
HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted  
by DSCC-VA.  
SIZE  
STANDARD  
5962-87514  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
23  
DSCC FORM 2234  
APR 97  
STANDARD MICROCIRCUIT DRAWING BULLETIN  
DATE: 04-06-04  
Approved sources of supply for SMD 5962-87514 are listed below for immediate acquisition information only and shall be  
added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include  
the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has  
been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-  
HDBK-103 and QML-38535.  
Standard  
microcircuit drawing  
PIN 1/  
Vendor  
CAGE  
number  
2/  
Vendor  
similar  
PIN 3/  
5962-8751401XA  
5962-8751401YA  
5962-8751401ZC  
5962-8751402XA  
5962-8751402YA  
5962-8751402ZC  
5962-8751403XA  
5962-8751403YA  
5962-8751403ZC  
5962-8751404XA  
5962-8751404YA  
5962-8751404ZC  
5962-8751405XA  
5962-8751405YA  
5962-8751405ZC  
5962-8751406XA  
5962-8751406UA  
5962-8751406YA  
5962-8751407XA  
5962-8751407UA  
5962-8751407YA  
5962-8751408XA  
5962-8751408UA  
5962-8751408YA  
5962-8751409XA  
5962-8751409UA  
5962-8751409YA  
5962-8751410XA  
5962-8751410UA  
5962-8751410YA  
5962-8751411XA  
5962-8751411UA  
5962-8751411YA  
5962-8751412XA  
5962-8751412UA  
5962-8751412YA  
5962-8751413XA  
5962-8751413UA  
5962-8751413YA  
5962-8751413ZA  
5962-8751414XA  
X28C64DMB-35  
2/  
X28C64EMB-35  
2/  
X28C64FMB-35  
2/  
X28C64DMB-30  
2/  
X28C64EMB-30  
2/  
X28C64FMB-30  
2/  
X28C64DMB-25  
2/  
X28C64EMB-25  
2/  
X28C64FMB-25  
2/  
X28C64DMB-20  
2/  
X28C64EMB-20  
2/  
X28C64FMB-20  
2/  
X28C64DMB-25  
2/  
X28C64EMB-25  
2/  
X28C64FMB-25  
2/  
AT28PC64-35DM/883  
AT28PC64-35KM/883  
AT28PC64-35LM/883  
AT28PC64-30DM/883  
AT28PC64-30KM/883  
AT28PC64-30LM/883  
AT28C64B-25DM/883  
AT28PC64-25KM/883  
AT28PC64-25LM/883  
AT28C64B-20DM/883  
AT28PC64-20KM/883  
AT28PC64-20LM/883  
AT28HC64B-12DM/883  
AT28HC64L-12KM/883  
AT28HC64L-12LM/883  
AT28HC64B-90DM/883  
AT28HC64L-90KM/883  
AT28HC64L-90LM/883  
AT28HC64B-70DM/883  
AT28HC64L-70KM/883  
AT28HC64L-70LM/883  
AT28C64-35DM/883  
AT28C64-35KM/883  
AT28C64-35LM/883  
AT28C64-35FM/883  
AT28C64-30DM/883  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
See footnotes at end of table.  
1 of 3  
STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued.  
Standard  
microcircuit drawing  
PIN 1/  
Vendor  
CAGE  
number  
2/  
Vendor  
similar  
PIN 3/  
5962-8751414UA  
5962-8751414YA  
5962-8751415XA  
5962-8751415UA  
5962-8751415YA  
5962-8751415ZA  
5962-8751416XA  
5962-8751416UA  
5962-8751416YA  
5962-8751417XA  
5962-8751417UA  
5962-8751417YA  
5962-8751418XA  
5962-8751418UA  
5962-8751418YA  
5962-8751419XA  
5962-8751419UA  
5962-8751419YA  
5962-8751420XA  
5962-8751420UA  
5962-8751420YA  
5962-8751420ZA  
5962-8751421XA  
5962-8751421UA  
5962-8751421YA  
5962-8751422XA  
5962-8751422UA  
5962-8751422YA  
5962-8751423XA  
5962-8751423YA  
5962-8751423ZA  
5962-8751424XA  
5962-8751424YA  
5962-8751424ZA  
5962-8751425XA  
5962-8751425YA  
5962-8751425ZA  
AT28C64-30KM/883  
AT28C64-30LM/883  
AT28C64-25DM/883  
AT28C64-25KM/883  
AT28C64-25LM/883  
AT28C64-25FM/883  
AT28C64-20DM/883  
AT28C64-20KM/883  
AT28C64-20LM/883  
AT28C64-15DM/883  
AT28C64-15KM/883  
AT28C64-15LM/883  
AT28C64X-35DM/883  
AT28C64X-35KM/883  
AT28C64X-35LM/883  
AT28C64X-30DM/883  
AT28C64X-30KM/883  
AT28C64X-30LM/883  
AT28C64X-25DM/883  
AT28C64X-25KM/883  
AT28C64X-25LM/883  
AT28C64X-25FM/883  
AT28C64X-20DM/883  
AT28C64X-20KM/883  
AT28C64X-20LM/883  
AT28C64X-15DM/883  
AT28C64X-15KM/883  
AT28C64X-15LM/883  
DM28C65-350/B  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
LM28C65-350/B  
2/  
FM28C65-350/B  
2/  
DM28C65-300/B  
2/  
LM28C65-300/B  
2/  
FM28C65-300/B  
2/  
DM28C65-250/B  
2/  
LM28C65-250/B  
2/  
FM28C65-250/B  
2 of 3  
STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued.  
Standard  
microcircuit drawing  
PIN 1/  
Vendor  
CAGE  
number  
Vendor  
similar  
PIN 3/  
5962-8751426XA  
5962-8751426YA  
5962-8751426ZA  
5962-8751427XA  
5962-8751427YA  
5962-8751427ZA  
5962-8751428XA  
5962-8751428YA  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
2/  
DM28C65-200/B  
LM28C65-200/B  
FM28C65-200/B  
DM55C65-250/B  
LM55C65-250/B  
FM55C65-250/B  
AT28C64F-20DM/883  
AT28C64F-20LM/883  
1/ The lead finish shown for each PIN representing a hermetic  
package is the most readily available from the manufacturer  
listed for that part. If the desired lead finish is not listed contact  
the vendor to determine its availability.  
2/ Not available from an approved source.  
3/ Caution. Do not use this number for item acquisition. Items acquired  
to this number may not satisfy the performance requirements of this drawing.  
The information contained herein is disseminated for convenience  
only and the Government assumes no liability whatsoever for any  
inaccuracies in this information bulletin.  
3 of 3  

相关型号:

ETC
ETC
ETC
ETC
ETC

5962-8751420YC

8K X 8 EEPROM 5V, 250 ns, CQCC32, CERAMIC, LCC-32
XICOR
ETC
ETC

5962-8751420ZC

EEPROM, 8KX8, 250ns, Parallel, CMOS, CDFP28, BOTTOM BRAZED, CERAMIC, DFP-28
XICOR
ETC
ETC
ETC