X24C00PM 概述
Serial E2PROM 串行E2PROM EEPROM
X24C00PM 规格参数
是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | PLASTIC, DIP-8 | Reach Compliance Code: | unknown |
风险等级: | 5.38 | 其他特性: | 2 WIRE SERIAL INTERFACE |
最大时钟频率 (fCLK): | 1 MHz | 数据保留时间-最小值: | 100 |
耐久性: | 100000 Write/Erase Cycles | JESD-30 代码: | R-PDIP-T8 |
JESD-609代码: | e0 | 长度: | 10.03 mm |
内存密度: | 128 bit | 内存集成电路类型: | EEPROM |
内存宽度: | 8 | 功能数量: | 1 |
端子数量: | 8 | 字数: | 16 words |
字数代码: | 16 | 工作模式: | SYNCHRONOUS |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
组织: | 16X8 | 输出特性: | 3-STATE |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装等效代码: | DIP8,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 并行/串行: | SERIAL |
峰值回流温度(摄氏度): | NOT SPECIFIED | 电源: | 5 V |
认证状态: | Not Qualified | 座面最大高度: | 4.32 mm |
串行总线类型: | I2C | 最大待机电流: | 0.00005 A |
子类别: | EEPROMs | 最大压摆率: | 0.003 mA |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 4.5 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | CMOS | 温度等级: | MILITARY |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 宽度: | 7.62 mm |
最长写入周期时间 (tWC): | 5 ms | Base Number Matches: | 1 |
X24C00PM 数据手册
通过下载X24C00PM数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载APPLICATION NOTES
A V A I L A B L E
AN4 • AN12 • AN22 • AN26 • AN32
128 Bit
X24C00
16 x 8 Bit
Serial E2PROM
FEATURES
DESCRIPTION
2
• 2.7V to 5.5V Power Supply
The X24C00 is a CMOS 128 bit serial E PROM, inter-
nally organized as 16 x 8. The X24C00 features a serial
interface and software protocol allowing operation on a
simple two wire bus.
2
• 128 Bit Serial E PROM
• Low Power CMOS
—Active Current Less Than 3mA
—Standby Current Less Than 50µA
• Internally Organized 16 x 8
• 2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
• Byte Mode Write
2
Xicor E PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
The X24C00 is fabricated with Xicor’s Advanced CMOS
Floating Gate technology.
• Self Timed Write Cycle
—Typical Write Cycle Time of 5ms
• Push/Pull Output
• High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
• Available Packages
—8-Lead MSOP
—8-Lead PDIP
—8-Lead SOIC
FUNCTIONAL DIAGRAM
PIN CONFIGURATION
MSOP/DIP/SOIC
CONTROL
LOGIC
COMMAND/ADDRESS
SCL
SDA
1
2
3
4
8
7
6
5
V
REGISTER
NC
NC
CC
NC
X24C00
NC
SCL
SDA
V
SS
INPUT/
OUTPUT
BUFFER
SHIFT REGISTER
3836 FHD F02.1
MEMORY ARRAY
3836 FHD F01
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3836-1.5 6/10/96 T2/C1/D0 NS
Characteristics subject to change without notice
1
X24C00
PIN DESCRIPTIONS
Serial Clock (SCL)
Clock and Data Conventions
DatastatesontheSDAlinecanchangeonlyduringSCL
LOW. SDA state changes during SCL HIGH are re-
served for indicating start and stop conditions. Refer to
Figures 1 and 2.
The SCL input is used to clock all data into and out of the
device.
Serial Data (SDA)
Start Condition
SDA is a bidirectional pin used to transfer data into and
out of the device. It is a push/pull output and does not
require the use of a pull-up resistor.
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24C00 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met.
PIN NAMES
Symbol
Description
No Connect
Ground
A start may be issued to terminate the input of a control
word or the input of data to be written. This will reset the
device and leave it ready to begin a new read or write
command. Because of the push/pull output, a start
cannot be generated while the part is outputting data.
Starts are also inhibited while a write is in progress.
NC
V
V
SS
CC
Supply Voltage
Serial Data
Serial Clock
SDA
SCL
Stop Condition
3836 PGM T01
The stop condition is a LOW to HIGH transition of SDA
when SCL is HIGH. The stop condition is used to reset
the device during a command or data input sequence
and will leave the device in the standby mode. As with
starts, stops are inhibited when outputting data and
while a write is in progress.
DEVICE OPERATION
The X24C00 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
ontothebusasatransmitterandthereceivingdeviceas
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave. The
master will always initiate data transfers and provide the
clock for both transmit and receive operations. There-
fore, the X24C00 will be considered a slave in all
applications.
Write Operation
Thebytewriteoperationisinitiatedwithastartcondition.
Thestartconditionisfollowedbyaneightbitcontrolbyte
which consists of a two bit write command (0,1), four
address bits, and two “don’t care” bits (Figure 3).
2
X24C00
Figure 1. Data Validity
SCL
SDA
DATA STABLE
DATA
CHANGE
3836 FHD F03
Figure 2. Definition of Start and Stop Conditions
SCL
SDA
START CONDITION
STOP CONDITION
3836 FHD F04
Figure 3. Control Byte
C1 C2 A3 A2 A1 A0 XX XX
START
3836 FHD F05
3
X24C00
After receipt of the control byte, the X24C00 will enter
thewritemodeandawaitthedatatobewritten.Thisdata
is shifted into the device on the next eight SCL clocks.
Once eight clocks have been received, the data in the
shift register will be written into the memory array. While
the write is in progress the X24C00 will not respond to
any inputs. At any time prior to clocking in the last data
bit, a stop command or a new start command will
terminate the operation. If a start command is given, the
X24C00 will reset all counters and will prepare to clock
in the next control byte. If a stop command is given, the
X24C00 will reset all counters and await the next start
command.
Read Operation
Thebytereadoperationisinitiatedwithastartcondition.
Thestartconditionisfollowedbyaneight-bitcontrolbyte
which consists of a two-bit read command (1,0), four
address bits, and two “don’t care” bits. After receipt of
thecontrolbytetheX24C00willenterthereadmodeand
transfer data into the shift register from the array. This
data is shifted out of the device on the next eight SCL
clocks. At the end of the read, all counters are reset and
the X24C00 will enter the standby mode. As with a write,
the read operation can be interrupted by a start or stop
conditionwhilethecommandoraddressisbeingclocked
in. While clocking data out, starts or stops cannot be
generated.
At the end of the write the X24C00 will automatically
reset all counters and enter the standby mode.
(Figure 4).
During the second don’t care clock cycle, starts and
stops are ignored. The master must free the bus prior to
the end of this clock cycle to allow the X24C00 to begin
outputting data (Figures 5 and 6).
Figure 4. Write Sequence
0
1
A3 A2 A1 A0 XX XX D7 D6 D5 D4 D3 D2 D1 D0
START
3836 FHD F06
Figure 5. Read Sequence
1
0
A3 A2 A1 A0 XX XX D7 D6 D5 D4 D3 D2 D1 D0
START
3836 FHD F07
Figure 6. Read Cycle Timing
SYMBOL TABLE
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
6
7
8
1
SCK
SDA IN
May change
from LOW
to HIGH
Will change
from LOW
to HIGH
A0
XX
XX
May change
from HIGH
to LOW
Will change
from HIGH
to LOW
SDA OUT
D7
D6
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
3836 FHD F08
4
X24C00
ABSOLUTE MAXIMUM RATINGS*
Temperature under Bias
X24C00...................................... –65°C to +135°C
Storage Temperature ....................... –65°C to +150°C
Voltage on any Pin with
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and the functional operation of
the device at these or any other conditions above those
indicatedintheoperationalsectionsofthisspecificationis
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
Respect to V ............................................ –1V to +7V
SS
D.C. Output Current ............................................. 5mA
Lead Temperature
(Soldering, 10 seconds).............................. 300°C
RECOMMENDED OPERATING CONDITIONS
Temperature
Min.
Max.
Supply Voltage
Limits
X24C00
5V ±10%
3V to 5.5V
2.7V to 5.5V
Commercial
Industrial
Military
0°C
+70°C
+85°C
+125°C
X24C00-3
X24C00-2.7
–40°C
–55°C
3836 PGM T02.1
3836 PGM T03.1
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)
Limits
Symbol
Parameter
Min.
Max.
Units
Test Conditions
l
V
V
V
Supply Current Read
Supply Current Write
Standby Current
1
3
mA
SCL = VCC x 0.1/VCC x 0.9
Levels @ 1MHz, SDA = Open
CC1
CC
CC
CC
I
I
CC2
SB1
100
µA
µA
SCL = SDA = V
CC
V
= 5V ±10%
CC
I
V
CC
Standby Current
50
SCL = SDA = V
SB2
CC
V
V
V
= 2.7V
CC
I
I
Input Leakage Current
Output Leakage Current
Input LOW Voltage
10
10
µA
µA
V
= V to V
SS CC
LI
IN
= V to V
CC
LO
OUT
SS
(1)
V
V
V
V
–1
V
x 0.3
lL
CC
CC
(1)
Input HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
V
V
x 0.7
V
+ 0.5
V
IH
CC
0.4
V
I
I
= 2.1mA
OL
OL
OH
– 0.8
V
= 1mA
CC
OH
3841 PGM T04.3
CAPACITANCE T = +25°C, f = 1MHz, V = 5V
A
CC
Symbol
Parameter
Max.
Units
Test Conditions
(2)
C
C
Input/Output Capacitance (SDA)
Input Capacitance (SCL)
8
6
pF
pF
V
V
= 0V
= 0V
I/O
I/O
(2)
IN
IN
3836 PGM T05.1
Notes: (1) V min. and V max. are for reference only and are not tested.
IL
IH
(2) This parameter is periodically sampled and not 100% tested.
5
X24C00
POWER-UP TIMING
Symbol
Parameter
Max.
Units
(3)
t
t
Power-up to Read Operation
Power-up to Write Operation
2
5
ms
ms
PUR
(3)
PUW
3836 PGM T08
A.C. CONDITIONS OF TEST
EQUIVALENT A.C. LOAD CIRCUIT
Input Pulse Levels
V
CC
x 0.1 to V x 0.9
CC
5V
2.16KΩ
Input Rise and
Fall Times
10ns
Input and Output
Timing Levels
V
x 0.5
CC
OUTPUT
3836 PGM T06.1
3.07KΩ
100pF
3836 FHD F09.2
A.C. CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
Read & Write Cycle Limits
Symbol
Parameter
Min.
Max.
Units
f
t
t
SCL Clock Frequency
0
1
MHz
ns
SCL
SCL LOW to SDA Data Out Valid
350
AA
Time the Bus Must Be Free Before a
New Transmission Can Start
500
ns
BUF
t
t
t
t
t
t
t
t
t
t
Start Condition Hold Time
Clock LOW Period
250
500
500
250
0
ns
ns
ns
ns
µs
ns
µs
ns
ns
HD:STA
LOW
Clock HIGH Period
HIGH
SU:STA
HD:DAT
SU:DAT
R
Start Condition Setup Time
Data In Hold Time
Data in Setup Time
250
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
1
300
F
250
50
SU:STO
DH
ns
3836 PGM T07.1
Note: (3) t
and t
are the delays required from the time V is stable until the specified operation can be initiated. These parameters
PUW CC
PUR
are periodically sampled and not 100% tested.
6
X24C00
Bus Timing
t
t
t
t
HIGH
LOW
R
F
SCL
t
t
t
t
t
SU:STA
HD:STA
HD:DAT
SU:DAT
SU:STO
SDA IN
t
t
t
AA
DH
BUF
SDA OUT
3836 FHD F10
WRITE CYCLE LIMITS
Symbol
Parameter
Min.
Max.
Units
ms
(4)
t
Write Cycle Time
5
WR
3836 PGM T09
Write Cycle Timing
SCL
SDA
D0
t
WR
START
CONDTION
X24C00
ADDRESS
3836 ILL F11.1
Note: (4) The write cycle time is the time from the initiation of a write sequence to the end of the internal erase/program cycle. During the
write cycle, the X24C00 bus interface circuits are disabled, SDA is high impedance, and the device does not respond to start
conditions.
7
X24C00
PACKAGING INFORMATION
8-LEAD MINIATURE SMALL OUTLINE GULL WING PACKAGE TYPE M
0.118 ± 0.002
(3.00 ± 0.05)
0.012 + 0.006 / -0.002
(0.30 + 0.15 / -0.05)
0.0256 (0.65) TYP
R 0.014 (0.36)
0.118 ± 0.002
(3.00 ± 0.05)
0.030 (0.76)
0.0216 (0.55)
7° TYP
0.036 (0.91)
0.032 (0.81)
0.040 ± 0.002
(1.02 ± 0.05)
0.008 (0.20)
0.004 (0.10)
0.150 (3.81)
0.007 (0.18)
0.005 (0.13)
REF.
0.193 (4.90)
REF.
NOTE:
1. ALL DIMENSIONS IN INCHES AND (MILLIMETERS)
3926 ILL F49
8
X24C00
PACKAGING INFORMATION
8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P
0.430 (10.92)
0.360 (9.14)
0.260 (6.60)
0.240 (6.10)
PIN 1 INDEX
PIN 1
0.060 (1.52)
0.020 (0.51)
0.300
(7.62) REF.
HALF SHOULDER WIDTH ON
ALL END PINS OPTIONAL
0.145 (3.68)
0.128 (3.25)
SEATING
PLANE
0.025 (0.64)
0.015 (0.38)
0.150 (3.81)
0.125 (3.18)
0.065 (1.65)
0.045 (1.14)
0.110 (2.79)
0.090 (2.29)
0.020 (0.51)
0.016 (0.41)
0.325 (8.25)
0.300 (7.62)
0.015 (0.38)
MAX.
0°
15°
TYP. 0.010 (0.25)
NOTE:
1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH
3926 FHD F01
9
X24C00
PACKAGING INFORMATION
8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S
0.150 (3.80)
0.158 (4.00)
0.228 (5.80)
0.244 (6.20)
PIN 1 INDEX
PIN 1
0.014 (0.35)
0.019 (0.49)
0.188 (4.78)
0.197 (5.00)
(4X) 7°
0.053 (1.35)
0.069 (1.75)
0.004 (0.19)
0.010 (0.25)
0.050 (1.27)
0.010 (0.25)
0.050" TYPICAL
X 45°
0.020 (0.50)
0.050"
TYPICAL
0° – 8°
0.0075 (0.19)
0.010 (0.25)
0.250"
0.016 (0.410)
0.037 (0.937)
0.030"
TYPICAL
8 PLACES
FOOTPRINT
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
3926 FHD F22.1
10
X24C00
ORDERING INFORMATION
X24C00
X
X
-X
V
Range
Device
Part Mark Convention
LIMITED WARRANTY
CC
Blank = 5V ±10%
3 = 3V to 5.5V
2.7 = 2.7V to 5.5V
Temperature Range
Blank = Commercial = 0°C to +70°C
I = Industrial = –40°C to +85°C
M = Military = –55°C to +125°C
Package
M = 8-Lead MSOP
P = 8-Lead Plastic DIP
S = 8-Lead SOIC
Blank = 8-Lead SOIC
P = 8-Lead Plastic DIP
X24C00
X
X
Blank = 4.5V to 5.5V, 0°C to +70°C
I = 4.5V to 5.5V, –40°C to +85°C
M = 4.5V to 5.5V, –55°C to +85°C
D = 3V to 5.5V, 0°C to +70°C
E = 3V to 5.5V, –40°C to +85°C
F = 2.7V to 5.5V, 0°C to +70°C
G = 2.7V to 5.5V, –40°C to +85°C
Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes
no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described
devices from patent infringement. Xicor, Inc. makes no warranty of merchantability or fitness tor any purpose. Xicor, Inc. reserves the right to
discontinue production and change specifications and prices at any time and without notice.
Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents,
licenses are implied.
US. PATENTS
Xicor products are covered by one or more of the following U.S. Patents: 4,263,664; 4,274,012; 4,300,212; 4,314,265; 4,326,134; 4,393,481;
4,404,475;4,450,402;4,486,769;4,488,060;4,520,461;4,533,846;4,599,706;4,617,652;4,668,932;4,752,912;4,829,482;4,874,967;4,883,976;
4,980,859; 5,012,132; 5,003,197; 5,023,694. Foreign patents and additional patents pending.
LIFE RELATED POLICY
In situations where semiconductor component failure may endanger life, system designers using this product should design the system with
appropriate error detection and correction, redundancy and back-up features to prevent such an occurrence.
Xicor’s products are not authorized for use as critical components in life support devices or systems.
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life,
and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected
to result in a significant injury to the user.
2. Acriticalcomponentisanycomponentofalifesupportdeviceorsystemwhosefailuretoperformcanbereasonablyexpectedtocausethefailure
of the life support device or system, or to affect its satety or effectiveness.
11
X24C00PM 相关器件
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X24C00PM-2.7 | XICOR | Serial E2PROM | 获取价格 | |
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X24C00S-3T2 | XICOR | EEPROM, 16X8, Serial, CMOS, PDSO8, PLASTIC, SOIC-8 | 获取价格 | |
X24C00S-3T4 | XICOR | EEPROM, 16X8, Serial, CMOS, PDSO8, PLASTIC, SOIC-8 | 获取价格 | |
X24C00SI | XICOR | Serial E2PROM | 获取价格 |
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