XC95216-10HQG208I [XILINX]
Flash PLD, 10ns, CMOS, PQFP208, HQFP-208;
| 型号： | XC95216-10HQG208I |
| 厂家： | 
XILINX, INC |
| 描述： | Flash PLD, 10ns, CMOS, PQFP208, HQFP-208 |
| 文件： | 总11页 (文件大小：116K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Obsolete/Under Obsolescence
0
R
XC95216 In-System
Programmable CPLD
0
5
DS068 (v5.0) May 17, 2013
Product Specification
Features
Description
•
•
•
•
•
10 ns pin-to-pin logic delays on all pins
The XC95216 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of eight
36V18 Function Blocks, providing 4,800 usable gates with
propagation delays of 10 ns. See Figure 2 for the architec-
ture overview.
fCNT to 111 MHz
216 macrocells with 4,800 usable gates
Up to 166 user I/O pins
5V in-system programmable
-
-
Endurance of 10,000 program/erase cycles
Program/erase over full commercial voltage and
temperature range
Power Management
Power dissipation can be reduced in the XC95216 by con-
figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
•
•
Enhanced pin-locking architecture
Flexible 36V18 Function Block
-
90 product terms drive any or all of 18 macrocells
within Function Block
Operating current for each design can be approximated for
specific operating conditions using the following equation:
-
Global and product term clocks, output enables,
set and reset signals
I
CC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
Where:
MCHP = Macrocells in high-performance mode
•
•
Extensive IEEE Std 1149.1 boundary-scan (JTAG)
support
Programmable power reduction mode in each
macrocell
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
•
•
•
Slew rate control on individual outputs
User programmable ground pin capability
Extended pattern security features for design
protection
Figure 1 shows a typical calculation for the XC95216
device.
•
•
•
•
High-drive 24 mA outputs
3.3V or 5V I/O capability
Advanced CMOS 5V FastFLASH™ technology
Supports parallel programming of more than one
XC9500 concurrently
Available 160-pin PQFP, 352-pin BGA, and 208-pin
HQFP packages (Note: 352-pin BGA packages are
being discontinued for this device)
600
(500)
•
400
(360)
(340)
200
0
50
100
Clock Frequency (MHz)
DS068_01_110101
Figure 1: Typical I vs. Frequency for XC95216
CC
© 1998–2007, 2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other
countries. All other trademarks are the property of their respective owners.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
1
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
3
JTAG
In-System Programming Controller
1
JTAG Port
Controller
36
Function
18
18
18
18
Block 1
I/O
Macrocells
1 to 18
I/O
I/O
I/O
36
36
36
Function
Block 2
Macrocells
1 to 18
I/O
Blocks
I/O
I/O
Function
Block 3
Macrocells
1 to 18
I/O
I/O
3
I/O/GCK
I/O/GSR
I/O/GTS
Function
Block 4
1
2
Macrocells
1 to 18
36
Function
Block 12
18
Macrocells
1 to 18
DS068_02_110101
Figure 2: XC95216 Architecture
Function block outputs (indicated by the bold line) drive the I/O blocks directly.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
2
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
Absolute Maximum Ratings
Symbol
Description
Value
Units
V
Supply voltage relative to GND
–0.5 to 7.0
V
V
V
CC
V
Input voltage relative to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Junction temperature
–0.5 to V + 0.5
CC
IN
V
–0.5 to V + 0.5
TS
CC
o
T
–65 to +150
+150
C
STG
o
T
C
J
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
Recommended Operation Conditions
Symbol
Parameter
Commercial T = 0 C to 70 C
Min
4.75
4.5
4.75
4.5
3.0
0
Max
5.25
5.5
Units
o
o
V
Supply voltage for internal logic
and input buffers
V
CCINT
A
o
o
Industrial T = –40 C to +85 C
A
o
o
V
Supply voltage for output drivers
for 5V operation
Commercial T = 0 C to 70 C
5.25
5.5
V
CCIO
A
o
o
Industrial T = –40 C to +85 C
A
Supply voltage for output drivers for 3.3V operation
Low-level input voltage
3.6
V
0.80
V
V
V
IL
V
High-level input voltage
2.0
0
V
+ 0.5
CCINT
IH
V
Output voltage
V
CCIO
O
Quality and Reliability Characteristics
Symbol
Parameter
Min
20
Max
Units
T
Data Retention
Program/Erase Cycles (Endurance)
-
-
Years
DR
N
10,000
Cycles
PE
DC Characteristic Over Recommended Operating Conditions
Symbol
Parameter
Test Conditions
Min
Max
-
Units
V
Output high voltage for 5V outputs
Output high voltage for 3.3V outputs
Output low voltage for 5V outputs
Output low voltage for 3.3V outputs
Input leakage current
I
I
I
I
= –4.0 mA, V = Min
2.4
V
V
OH
OH
OH
OL
OL
CC
= –3.2 mA, V = Min
2.4
-
CC
V
= 24 mA, V = Min
-
-
-
0.5
0.4
10
V
OL
CC
= 10 mA, V = Min
V
CC
I
I
V
V
= Max
CC
μA
IL
= GND or V
= Max
CC
IN
CC
CC
I/O high-Z leakage current
I/O capacitance
V
V
-
-
10
10
μA
pF
IH
= GND or V
IN
C
V
= GND
IN
IN
f = 1.0 MHz
I
Operating supply current
(low power mode, active)
V = GND, No load
f = 1.0 MHz
200 (Typical)
mA
CC
I
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
3
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
AC Characteristics
XC95216-10
XC95216-15
XC95216-20
Symbol
Parameter
I/O to output valid
Min
Max
Min
Max
Min
Max
Units
ns
T
T
-
10.0
-
8.0
0
15.0
-
10.0
0
20.0
PD
SU
I/O setup time before GCK
I/O hold time after GCK
6.0
-
-
-
ns
T
0
-
-
-
ns
H
T
GCK to output valid
-
6.0
-
8.0
-
10.0
ns
CO
(1)
f
16-bit counter frequency
111.1
-
95.2
55.6
4.0
4.0
-
-
83.3
50.0
4.0
6.0
-
-
MHz
MHz
ns
CNT
(2)
f
Multiple FB internal operating frequency
I/O setup time before p-term clock input
I/O hold time after p-term clock input
P-term clock output valid
66.7
-
-
-
-
-
-
SYSTEM
T
2.0
PSU
T
4.0
-
-
-
ns
PH
T
-
10.0
6.0
6.0
10.0
10.0
-
12.0
11.0
11.0
14.0
14.0
-
16.0
16.0
16.0
18.0
18.0
-
ns
PCO
T
GTS to output valid
-
-
-
-
ns
OE
T
GTS to output disable
-
-
ns
OD
T
T
Product term OE to output enabled
Product term OE to output disabled
GCK pulse width (High or Low)
-
-
-
ns
POE
POD
WLH
-
-
-
ns
T
4.5
7.5
5.5
8.0
5.5
8.0
ns
T
Asynchronous preset/reset pulse width (High
or Low)
-
-
-
ns
APRPW
Notes:
1. fCNT is the fastest 16-bit counter frequency available, using the local feedback when applicable.
fCNT is also the Export Control Maximum flip-flop toggle rate, fTOG
2. fSYSTEM is the internal operating frequency for general purpose system designs spanning multiple FBs.
.
V
TEST
R
1
2
Output Type
V
V
R
R
C
L
CCIO
TEST
1
2
Device Output
5.0V
3.3V
5.0V
3.3V
160Ω
260Ω
120Ω
360Ω
35 pF
35 pF
C
R
L
DS067_03_110101
Figure 3: AC Load Circuit
DS068 (v5.0) May 17, 2013
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Product Specification
4
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
Internal Timing Parameters
XC95216-10
XC95216-15
XC95216-20
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Units
Buffer Delays
T
Input buffer delay
GCK buffer delay
GSR buffer delay
GTS buffer delay
Output buffer delay
-
-
-
-
-
-
3.5
2.5
6.0
6.0
3.0
0
-
-
-
-
-
-
4.5
3.0
7.5
11.0
4.5
0
-
-
-
-
-
-
6.5
3.0
9.5
16.0
6.5
0
ns
ns
ns
ns
ns
ns
IN
T
GCK
GSR
T
T
GTS
T
OUT
T
Output buffer enable/disable delay
EN
Product Term Control Delays
T
T
Product term clock delay
Product term set/reset delay
Product term 3-state delay
-
-
-
3.0
2.5
3.5
-
-
-
2.5
3.0
5.0
-
-
-
2.5
3.0
5.0
ns
ns
ns
PTCK
PTSR
T
PTTS
Internal Register and Combinatorial Delays
T
T
Combinatorial logic propagation delay
Register setup time
-
1.0
-
-
3.0
-
-
4.0
-
ns
ns
ns
ns
ns
ns
ns
ns
PDI
SUI
2.5
3.5
3.5
T
Register hold time
3.5
-
4.5
-
6.5
-
HI
T
Register clock to output valid time
Register async. S/R to output delay
Register async. S/R recover before clock
Internal logic delay
-
0.5
7.0
-
-
0.5
8.0
-
-
0.5
8.0
-
COI
T
-
-
-
AOI
T
10.0
10.0
10.0
RAI
T
-
-
2.5
11.0
-
-
3.0
11.5
-
-
3.0
11.5
LOGI
T
Internal low power logic delay
LOGILP
Feedback Delays
T
FastCONNECT feedback delay
-
-
9.5
3.5
-
-
11.0
3.5
-
-
13.0
5.0
ns
ns
F
T
Function block local feedback delay
LF
Time Adders
(1)
T
Incremental product term allocator delay
Slew-rate limited delay
-
-
1.0
4.5
-
-
1.0
5.0
-
-
1.5
5.5
ns
ns
PTA
T
SLEW
Notes:
1. TPTA is multiplied by the span of the function as defined in the XC9500 family data sheet.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
5
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
XC95216 I/O Pins
Function Macro-
BScan
Order
Function Macro-
BScan
Order
(2)
(2)
Block
cell
PQ160 HQ208 BG352
Block
cell
PQ160 HQ208 BG352
1
1
–
–
–
645
642
639
636
633
630
627
624
621
618
615
612
609
606
603
600
597
594
591
588
585
582
579
576
573
570
567
564
561
558
555
552
549
546
543
540
3
1
–
–
–
537
534
531
528
525
522
519
516
513
510
507
504
501
498
495
492
489
486
483
480
477
474
471
468
465
462
459
456
453
450
447
444
441
438
435
432
1
2
18
19
–
22
23
28
25
30
–
M25
M26
N26
N25
P23
–
3
2
32
43
AA26
[1]
[1]
[1]
1
3
3
3
33
44
Y24
1
4
3
4
–
39
45
U23
1
5
21
22
–
3
5
34
AB25
[1]
[1]
[1]
1
6
3
6
35
46
AA24
–
1
7
3
7
–
36
37
–
–
1
8
23
24
–
31
32
12
33
34
–
P24
R26
G26
R24
T26
–
3
8
47
49
67
50
51
–
Y23
AA23
AD18
AB24
AD25
–
1
9
3
9
1
10
11
12
13
14
15
16
17
18
1
3
10
11
12
13
14
15
16
17
18
1
1
25
26
–
3
38
39
–
1
3
1
3
[1]
[1]
[1]
1
27
28
29
30
–
35
36
37
38
–
T25
T23
V26
U24
–
3
42
55
AD23
AF24
AE12
AE23
–
1
3
43
–
56
80
1
3
1
3
44
–
57
1
3
–
2
–
–
–
4
–
–
–
[1]
[1]
[1]
2
2
6
7
E25
G24
P25
4
2
152
153
–
198
199
196
200
201
–
D18
A21
B19
B20
C20
–
2
3
7
8
4
3
2
4
–
29
4
4
[1]
[1]
[1]
2
5
8
9
F26
H23
–
4
5
154
155
–
2
6
9
–
10
–
4
6
2
7
4
7
2
8
11
12
–
15
16
-
K23
K24
–
4
8
156
158
–
202
205
-
B22
B24
–
2
9
4
9
2
10
11
12
13
14
15
16
17
18
4
10
11
12
13
14
15
16
17
18
[1]
[1]
[1]
2
13
14
–
17
18
–
J25
L24
–
4
159
206
C23
[1]
[1]
[1]
2
4
2
3
E23
2
4
–
–
–
2
15
16
–
19
20
14
21
–
K25
L26
H25
M24
–
4
3
4
C26
[1]
[1]
[1]
2
4
4
5
E24
2
4
–
5
–
203
6
D20
F24
–
2
17
–
4
2
4
–
Notes:
1. Global control pin.
2. 352-pin BGA package is being discontinued for the XC95216. See XCN07010 for details.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
6
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
XC95216 I/O Pins (Continued)
Function Macro-
BScan
Order
Function Macro-
BScan
Order
(2)
(2)
Block
cell
PQ160 HQ208 BG352
Block
cell
PQ160 HQ208 BG352
5
1
–
45
47
–
–
–
429
426
423
420
417
414
411
408
405
402
399
396
393
390
387
384
381
378
375
372
369
366
363
360
357
354
351
348
345
342
339
336
333
330
327
324
7
1
–
58
59
–
–
76
–
321
318
315
312
309
306
303
300
297
294
291
288
285
282
279
276
273
270
267
264
261
258
255
252
249
246
243
240
237
234
231
228
225
222
219
216
5
2
58
AE22
AE21
W25
AF21
AD19
–
7
2
AE13
AC13
AE24
AD13
AD12
–
5
3
60
7
3
77
5
4
41
7
4
54
5
5
48
49
–
61
7
5
60
62
–
78
5
6
63
7
6
82
5
7
–
7
7
–
5
8
50
52
–
64
AE20
AF18
AD1
AE17
AE16
–
7
8
63
64
–
83
AC12
AF11
AD8
AE11
AE9
–
5
9
70
7
9
84
5
10
11
12
13
14
15
16
17
18
1
109
71
7
10
11
12
13
14
15
16
17
18
1
91
5
53
54
–
7
65
66
–
85
5
72
7
86
5
–
7
–
5
55
56
–
73
AF16
AE14
Y26
AF14
–
7
67
68
–
87
AD9
AC10
AC26
AF7
–
5
74
7
88
5
40
7
48
5
57
–
75
7
69
–
89
5
–
7
–
6
–
–
–
8
–
–
–
6
2
140
142
–
180
182
208
185
186
–
A12
A13
D22
C14
A15
–
8
2
126
128
–
162
164
143
166
167
–
B5
6
3
8
3
B6
6
4
8
4
J1
6
5
143
144
–
8
5
129
130
–
D8
6
6
8
6
B7
6
7
8
7
–
6
8
145
146
–
187
188
183
191
192
–
B15
C15
B14
A16
C16
–
8
8
131
132
–
170
171
195
173
174
–
C10
B9
6
9
8
9
6
10
11
12
13
14
15
16
17
18
8
10
11
12
13
14
15
16
17
18
A20
A9
6
147
148
–
8
133
134
–
6
8
D11
–
6
8
6
149
150
–
193
194
169
197
–
C17
B18
D9
8
135
138
–
175
178
189
179
–
B11
C12
D15
B12
–
6
8
6
8
6
151
–
C19
–
8
139
–
6
8
Notes:
1. Global control pin.
2. 352-pin BGA package is being discontinued for the XC95216. See XCN07010 for details.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
7
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
XC95216 I/O Pins (Continued)
Function Macro-
BScan
Order
Function Macro-
BScan
Order
(2)
(2)
Block
cell
PQ160 HQ208 BG352
Block
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
cell
PQ160 HQ208 BG352
9
1
–
72
74
–
–
–
213
210
207
204
201
198
195
192
189
186
183
180
177
174
171
168
165
162
159
156
153
150
147
144
141
138
135
132
129
126
123
120
117
114
111
108
1
–
87
88
–
–
–
Y1
V4
U4
V3
W2
–
105
102
99
96
93
90
87
84
81
78
75
72
69
66
63
60
57
54
51
48
45
42
39
36
33
30
27
24
21
18
15
12
9
9
2
95
AD7
AE5
AD4
AC7
AE3
–
2
115
116
119
117
118
–
9
3
97
3
9
4
101
99
4
9
5
76
77
–
5
89
90
–
9
6
100
–
6
9
7
7
9
8
78
79
–
102
103
90
AC5
AD3
AE8
AA4
AB2
–
8
91
92
–
121
122
107
123
125
–
V2
U2
AC3
T2
R4
–
9
9
9
9
10
11
12
13
14
15
16
17
18
1
10
11
12
13
14
15
16
17
18
1
9
82
83
–
110
111
–
93
95
–
9
9
9
84
85
–
112
113
62
AC1
AA2
96
97
–
126
127
120
128
–
R3
R2
U3
R1
–
9
9
AC19
AA1
–
9
86
–
114
–
98
–
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
–
–
–
–
–
–
2
113
114
–
147
148
144
149
150
–
H3
J4
2
101
102
–
131
133
106
134
135
–
P1
N2
AD2
N4
N3
–
3
3
4
K3
G2
G3
–
4
5
115
116
–
5
103
104
–
6
6
7
7
8
117
118
–
152
154
168
155
158
–
E2
D2
A7
F4
B3
–
8
105
106
–
136
137
151
138
139
–
M1
M3
F2
M4
L1
–
9
9
10
11
12
13
14
15
16
17
18
10
11
12
13
14
15
16
17
18
119
122
–
107
108
–
123
124
–
159
160
165
161
–
A3
D6
A6
C6
–
109
111
–
140
145
142
146
–
L2
G1
L3
H2
–
6
125
–
112
–
3
0
Notes:
1. Global control pin.
2. 352-pin BGA package is being discontinued for the XC95216. See XCN07010 for details.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
8
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
XC95216 Global, JTAG and Power Pins
Pin Type
I/O/GCK1
I/O/GCK2
I/O/GCK3
I/O/GTS1
I/O/GTS2
I/O/GTS3
I/O/GTS4
I/O/GSR
TCK
PQ160
HQ208
44
46
55
7
BG352
Y24
33
35
AA24
AD23
E25
42
6
8
9
F26
2
3
E23
4
5
E24
159
206
98
94
176
96
C23
75
AD6
AF6
TDI
71
136
TDO
D12
AE6
TMS
73
V
CCINT 5V
10,46,94,157
1,41,61,81,121,141
11, 59, 124, 153, 204
H24, AF23, T1, G4, C22
V
CCIO 3.3V/5V
1, 26, 53, 65, 79, 92, 105, 132,
157, 172, 181, 184
A10, A17, B2, B25, D7, D13,
D19, G23, H4, K1, K26, N23,
P4, U1, U26, W23, Y4, AC8,
AC14, AC20, AE25, AF10,
AF17
GND
20, 31, 40, 51, 70, 80, 99, 100, 2, 13, 24, 27, 42, 52, 66, 68, 69, A1, A2, A5, A8, A14, A19, A22,
110, 120, 127, 137, 160
81, 93, 104, 108, 129, 130, 141,
156, 163, 177, 190, 207
A25, A26, B1, B26, C7, E1,
E26, H1, H26, N1, P3, P26,
V23, W1, W26, AB1, AB4,
AB26, AC9, AC17, AE1, AE26,
AF1, AF2, AF5, AF8, AF13,
AF19, AF20, AF22, AF25, AF26
No Connects
–
–
A4, A11, A18, A23, A24, B4, B8,
B10, B13, B16, B17, B21, B23,
C1, C2, C3, C4, C5, C8, C9,
C11, C13, C18, C21, C24, C25,
D1, D3, D4, D5, D10, D14, D16,
D17, D21, D23, D24, D25, D26,
E3, E4, F1, F3, F23, F25, G25,
J2, J3, J23, J24, J26, K2, K4,
L4, L23, L25, M2, M23, N24,
P2, R23, R25, T3, T4, T24,
U25, V1, V24, V25, W3, W4,
W24, Y2, Y3, Y25, AA3, AA25,
AB3, AB23, AC2, AC4, AC6,
AC11, AC15, AC16, AC18,
AC21, AC22, AC23, AC24,
AC25, AD5, AD10, AD11,
AD14, AD15, AD16, AD17,
AD20, AD21, AD22, AD24,
AD26, AE2, AE4, AE7, AE10,
AE15, AE18, AE19, AF3, AF4,
AF9, AF12, AF15
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
9
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
Device Part Marking and Ordering Combination Information
R
Device Type
Package
XC95xxx
TQ144
This line not
related to device
part number
Speed
7C
Operating Range
1
Sample package with part marking.
Speed
Device Ordering and
(pin-to-pin
delay)
Pkg.
Symbol
No. of
Pins
Operating
Range
(1)
Part Marking Number
XC95216-10PQ160C
XC95216-10PQG160C
XC95216-10HQ208C
XC95216-10BG352C
XC95216-10PQ160I
XC95216-10PQG160I
XC95216-10HQ208I
XC95216-10BG352I
XC95216-15PQ160C
XC95216-15PQG160C
XC95216-15HQ208C
XC95216-10BG352C
XC95216-15PQ160I
XC95216-15PQG160I
XC95216-15HQ208I
XC95216-15BG352I
XC95216-20PQ160C
XC95216-20PQG160C
XC95216-20HQ208C
XC95216-20BG352C
XC95216-20PQ160I
XC95216-20PQG160I
XC95216-20HQ208I
XC95216-20BG352I
Notes:
Package Type
10 ns
10 ns
10 ns
10 ns
10 ns
10 ns
10 ns
10 ns
15 ns
15 ns
15 ns
15 ns
15 ns
15 ns
15 ns
15 ns
20 ns
20 ns
20 ns
20 ns
20 ns
20 ns
20 ns
20 ns
PQ160 160-pin
PQG160 160-pin
HQ208 208-pin
BG352 352-ball
PQ160 160-pin
PQG160 160-pin
HQ208 208-pin
BG352 352-ball
PQ160 160-pin
PQG160 160-pin
HQ208 208-pin
BG352 352-ball
PQ160 160-pin
PQG160 160-pin
HQ208 208-pin
BG352 352-ball
PQ160 160-pin
PQG160 160-pin
HQ208 208-pin
BG352 352-ball
PQ160 160-pin
PQG160 160-pin
HQ208 208-pin
BG352 352-ball
Plastic Quad Flat Pack (PQFP)
Plastic Quad Flat Pack (PQFP); Pb-Free
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
C
C
C
C
I
Plastic Quad Flat Pack (PQFP)
Plastic Quad Flat Pack (PQFP); Pb-Free
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
I
I
I
Plastic Quad Flat Pack (PQFP)
Plastic Quad Flat Pack (PQFP); Pb-Free
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
C
C
C
C
I
Plastic Quad Flat Pack (PQFP)
Plastic Quad Flat Pack (PQFP); Pb-Free
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
I
I
I
Plastic Quad Flat Pack (PQFP)
Plastic Quad Flat Pack (PQFP); Pb-Free
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
C
C
C
C
I
Plastic Quad Flat Pack (PQFP)
Plastic Quad Flat Pack (PQFP); Pb-Free
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
I
I
I
1. C = Commercial: TA = 0° to +70°C; I = Industrial: TA = –40° to +85°C
2. 352-pin BGA package is being discontinued for the XC95216. See XCN07010 for details.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
10
Product Obsolete/Under Obsolescence
R
XC95216 In-System Programmable CPLD
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Revision History
The following table shows the revision history for this document.
Date
Version
3.0
Revision
Update AC characteristics and internal parameters.
Added Note 1 to page 6.
12/04/1998
08/21/2001
06/18/2003
08/21/2003
04/15/2005
04/03/2006
06/25/2007
05/17/2013
3.1
4.0
Updated format.
4.1
Updated Package Device Marking Pin 1 orientation.
Added asynchronous preset/reset pulse width specification (T
4.2
)
APRPW
4.3
Added Warranty Disclaimer. Added Pb-Free package ordering information.
Discontinuance of BG352 and BGG252 packages.
4.4
5.0
The products listed in this data sheet are obsolete. See XCN11010 for further information.
Removed note added in v4.4 about the 352-pin BGA packages. The XCN07010 covered
this discontinuation.
DS068 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
11
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