CC1210KKX7RYBB224 [YAGEO]
Capacitor, Ceramic, Chip, General Purpose, 0.22uF, 250V, ±10%, X7R, 1210 (3225 mm), 0.071"T, -55º ~ +125ºC, 7" Reel/Plastic Tape;
| 型号： | CC1210KKX7RYBB224 |
| 厂家： | 
YAGEO CORPORATION |
| 描述： | Capacitor, Ceramic, Chip, General Purpose, 0.22uF, 250V, ±10%, X7R, 1210 (3225 mm), 0.071"T, -55º ~ +125ºC, 7" Reel/Plastic Tape 电容器 |
| 文件： | 总16页 (文件大小：382K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SURFACE-MOUNT CERAMIC
MULTILAYER CAPACITORS
Mid-voltage: NP0/X7R
(
)
Pb Free & RoHS compliant
100 V TO 500 V
10 pF to 470 nF
Product specification
2
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
SCOPE
ORDERING INFORMATION
`
This specification describes Mid-
voltage NP0/X7R series chip
capacitors with lead-free
terminations.
Part number is identified by the series, size, tolerance, packing style, TC
material, rated voltage and capacitance value.
YAGEO ORDERING CODE
CC XXXX
X
X
XXX
X
B
X XXX
(1) (2) (3) (4) (5)
(6) (7)
APPLICATIONS
( )
1 SIZE – INCH BASED (METRIC)
ꢀ PCs, hard disk, game PCs
ꢀ Power supplies
ꢀ LCD panel
0603 (1608)
0805 (2012)
1206 (3216)
1210 (3225)
1808 (4520)
1812 (4532)
ꢀ ADSL, modem
FEATURES
ꢀ Supplied in tape on reel
( )
2 TOLERANCE
ꢀ Nickel-barrier end termination
J = ±5%
K = ±10%
( )
3 PACKING STYLE
R = 7” paper tape
K = 7” blister tape
P = 13” paper tape
F = 13” blister tape
C = Bulk case
( )
4 TC MATERIAL
NP0
X7R
( )
5 RATED VOLTAGE
0 = 100 V
A = 200 V
Y = 250 V
B = 500 V
( )
6 PROCESS
B = BME
N = NME
( )
7 CAPACITANCE VALUE:
First two for significant figures and 3rd for number of zero
Letter “R” for decimal point
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Sep 08, 2005 V.0
Product specification
3
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
CONSTRUCTION
The capacitor consists of a
rectangular block of ceramic
dielectric in which a number of
interleaved metal electrodes are
contained. This structure gives
rise to a high capacitance per
unit volume.
terminations
electrodes
The inner electrodes are
connected to the two end
terminations and finally covered
with a layer of plated tin (NiSn).
The terminations are lead-free. A
cross section of the structure is
shown in Fig.1.
MLB457
ceramic material
Fig. 1 Surface mounted multilayer ceramic capacitor construction
DIMENSION
Table 1
For dimension see Table 1
TYPE
CC0603 CC0805 CC1206 CC1210 CC1808 CC1812
1.6 ±0.10 2.0 ±0.20 3.2±0.20 3.2 ±0.20 4.5 ±0.30 4.5 ±0.30
0.8 ±0.07 1.25 ±0.20 1.6±0.20 2.5 ±0.20 2.0 ±0.30 3.2 ±0.30
L1 (mm)
W (mm)
W
T
T
(mm)
Refer to table 2 to 7
L
L
L
L
3
2
4
1
MBB211
min.
0.20
0.50
0.25
0.75
0.25
0.75
0.25
0.75
0.25
0.75
0.25
0.75
L2/L3
(mm)
max.
Fig. 2 Surface mounted multilayer
L4
ceramic capacitor dimension
min.
0.60
0.55
1.40
1.40
2.20
2.20
(mm)
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Sep 08, 2005 V.0
Product specification
4
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
CAPACITANCE RANGE & THICKNESS FOR NP0 100V
Table 2 For NP0 100 V sizes from 0603 to 1812
CAPACITANCE
(pF)
100 V
0603
0805
1206
1210
1808
1812
10
12
15
18
22
27
33
39
47
56
68
82
100
120
150
180
220
270
330
390
470
560
680
820
1,000
1,200
1,500
1,800
2,200
2,700
3,300
3,900
4,700
5,600
0.8 ±0.10
0.6 ±0.10
0.6 ±0.10
0.85 ±0.10
1.25 ±0.20
0.6 ±0.10
1.25 ±0.20
1.25 ±0.20
0.85 ±0.10
1.15±0.15
0.85 ±0.10
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Sep 08, 2005 V.0
Product specification
5
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
Table 2 For NP0 100 V sizes from 0603 to 1812 (continued)
CAPACITANCE
(pF)
100 V
0603
0805
1206
1210
1808
1812
6,800
8,200
1.15±0.15
0.85 ±0.10
1.25 ±0.20
1.25 ±0.20
10,000
12,000
15,000
18,000
22,000
27,000
33,000
39,000
47,000
1.25 ±0.20
0.85 ±0.10
1.15±0.15
NOTE
1. Values in shaded cells indicate thickness class in mm.
2. Capacitance range < 10 pF is on request.
Table 3 For NP0 200/250 V sizes from 0603 to 1812
CAPACITANCE
(pF)
200/250 V
0603
0805
1206
1210
1808
1812
10
12
15
18
22
27
33
39
47
0.8 ±0.10
0.6 ±0.10
0.6 ±0.10
56
68
82
100
120
150
180
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Sep 08, 2005 V.0
Product specification
6
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
Table 3 For NP0 200/250 V sizes from 0603 to 1812 (continued)
CAPACITANCE
(pF)
200/250 V
0603
0805
1206
1210
1808
1812
220
270
330
0.8 ±0.10
0.85 ±0.10
390
0.6 ±0.10
470
560
1.25 ±0.20
0.8 ±0.10
680
820
1,000
1,200
1,500
1,800
2,200
2,700
3,300
3,900
4,700
5,600
6,800
8,200
10,000
0.85 ±0.10
1.25 ±0.20
1.25 ±0.20
1.15±0.15
0.8 ±0.10
1.25 ±0.20
0.85 ±0.10
1.15±0.15
1.25 ±0.20
1.25 ±0.20
0.85 ±0.10
1.15±0.15
1.25 ±0.20
NOTE
1. Values in shaded cells indicate thickness class in mm.
2. Capacitance range < 10 pF is on request.
Table 4 For NP0 500 V sizes from 0805 to 1812
CAPACITANCE
(pF)
500 V
0805
1206
1210
1808
1812
10
12
15
18
22
27
0.6 ±0.10
0.6 ±0.10
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Sep 08, 2005 V.0
Product specification
7
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
Table 4 For NP0 500 V sizes from 0805 to 1812 (continued)
CAPACITANCE
(pF)
500 V
0805
1206
1210
1808
1812
33
39
47
56
68
0.6 ±0.10
0.6 ±0.10
82
100
120
150
180
0.85 ±0.10
220
270
330
0.85 ±0.10
1.25 ±0.20
390
470
0.85 ±0.10
1.15±0.15
560
680
820
1,000
1,200
1,500
1,800
2,200
2,700
3,300
3,900
4,700
5,600
6,800
8,200
10,000
0.8 ±0.10
1.15±0.15
1.25 ±0.20
1.25 ±0.20
1.25 ±0.20
1.25 ±0.20
1.15±0.15
1.25 ±0.20
NOTE
1. Values in shaded cells indicate thickness class in mm.
2. Capacitance range < 10 pF is on request.
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Sep 08, 2005 V.0
Product specification
8
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
CAPACITANCE RANGE & THICKNESS FOR X7R 100V
Table 5 For X7R 100 V sizes from 0805 to 1812
CAPACITANCE
(pF)
100 V
0603
0805
1206
1210
1808
1812
100
150
220
330
470
680
1,000
0.8 ±0.10
1,500
2,200
0.6 ±0.10
0.85 ±0.10
3,300
4,700
6,800
10,000
15,000
22,000
33,000
47,000
68,000
100,000
150,000
220,000
330,000
470,000
680,000
1,000,000
0.85 ±0.10
1.25 ±0.20
0.85 ±0.10
0.85 ±0.10
1.25 ±0.20
1.15±0.15
1.15±0.15
1.6 ±0.20
1.15±0.15
1.6 ±0.20
NOTE
1. Values in shaded cells indicate thickness class in mm.
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Sep 08, 2005 V.0
Product specification
9
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
CAPACITANCE RANGE & THICKNESS FOR X7R 200/250 V
Table 6 For X7R 200/250 V sizes from 0805 to 1812
CAPACITANCE
(pF)
200/250 V
0805
1206
1210
1808
1812
100
150
220
330
470
680
1,000
0.85 ±0.10
1,500
2,200
3,300
0.85 ±0.10
4,700
6,800
1.25 ±0.20
10,000
15,000
22,000
33,000
47,000
68,000
100,000
150,000
220,000
330,000
470,000
680,000
1,000,000
0.85 ±0.10
1.15±0.15
1.25 ±0.20
0.8 ±0.10
1.25 ±0.20
1.15±0.15
1.25 ±0.20
1.25 ±0.20
1.15±0.15
1.6 ±0.20
2.0 ±0.20
NOTE
1. Values in shaded cells indicate thickness class in mm.
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Sep 08, 2005 V.0
Product specification
10
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
CAPACITANCE RANGE & THICKNESS FOR X7R 500 V
Table 7 For X7R 500 V sizes from 0805 to 1812
CAPACITANCE
(pF)
500 V
0805
1206
1210
1808
1812
100
150
220
330
470
680
1,000
0.8 ±0.10
1,500
1.15±0.15
2,200
3,300
4,700
1.15±0.15
1.25 ±0.20
0.85 ±0.10
1.15±0.15
6,800
10,000
15,000
22,000
33,000
47,000
68,000
100,000
150,000
220,000
330,000
470,000
680,000
1,000,000
1.25 ±0.20
1.25 ±0.20
1.6 ±0.20
1.25 ±0.20
1.25 ±0.20
1.6 ±0.20
NOTE
1. Values in shaded cells indicate thickness class in mm.
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Sep 08, 2005 V.0
Product specification
11
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
THICKNESS CLASSES AND PACKING QUANTITY
Table 8
DESCRIPTION
SIZE
THICKNESS
8 mm TAPE WIDTH/AMOUNT PER REEL 12 mm TAPE WIDTH
/AMOUNT PER REEL
CODE CLASSIFICATION
(mm)
Ø180 mm, 7”
Blister
Ø330 mm, 13”
Paper
Paper
Blister Ø180 mm, 7” Blister
0603
0805
0.8 ±0.10
0.6 ±0.10
0.8 ±0.10
0.85 ±0.1
1.25 ±0.20
0.6 ±0.10
0.8 ±0.10
0.85 ±0.10
1.00 ±0.10
1.15 ±0.15
1.25 ±0.20
0.6 ±0.10
0.85 ±0.10
1.15 ±0.15
1.25 ±0.20
1.6 ±0.20
1.15 ±0.15
1.25 ±0.20
1.35 ±0.15
1.5 ±0.10
1.6 ±0.20
2.0 ±0.20
0.85 ±0.10
1.15 ±0.15
1.25 ±0.20
1.35 ±0.15
1.5 ±0.1
4,000
4,000
4,000
4,000
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
3,000
---
---
---
---
1206
4,000
4,000
4,000
---
20,000
---
---
---
---
---
---
---
15,000
---
---
---
3,000
3,000
3,000
4,000
4,000
3,000
3,000
2,000
---
10,000
10,000
---
---
---
---
---
---
---
---
1210
1808
---
---
15,000
10,000
10,000
---
---
---
---
---
---
---
---
Mid / High
voltage
---
---
---
---
---
---
---
---
---
---
1,500
3,000
1,000
1,000
2,000
2,000
2,000
1,500
1,000
1,000
1,000
1,000
2,000
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
1812
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
1.6 ±0.2
---
---
---
---
2.0 ±0.20
---
---
---
---
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Sep 08, 2005 V.0
Product specification
12
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
ELECTRICAL CHARACTERISTICS
NP0/X7R DIELECTRIC CAPACITORS; NISN TERMINATIONS
Unless otherwise stated all electrical values apply at an ambient temperature of 20±1 °C, an atmospheric
pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%.
Table 9
VALUE
DESCRIPTION
Capacitance range (1)
10 pF to 470 nF
Capacitance tolerance (1)
:
±5%
NP0
X7R
±10%
Dissipation factor (D.F.) (1)
:
NP0
X7R
≤ 0.1%
≤ 2.5%
Insulation resistance after 1 minute at Ur (DC)
R
ins ≥ 10 GΩ or Rins × C ≥ 500 seconds whichever is less
Maximum capacitance change as a function of temperature
(temperature characteristic/coefficient):
NP0
X7R
±30 ppm/°C
±15%
Operating temperature range:
NP0/X7R
–55 °C to +125 °C
NOTE
1. NP0: frequency = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms; frequency = 1 KHz for C > 1 nF, measuring at voltage 1 V
rms
X7R: frequency = 1 KHz for C ≤ 10 µF, measuring at voltage 1 V
.
rms
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Sep 08, 2005 V.0
Product specification
13
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
TESTS AND REQUIREMENTS
Table 10 Test condition, procedure and requirements
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Mounting IEC 60384- 4.3
21/22
The capacitors may be mounted on printed-circuit boards or
ceramic substrates
No visible damage
Visual
4.4
Any applicable method using × 10 magnification
In accordance with
specification
inspection and
dimension
check
Capacitance
4.5.1
NP0:
Within specified tolerance
f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C;
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
X7R:
f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C
Dissipation
factor (D.F.)
4.5.2
NP0: f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20
°C; f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
In accordance with
specification
X7R: f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20
°C
Insulation
resistance
4.5.3
At Ur (DC) for 1 minute
In accordance with
specification
Voltage proof
4.5.4.2
Test voltage (DC) applied for 1 minute
No breakdown or
flashover
Ur ≤ 100 V: 2.5 × Ur applied to NP0/X7R series
100 V < Ur ≤ 200 V: 1.5 × Ur +100 V applied to NP0/X7R series
200 V < Ur ≤ 500 V: 1.3 × Ur +100 V applied to NP0/X7R series
Ur > 500 V: 1.3 × Ur applied to NP0/X7R series
I: 7.5 mA
Temperature
characteristic
4.6
Between minimum and maximum temperature
NP0: l∆C/Cl: 30 ppm/°C
X7R: l∆C/Cl: 15%
Adhesion
4.15
A force applied for 10 seconds to the line joining the terminations
and in a plane parallel to the substrate
No visible damage
for size ≥ 0603: a force of 5 N applied
for size 0402: a force of 2.5 N applied
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Sep 08, 2005 V.0
Product specification
14
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
Table 10 Test condition, procedure and requirements (continued)
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Bond strength IEC 60384- 4.8
Mounting in accordance with IEC 60384-22 paragraph
4.3
No visible damage
21/22
of plating on
end face
Conditions: bending 1 mm at a rate of 1 mm/s, radius jig NP0: l∆C/Cl: ≤ 1% or 0.5 pF
340 mm
whichever is greater
X7R: l∆C/Cl: ≤ 10%
Resistance to
soldering heat
4.9
Precondition: 150 +0/–10 °C for 1 hour, then keep for
24 ±1 hours at room temperature
The termination shall be well tinned
NP0: l∆C/Cl: ≤ 0.5% or 0.5 pF
Preheating: for size ≤ 1206: 120 to 150 °C for 1 minute
whichever is greater
Preheating: for size >1206: 100 to 120 °C for 1 minute
and 170 to 200 °C for 1 minute
X7R: l∆C/Cl: ≤ 10%
D.F.: within initial specified value
Rins: within initial specified value
Solder bath temperature: 260 ±5 °C
Dipping time: 10 ±0.5 seconds
Recovery time: 24 ±2 hours.
Solderability
4.10
4.11
Unmounted chips completely immersed in a solder bath
at 235 ±5 °C
The termination shall be well
tinned.
Dipping time: 2 ±0.5 seconds
Depth of immersion: 10 mm
Rapid change
of
temperature
Preconditioning;
150 +0/–10 °C for 1 hour, then keep for 24 ±1 hours at
room temperature
No visual damage
NP0: l∆C/Cl: ≤ 1% or 1 pF
whichever is greater
X7R: l∆C/Cl: ≤ 15%
5 cycles with following detail:
30 minutes at lower category temperature;
30 minutes at upper category temperature
D.F.: within initial specified value
Rins: within initial specified value
Recovery time 24 ±2 hours.
Damp heat,
with Ur load
4.13
Initial measurements; after 150 +0/-10 °C for 1 hour,
then keep for 24 ±1 hours at room temperature
NP0: l∆C/Cl: ≤ 2% or 1 pF
whichever is greater
Duration and conditions: 500 ±12 hours at 40 ±2 °C;
90 to 95% RH; Ur applied
X7R: l∆C/Cl: ≤ 15%
NP0: D.F.: 2 × initial value max.
Final measurement: perform a heat treatment at
150 +0/–10 °C for 1 hour, final measurements shall be
carried out 24 ±1 hours after recovery at room
temperature without load.
X7R ≥ 100 V: D.F. ≤ 5%
NP0: Rins ≥ 2,500 MΩ or Rins × Cr
≥ 25 seconds, whichever is less
X7R: Rins ≥ 500 MΩ or Rins × Cr ≥
25 seconds, whichever is less
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Sep 08, 2005 V.0
Product specification
15
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
Table 10 Test condition, procedure and requirements (continued)
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Endurance IEC 60384- 4.14
21/22
Preconditioning;
Initial measurements; after 150 +0/-10 °C for 1 hour,
then keep for 24 ±1 hours at room temperature
NP0: l∆C/Cl: ≤ 2% or 1 pF whichever
is greater
X7R: l∆C/Cl: ≤ 15%
Duration and conditions: 1,000 ±12 hours at upper
category temperature with 1.5 × Ur voltage applied
NP0: D.F.: 2 × initial value max.
X7R ≥ 100 V: D.F. ≤ 5%
Final measurement: perform a heat treatment at 150
+0/–10 °C for 1 hour, final measurements shall be
carried out 24 ±1 hours after recovery at room
temperature without load.
NP0: Rins ≥ 4,000 MΩ or Rins × Cr ≥
40 seconds, whichever is less
X7R: Rins ≥ 1,000 MΩ or Rins × Cr ≥
50 seconds, whichever is less
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Sep 08, 2005 V.0
Product specification
16
16
NP0/X7R 100 V to 500 V
Mid-voltage
Surface-Mount Ceramic Multilayer Capacitors
REVISION HISTORY
REVISION DATE
CHANGE NOTIFICATION DESCRIPTION
Version 0
Sep 08, 2005
-
- New
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Sep 08, 2005 V.0
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