HT318 [YONGFUKANG]
75W PBTL/40W BTL Class D Audio Amplifier with AM Suppression;型号: | HT318 |
厂家: | Shenzhenshi YONGFUKANG Technology co.,LTD |
描述: | 75W PBTL/40W BTL Class D Audio Amplifier with AM Suppression |
文件: | 总22页 (文件大小:2166K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HT318
立体声 D 类音频功放
具有AM抑制功能的75W PBTL/40W BTL D类音频功放
◼ 特点
◼ 概述
HT318是一款高效D类音频功率放大器。在24V
・输出功率(BTL模式)
供电的立体声(BTL)模式下,能够持续提供2*40W/8Ω
功率输出;在单声道(PBTL)模式下,能够持续提供
75W/4Ω功率输出。
2×40W (VDD=24V, RL=8Ω, THD+N=10%)
2×30W (VDD=16V, RL=4Ω, THD+N=10%)
・输出功率(PBTL模式)
HT318具有丰富的功率限制功能,以满足各类应
用。一种是功率限制功能(PCLP),即在输出端限制
其最大输出摆幅低于设定值,可避免意外的超额输出
功率损坏喇叭。另一种为自动增益控制功能(AGC),
开启后,可有效改善因输入幅度过大或者电源电压降
低造成的破音失真。
75W (VDD=24V, RL=4Ω, THD+N=10%)
・单电源系统,4.5V-26V宽电压输入范围
・超过90%效率; BD和1SPW两种调制方式选择
・可设置功率限制功能(PCLP)以及AGC功能
・多重开关频率选择,具有AM抑制功能;
・主从同步模式
HT318具有过温限幅功能(TFB),在高功率输出、
高环境温度等条件下导致芯片内温度较高时,芯片自
动降低系统增益,避免芯片进入过温关断保护功能,
使其能够连续播放而不间断。
・模拟差分/单端输入,输出模式立体声/单声道可选
・保护功能:过温限幅功能,过压/过流/过热/欠压
异常,直流检测和短路保护
HT318还具有多开关频率可选,以抑制AM干扰;
使用主从模式时,还可实现多个器件的同步。
・无铅无卤封装,QFN36L
此外,HT318内置关断功能使待机电流最小化,
还集成了过温限幅功、过压保护、直流保护、短路保
护、热保护和电源欠压异常保护等功能,可全面防止
出现故障。
◼ 应用
・条形音箱
・便携式音箱
・拉杆音箱
・无线智能音箱
・消费类音频应用
・LCD电视/监视器
◼ 订购信息
料号
封装形式
打标
工作温度范围
外包装/最小起订量
HT318SQ
UVWXYZ
Tape and Reel
2500PCS
HT318SQER
QFN36L
-40℃~85℃
1
1
UVWXYZ 表示内部生产跟踪码
-1-
03/2019 – V0.6
TEL:0755-82863877 13242913995 E-MAIL:panxia168@126.com http://www.szczkjgs.com
HT318
立体声 D 类音频功放
◼ 引脚信息
28
29
36 35 34 33 32 31 30
27
26
25
BSA+
1
2
3
4
5
6
INA+
INA-
OUTA+
OUTA-
SFT_CLIP
GVDD
24 BSA-
23 PGND
22 BSB-
GAIN/SLV
LIM
EP
7
8
GGND
INB-
21 OUTB-
20 OUTB+
19 BSB+
9
INB+
12
15
17 18
16
10
13 14
11
正视图
Pin No.
Name
INA+
I/O2
Description
1
2
3
I
I
I
A通道正端音频输入
A通道负端音频输入
设置输出最大限幅值
INA-
SFT_CLIP
GVDD
GAIN/SLV
LIM
4
O
I
I
内部整流输出,接1uF电容到地
增益设置,或选择主从模式.
选择功率限制或AGC功能
栅极驱动地
5
6
7
8
GGND
INB-
G
I
B通道负端音频输入
9
INB+
I
B通道正端音频输入
10
11
12
13
AM0
I
D类调制频率选择
AM1
AM2
I
I
D类调制频率选择
D类调制频率选择
静音设置,引脚拉高是功放静音
MUTE
I
多器件同步时,时钟的输入输出脚,作为输入还是输出取决于
GAIN/SLV
模拟电源输入端
14
SYNC
IO
15
16,17,18
19
AVDD
PVDDB
BSB+
P
P
B通道功率电源供电
Boot Strap端,接220nF电容到OUTB+
BST
2
I: 输入; O: 输出; G: 地; P: 电源; BST: 自举
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3/2019 – V0.6
HT318
立体声 D 类音频功放
20
21
22
OUTB+
OUTB-
BSB-
O
O
BST
G
B通道输出正端
B通道输出负端
Boot Strap端,接220nF电容到OUTB-
功率地
23
PGND
BSA-
24
BST
O
O
Boot Strap端,接220nF电容到OUTA-
A通道输出负端
25
26
OUTA-
OUTA+
BSA+
PVDDA
AVDD
GGND
NC
A通道输出正端
27
28,29,30
31
BST
P
Boot Strap端,接220nF电容到OUTA+
A通道功率电源供电
模拟电源供电
P
G
-
32
33
栅极驱动地
内部无连接,可连接至地
34
MODE
I
D类调制模式选择,低时选择BD模式,高时选择1SPW模式
关断控制输入,低电平芯片处于低功耗状态;高电平芯片正常工
作
35
\SD
I
36
EP
\FAULT
O
功放错误检测输出,当芯片内部检测到错误,输出低电平
芯片底部裸焊盘,请接电源地
PowerPad
G
◼ 典型应用
INA+
INA-
INB-
SPEAKER A
BSTRPA+
OUTA+
Right
Filter
Filter
OUTA-
PBTL
Detect
Left
BSTRPA-
Audio Source and
Control
INB+
\SD
SPEAKER B
MUTE
BSTRPB+
OUTB+
HT318
Filter
Filter
FAULT
Modulation Frequency Select
Gain Select and Master/Slave setting
Limiter Level Select
AM[2:0]
OUTB-
BSTRPB-
GAIN_SLV
SFT_CLIP
LIM
Power Limit Mode Select
Modulation Mode Select
MODE
PVDD
AVDD
Power Supply
4.5-26V
Synchronization or Not
SYNC
-3-
3/2019 – V0.6
HT318
Stereo Class D Audio Amplifier
75W PBTL/40W BTL Class D Stereo Amplifier with AM Avoidance
◼ FEATURE
◼ GENERAL DESCRIPTION
HT318 is a stereo efficient, Class-D audio amplifier for
driving speakers up to 75W/4 Ω in mono PBTL. It can
also deliver 2×30W/8Ω power in stereo BTL.
・Output Power (BTL)
2×40W (VDD=24V, RL=8Ω, THD+N=1%)
2×30W (VDD=16V, RL=4Ω, THD+N=10%)
・Output Power (PBTL)
HT318 features 2 different power limit functions. One is
power clipper (PCLP), which can clip the output voltage
under a preset level; another one is AGC which can
limit the output music under a preset level without
clipping.
75W (VDD=24V, RL=4Ω, THD+N=10%)
・Single Wide Voltage Supply: 4.5V-26V
・Efficiency > 90%; BD and 1SPW Modulation
・Optional Power Limit Functions: AGC and Power
Clipper (PCLP)
Thermal Foldback (TFB) function is designed to protect
HT318 from excessive die temperature in case of the
device being operated beyond the recommended
temperature or power, or with a weak thermal system,
without shutting the device down.
・Multiple Switching Frequency with AM Avoidance
・Master and Slave Synchronization
・Differential / Single-ended Analog Input, BTL or
PBTL Output
・Integrated Self-protection Circuits Including Thermal
Multiple switching Frequency is selectable for HT318 to
avoid AM interferences. HT318 also can be worked in
either master or slave, making it possible to synchronize
multiple devices.
Foldback (TFB) and Overvoltage, Undervoltage,
Overtemperature, DC-detect, Overcurrent with Error
Reporting
・LF and HF Package of QFN36L
HT318 is fully protected against faults with
Overvoltage, Undervoltage, Overtemperature, DC-
detect, and Overcurrent protection. Faults can be
reported to the processor to prevent devices from being
damaged
◼ APPLICATIONS
・Sound Bars
・Wireless Speakers
・Consumer Audio Applications ・TVs/Monitors
◼ ORDERING INFORMATION
Operating
Temperature Range
MOQ/Shipping
Package
Part Number
HT318SQER
Package Type
QFN36L
Marking
HT318SQ
UVWXYZ
Tape and Reel
2500PCS
-40℃~85℃
1
1
UVWXYZ is production tracking code
-4-
3/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
◼ TERMINAL CONFIGURATION
28
29
36 35 34 33 32 31 30
27
26
25
BSA+
1
2
3
4
5
6
INA+
INA-
OUTA+
OUTA-
SFT_CLIP
GVDD
24 BSA-
23 PGND
22 BSB-
GAIN/SLV
LIM
EP
7
8
GGND
INB-
21 OUTB-
20 OUTB+
19 BSB+
9
INB+
12
15 17 18
16
10
13 14
11
Top View
Pin No.
Name
INA+
INA-
I/O1
Description
Positive input terminal for A channel
Negative input terminal for A channel
Sets the maximum output voltage before clipping (Limiter Level)
Voltage regulator derived from PVDD supply, connect 1uF to GND
(NOTE: This pin is provided as a connection point for filtering
capacitors for this supply and must not be used to power any external
circuitry)
1
2
3
I
I
I
SFT_CLIP
4
GVDD
O
Selects gain and selects between Master and Slave mode depending
on pin voltage divider.
Selects the mode of Power Clipper or AGC
Ground for gate drive circuitry (this terminal should be connected to
the system ground)
5
6
7
GAIN/SLV
LIM
I
I
GGND
G
8
9
10
11
12
13
INB-
INB+
AM0
AM1
AM2
I
I
I
I
I
I
Negative input terminal for B channel
Positive input terminal for B channel
AM Avoidance Frequency Selection
AM Avoidance Frequency Selection
AM Avoidance Frequency Selection
MUTE
Mute control terminal, the amplifier is muted when it is pulled high
Clock input/output for synchronizing multiple class-D devices.
Direction determined by GAIN/SLV terminal.
Analog power supply
14
15
SYNC
AVDD
IO
P
1
I: Input; O: Output; G: Ground; P: Power; BST: Boot Strap
-5-
03/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
16,17,18
19
PVDDB
BSB+
P
Power Supply for amplifier drivers of B channel
Connection point for the OUTB+ bootstrap capacitor, which is used
to create a power supply for the high-side gate drive for OUTB+
Positive pin for differential speaker amplifier output B
Negative pin for differential speaker amplifier output B
Connection point for the OUTB- bootstrap capacitor, which is used
to create a power supply for the high-side gate drive for OUTB-
Power ground, make sure connect it to the system ground
Connection point for the OUTA- bootstrap capacitor, which is used
to create a power supply for the high-side gate drive for OUTA-
Negative pin for differential speaker amplifier output A
Positive pin for differential speaker amplifier output A
Connection point for the OUTA+ bootstrap capacitor, which is used
to create a power supply for the high-side gate drive for OUTA
Power Supply for amplifier drivers of A channel
BST
20
21
OUTB+
OUTB-
O
O
22
23
24
BSB-
PGND
BSA-
BST
G
BST
25
26
OUTA-
OUTA+
O
O
27
BSA+
BST
28,29,30
31
PVDDA
AVDD
P
P
Analog power supply
Ground for gate drive circuitry (this terminal should be connected to
the system ground)
32
GGND
G
Not connected inside the device (all "no connect" pins should be
connected to ground for best thermal performance, however they can
be used as routing channels if required.)
33
NC
-
Mode selection logic input (LOW = BD mode, HIGH = 1 SPW
mode). TTL logic levels with compliance to AVCC
Place the speaker amplifier in shutdown mode while pulled down.
Speaker amplifier fault terminal, which is pulled LOW when an
internal fault occurs
34
35
36
EP
MODE
\SD
I
I
\FAULT
PowerPad
O
G
Connect to GND for best system performance.
◼ TYPICAL APPLICATION
INA+
INA-
INB-
SPEAKER A
BSTRPA+
OUTA+
Right
Filter
Filter
OUTA-
PBTL
Detect
Left
Audio Source and
Control
BSTRPA-
INB+
\SD
SPEAKER B
MUTE
BSTRPB+
OUTB+
HT318
Filter
Filter
FAULT
Modulation Frequency Select
Gain Select and Master/Slave setting
Limiter Level Select
AM[2:0]
OUTB-
BSTRPB-
GAIN_SLV
SFT_CLIP
LIM
Power Limit Mode Select
Modulation Mode Select
MODE
PVDD
AVDD
Power Supply
4.5-26V
Synchronization or Not
SYNC
-6-
03/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
◼ SPECIFICATIONS1
⚫ Absolute Maximum Ratings2
PARAMETER
Symbol
VDD
VI
MIN
-0.3
MAX
30
UNIT
Supply voltage range (PVDD, AVDD)
V
V
V
V
Input voltage range (INA+, INA-, INB+, INB-)
Input voltage range (SFT_CLIP, GAIN/SLV, LIM, SYNC)
Input voltage range (AM0, AM1, AM2, MUTE, \SD, MODE)
-0.3
-0.3
-0.3
5.8
VI
GVDD
AVDD
VI
Operating temperature range
Operating junction temperature range
Storage temperature range
TA
TJ
-40
-40
-50
85
℃
℃
℃
150
150
TSTG
⚫ Recommended Operating Conditions
PARAMETER
Symbol
CONDITION
PVDD, AVDD
MIN
4.5
TYP
25
MAX
26
UNIT
Supply voltage range
VDD
V
℃
V
Operating temperature
High-level input voltage
Low-level input voltage
Low-level output voltage
Ta
VIH
VIL
-40
2
85
AMx, MUTE, \SD, SYNC, MODE
AMx, MUTE, \SD, SYNC, MODE
\FAULT
0.8
0.8
V
VOL
V
AMx, MUTE, \SD, MODE (VI = 2V, VDD
= 18V)
High-level input current
IIH
50
uA
Load impedance (BTL)
Load impedance (PBTL)
RL
With output filter (10uH, 680nF)
With output filter (10uH, 1uF)
3.2
1.6
4
2
Ω
Ω
RL
⚫ DC Electrical Characteristics
Conditions: TA = 25℃, VDD = 4.5-26V, Load = 4ohm, unless otherwise specified.
PARAMETER
Symbol
CONDITION
VI = 0V, Gain = 36dB
MIN
TYP
1.5
20
32
13
13
50
50
36
32
26
20
36
32
26
20
10
2
MAX
UNIT
mV
mA
mA
mA
mA
uA
uA
dB
dB
dB
dB
dB
dB
dB
dB
ms
us
Class Output Offset Voltage
VOS
VDD = 12V, No Load
Quiescent supply current
IDD
IMUTE
ISD
VDD = 24V, No Load
VDD = 12V, With Load
VDD = 24V, With Load
VDD = 12V, With Load
VDD = 24V, With Load
RP = open, RD = 5.6kΩ
RP = 100kΩ, RD = 20kΩ
RP = 100kΩ, RD = 39kΩ
RP = 75kΩ, RD = 47kΩ
RP = 51k, RD = 51kΩ
RP = 47kΩ, RD = 75kΩ
RP = 39kΩ, RD = 100kΩ
RP = 16kΩ, RD = 100kΩ
Pull \SD high or power on
Pull \SD low
Quiescent supply current in
Mute mode
Quiescent supply current in
SD mode
35
31
25
19
35
31
25
19
37
33
27
21
37
33
27
21
System Gain in master mode
(BTL or PBTL)
Gain
Gain
System Gain in slave mode
(BTL or PBTL)
Turn-on time
ton
toff
Turn-off time
Gate drive supply
GVDD
5.5
V
1
2
Depending on parts and PCB layout, characteristics may be changed.
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is
not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
-7-
03/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
⚫ AC Electrical Characteristics
Conditions: TA = 25℃, VDD = 4.5-26V, Load = Filter + RL, Filter = 10uH + 680nF, RL = 4Ω + 22uH, fIN = 1 kHz, Gain = 26dB, CIN
= 1uF, 20-20kHz, Power Limit off, BD mode, unless otherwise specified.
PARAMETER
Symbol
CONDITION
MIN
TYP
14
17
8
MAX
UNIT
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
THD +N = 1%
THD+N = 10%
VDD = 12V, RL =
4Ω+22uH, BTL
VDD = 12V, RL =
8Ω+33uH, BTL
10
26
30
15
18
23
28
33
40
36
45
28
35
45
55
60
75
VDD = 16V, RL =
4Ω+22uH, BTL
VDD = 16V, RL =
8Ω+33uH, BTL
VDD = 20V, RL =
8Ω+33uH, BTL
Continuous output power
PO
VDD = 24V, RL =
8Ω+33uH, BTL
VDD = 16V, RL =
3Ω+22uH, PBTL
VDD = 16V, RL =
4Ω+22uH, PBTL
VDD = 20V, RL =
4Ω+22uH, PBTL
VDD = 24V, RL =
4Ω+22uH, PBTL
Total harmonic distortion +
noise
THD+N
Po = 1W, VDD = 18V, RL = 8Ω
0.02
%
RL = 4Ω, BTL
92
94
%
%
VDD = 12V,
THD+N = 10%
RL = 8Ω, BTL
RL = 8Ω, BTL
VDD = 20V,
THD+N = 10%
VDD = 16V,
THD+N = 10%
Efficiency
η
94
95
%
%
RL = 4Ω, PBTL
Cross Talk
CT
VN
Vo = 1Vrms, Gain = 20dB
A-weighted, Gain = 20 dB
A-weighted, Gain = 20 dB, Po = 1W
200mVpp 1kHz, Input grounded
AM2=0, AM1 = 0, AM0 = 0
AM2=0, AM1 = 0, AM0 = 1
AM2=0, AM1 = 1, AM0 = 0
AM2=0, AM1 = 1, AM0 = 1
AM2=1, AM1 = 0, AM0 = 0
AM2=1, AM1 = 0, AM0 = 1
AM2=1, AM1 = 1, AM0 = 0
AM2=1, AM1 = 1, AM0 = 1
-95
100
85
dB
uV
Output integrated noise
Signal-to-noise ratio
Power supply rejection ratio
SNR
PSRR
dB
-75
400
500
600
dB
kHz
kHz
kHz
Oscillator frequency
fosc
Reserved
Over temperature protection
trigger point
OTP
160
℃
Thermal holdback trigger
point
Over current trip point
TFB
150
7.5
℃
OCP
A
-8-
03/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
◼ TYPICAL OPERATING CHARACTERISTICS
TA = 25°C, BTL mode, AM1 = AM2 = L, MODE = L, fIN = 1 kHz, unless otherwise noted. Output filter is used as 10 μH and
0.68 μF, unless otherwise noted.
Po vs THD+N (VDD = 12V, Load = 4ohm)
-9-
03/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
Po vs THD+N (VDD = 24V, Load = 8ohm)
fIN vs THD+N (VDD = 24V, Load = 8ohm, Po = 1W)
-10-
03/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
fIN vs THD+N (VDD = 12V, Load = 4ohm, Po = 1W)
-11-
03/2019 – V0.6
HT318
Class D Stereo Audio Amplifier
◼ APPLICATION INFORMATION
1. Power Supply
The power supply for the HT318 only require one voltage from 4.5V to 26V, which supplies the analog circuitry (AVDD)
and the power stage (PVDD)
The AVDD supply feeds internal LDO including GVDD. This LDO output is connected to external pins for filtering
purposes, but should not be connected to external circuits. The filtering capacitor for GVDD is recommended to be 1uF.
A filtering capacitor of 1uF for AVDD is also needed.
The PVDD (pin16, 17, 18) feeds the power stage of B channel and the PVDD (pin28, 29, 30) feeds the power stage of
A channel. Filtering capacitors of 100nF//1uF//220uF for PVDD of each channel should be placed close to the PVDD
pin.
2.
Class D Modulation (MODE pin)
HT318 can run in either BD modulation or 1SPW modulation, which is determined by MODE pin.
2.1 BD modulation
BD modulation is selected once MODE pin is pulled low.
This is a modulation scheme that allows operation without the classic LC reconstruction filter when the amp is driving
an inductive load with short speaker wires. Each output is switching from 0 volts to the supply voltage.
The OUT+ and OUT- are in phase with each other with no input so that there is little or no current in the speaker. The
duty cycle of OUT+ is greater than 50% and OUT- is less than 50% for positive output voltages.
The duty cycle of OUT+ is less than 50% and OUT- is greater than 50% for negative output voltages. The voltage across
the load sits at 0V throughout most of the switching period, reducing the switching current, which reduces any I2R
losses in the load.
2.2 1SPW modulation
1SPW modulation is selected once MODE pin is pulled high.
The 1SPW mode alters the normal modulation scheme in order to achieve higher efficiency with a slight penalty in THD
degradation and more attention required in the output filter selection.
In 1SPW mode the outputs operate at ~15% modulation during idle conditions. When an audio signal is applied one
output will decrease and one will increase. The decreasing output signal will quickly rail to GND at which point all the
audio modulation takes place through the rising output. The result is that only one output is switching during a majority
of the audio cycle.
Efficiency is improved in this mode due to the reduction of switching losses. The THD penalty in 1SPW mode is
minimized by the high-performance feedback loop. The resulting audio signal at each half output has a discontinuity
each time the output rails to GND. This can cause ringing in the audio reconstruction filter unless care is taken in the
selection of the filter components and type of filter used.
3.
Power Limit Function
There are two different power limit functions for HT318, one is Automatic Gain Control (AGC), the other is Power
Clipper (PCLP). The function can be selected by setting the LIM pin.
3.1 Power Limit Mode (LIM pin)
The LIM pin configuration is shown as Figure 1 and Table. 1.
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Class D Stereo Audio Amplifier
GVDD
LIM
RP
RD
HT318
Figure 1 LIM Terminal Configuration
Table. 1 LIM Terminal Settings
Voltage of LIM Terminal Power Limit Mode Attack Time TA (us/dB) Release Time TR (ms/dB)
GVDD
2/3 GVDD
1/3 GVDD
GND
AGC FAST
AGC MEDIUM
AGC SLOW
PCLP
80
160
320
400
800
1600
/
If the AGC function is selected, the output music can be limited below the preset Limiter Level (see pin SFT_CLIP).
If the output audio signal exceeds the Limiter Level, HT318 decreases amplifier gain by the rate of attack time by
0.25dB per step (step pace). HT318 increases the gain by the rate release time by 0.25dB/step (step pace) once the
output audio is below the limiter level. Figure 2 shows this relationship.
The AGC function don’t clip the output wave while limiting the output power. It can remove the output clipping noise
and protect the speakers caused by a reduction of power supply voltage or a sudden large volume of input music.
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Figure 2 AGC Function Description
The HT318 also has a power clipper function (PLCP) that can be used to clip the output voltage level below the
supply rail. The PLCP function can be selected by pulling LIM pin down into system ground, shown as Table. 1 LIM
Terminal Settings.
When PLCP function is active, the amplifier operates as if it was powered by a lower supply voltage, and thereby
enters into clipping sooner than if the circuit was not active. The result is clipping behavior very similar to that of
clipping at the PVDD rail, in contrast to the digital clipper behavior which occurs in the oversampled domain of the
digital path. The point at which clipping begins is called the Limiter Level (see pin SFT_CLIP).
To move the output stage into clipping, the PCLP function limits the duty cycle of the output PWM pulses to a fixed
maximum value. After filtering this limit applied to the duty cycle resembles a clipping event at a voltage below that
of the PVDD level.
Figure 3 PCLP Function Description
3.2 Limiter Level Configuration (SFT_CLIP pin)
The Limiter Level is controlled by a resistor divider from GVDD (around 5.5V) to ground, which sets the voltage at the
SFT_CLIP pin (VSFT_CLIP). The Limiter Level is approximately 4 times the voltage at the SFT_CLIP pin, noted as
VSFT_CLIP.
Limiter Level ≈ 4 × VSFT_CLIP
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The precision of the threshold at which clipping occurs is dependent upon the voltage level at the SFT_CLIP pin.
Because of this, increasing the precision of the resistors used to create the voltage divider, or using an external reference
will increase the precision of the point at which the device enters into clipping. To ensure stability, and soften the edges
of the clipping event, a capacitor should be connected from pin SFT_CLIP to ground.
GVDD
RP
SFT_CLIP
RD
1uF
HT318
Figure 4 SFT_CLIP Terminal Configuration
If LIM pin is connected to GND, and SFT_CLIP pin is directly connected to GVDD, neither function of AGC nor PCLP
is selected.
4.
AM Avoidance EMI Reduction (AM0, AM1 pin)
To reduce interference in the AM radio band, the HT318 has the ability to change the switching frequency via AM1
AM0 pins. The recommended frequencies are listed in Table. 2.
Table. 2 Switching Frequency Settings
Switching Frequency (kHz)
AM2:AM1:AM0
400
500
000 (default)
001
600
010
Reserved
011
100
101
110
111
5.
Gain Setting and Master and Slave (GAIN/SLV pin)
In order to select the amplifier gain setting, the designer must determine the maximum power target and the speaker
impedance. Once these parameters have been determined, calculate the required output voltage swing which delivers
the maximum output power.
Choose the lowest analog gain setting that corresponds to produce an output voltage swing greater than the required
output swing for maximum power. The analog gain can be set by selecting the voltage divider resistors (RP and RD) on
the Gain pin.
Master or Slave mode is also controlled by this pin. Notice that a gain or mode changing by this pin will be not effective
when the amplifier is working.
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GVDD
RP
GAIN/SLV
RD
1uF
HT318
Figure 5 GAIN/SLV Terminal Configuration
Table. 3 GAIN/SLV Terminal Settings
RP (Ω)
NC
100k
100k
75k
51k
47k
39k
16k
RD (Ω)
5.6k
20k
39k
47k
51k
75k
100k
100k
Gain (dB)
Master or Slave Mode
Master
36
32
26
20
36
32
26
20
Master
Master
Master
Slave
Slave
Slave
Slave
6.
Amplifier Input and Output
6.1 Amplifier Input Configuration
HT318 is an amplifier with analog input (single-ended or differential). For a differential operation, input signals into
IN+ and IN- pins via DC-cut capacitors (CIN). The high pass cut-off frequency of input signal can be calculated by
1
fc =
.
2πRINCIN
For a single-ended operation, input signals to IN+ pin via a DC-cut capacitor (CIN). IN- pin should be connected to
ground via a DC-cut capacitor (with the same value of CIN).
Front Circuit
HT318
IN+
Front Circuit
ZOUT
HT318
IN+
CIN
CIN
ZOUT
IN-
IN-
1uF
1uF
Figure 6 (1) Differential Input;
(2) Single-ended Input
The input impedance changes with the gain setting from 9kohm to 60kohm as Table 4. If a flat bass response is
required down to 20 Hz the recommended cut-off frequency is a tenth of that, 2 Hz. Table 4 lists the recommended
ac-couplings capacitors for each gain step. If a -3 dB is accepted at 20 Hz 10 times lower capacitors can used –
for example, a 1μF can be used.
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Class D Stereo Audio Amplifier
Table. 4 RIN vs GAIN vs CIN
Gain (dB)
RIN (kΩ)
CIN(uF)
10
5.6
3.3
1.5
fc(Hz)
1.8
1.9
1.6
1.8
36
32
26
20
9
15
30
60
6.2 Amplifier Output Configuration
The HT318 has been tested with a simple ferrite bead filter for a variety of applications including long speaker
wires up to 20 cm and high power. One important aspect of the ferrite bead selection is the type of material used
in the ferrite bead. Not all ferrite material is alike, so it is important to select a material that is effective in the 10 to
100 MHz range which is key to the operation of the class-D amplifier. The impedance of the ferrite bead can be
used along with a small capacitor with a value in the range of 1000 pF to reduce the frequency spectrum of the
signal to an acceptable level. For best performance, the resonant frequency of the ferrite bead/ capacitor filter
should be less than 10 MHz. Also, the filter capacitor can be increased if necessary, with some impact on efficiency.
Figure 7 Output Filters with Ferrite Beads
There may be a few circuit instances where it is necessary to add a complete LC reconstruction filter. These
circumstances might occur if there are nearby circuits which are sensitive to noise. In these cases, a classic second
order Butterworth filter similar to those shown in the figures below can be used.
Some systems have little power supply decoupling from the AC line but are also subject to line conducted
interference (LCI) regulations. These include systems powered by "wall warts" and "power bricks." In these cases,
LC reconstruction filters can be the lowest cost means to pass LCI tests. Common mode chokes using low
frequency ferrite material can also be effective at preventing line conducted interference.
Figure 8 Output Filters with LC
6.3 PBTL Mode Configuration
The HT318 can be configured to drive a single speaker with the two output channels connected in parallel. This mode
of operation is called Parallel Bridge Tied Load (PBTL) mode. This mode of operation effectively reduces the output
impedance of the amplifier in half, which in turn reduces the power dissipated in the device due to conduction losses
through the output FETs. Additionally, since the output channels are working in parallel, it also doubles the amount of
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Class D Stereo Audio Amplifier
current the speaker amplifier can source before hitting the over-current error threshold.
To place the HT318 into PBTL Mode, the PBTL pin should be pulled HIGH (that is, connected to the DVDD supply
through a pull-up resistor). If the device is to operate in BTL mode instead, the PBTL pin should be pulled LOW, that
is connected to the system supply ground. When operated in PBTL mode, the output pins should be connected as shown
in the Typical Application Circuit Diagrams.
In PBTL mode, the amplifier selects its source signal from the A channel of the stereo signal.
7.
Startup, Shutdown and Mute Operation
The HT318 employs a shutdown mode of operation designed to reduce supply current (IDD) to the absolute minimum
level during periods of nonuse for power conservation. The \SD input terminal should be held high during normal
operation when the amplifier is in use. Pulling \SD low will put the outputs to mute and the amplifier to enter a low-
current state. It is not recommended to leave \SD unconnected, because amplifier operation would be unpredictable.
For a better power on and power-off pop performance, place the amplifier in the shutdown mode prior to delivering or
removing the power supply.
The HT318 also has a mute function in which the differential output is grounded through resistivity. The MUTE terminal
should be held low in normal operation. Pulling MUTE high will put HT318 into MUTE mode. The noise of placing
the amplifier in and out of mute mode will be lower than shutdown mode.
8.
Other Functions and Terminals
8.1 GVDD Supply
The GVDD Supply is used to power the gates of the output full bridge transistors. It can also be used to supply the
SFT_CLIP, LIM and GAIN voltage dividers. Decouple GVDD with a X5R ceramic 1 μF capacitor to GND. The GVDD
supply is not intended to be used for external supply. It is recommended to limit the current consumption by using
resistor voltage dividers for GAIN and SFT_CLIP of 100 kΩ or more.
8.2 BSAx和BSBx Capacitors
The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the high
side of each output to turn on correctly. A 220nF ceramic capacitor of quality X5R or better, rated for at least 16 V,
must be connected from each output to its corresponding bootstrap input. The bootstrap capacitors connected between
the BSxx pins and corresponding output function as a floating power supply for the high-side N-channel power
MOSFET gate drive circuitry. During each high-side switching cycle, the bootstrap capacitors hold the gate-to-source
voltage high enough to keep the high-side MOSFETs turned on.
9.
Protection Functions
The HT318 contains a complete set of protection circuits carefully designed to make system design efficient as well as
to protect the device against any kind of permanent failures due to short circuits, overload, over temperature, and
under-voltage.
9.1 Over Temperature Protection (OTP)
This is the function to establish the over temperature protection mode when detecting excessive high
temperature of HT318. When the on-die temperature of HT318 is higher than TOP, the OTP mode is activated,
the differential output pin becomes weak low state (a state grounded though resistivity).
9.2 Foldback (TFB) Function
The HT318 Thermal Foldback, TFB, is designed to protect the HT318 from excessive die temperature in case of the
device being operated beyond the recommended temperature or power limit, or with a weaker thermal system than
recommended, without shutting the device down.
The TFB works by reducing the on-die power dissipation by reducing the HT318 system gain by the rate of attack
time (default value 1200ms/dB) by 0.25dB per step (step pace) if the TFB trig point is exceeded. Once the die
temperature drops below the TFB trig point, the HT318 gain is increased by a single or by the rate of release time
(default value 2400ms/dB) by 0.25dB per step (step pace) until the TFB trig point, or a maximum attenuation is
reached, and the system gain will be decreased again, or the system gain is at its nominal gain level. The procedure
shows as follows.
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HT318
Class D Stereo Audio Amplifier
Input Singal
GAIN
Release Time
Attack Time
Die Temperature
Thermal Foldback Trip Point
Output Singal
Figure 9 TFB Operation
9.3
DC Detect Protection (DCP)
The HT318 has circuitry which will protect the speakers from DC current which might occur due to an internal
amplifier error.
A DCE event occurs when the output differential duty-cycle of either channel exceeds 60% for more than 420 msec at
the same polarity. The table below shows some examples of the typical DCE Protection threshold for several values of
the supply voltage. This feature protects the speaker from large DC currents or AC currents less than 2 Hz.
The minimum output offset voltages required to trigger the DC detect are listed in Table. 2. The outputs must remain at
or above the voltage listed in the table for more than 420 msec to trigger the DC detect.
Table. 5 DC Detect Threshold
PVDD (V)
|VOS| (V)
0.96
1.3
4.5
6
12
18
2.6
3.9
9.4 Short-Circuit Protection (OCP)
The HT318 has protection from over current conditions caused by a short circuit on the output stage. The amplifier
outputs are switched to a high impedance state when the short circuit protection latch is engaged.
9.5 Under-Voltage Protection(UVP)
This is the function to establish the under-votage protection mode when power supply becomes lower than
the detection voltage VUVLL, and the protection mode is canceled when the power supply becomes higher
than the threshold voltage VUVLH. In the under-voltage protection mode, the differentrial output pin becomes
weak low state (a stage grounded through resistivity). HT318 will start up within start-up time when the under-
voltage protection mode is cancelled.
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Class D Stereo Audio Amplifier
10.
Typical Applications
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HT318
Class D Stereo Audio Amplifier
11.
PCB Layout
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HT318
Class D Stereo Audio Amplifier
◼ PACKAGE OUTLINE
QFN36L 6*6 with exposed thermal pad
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