SL3522 [ZARLINK]
500MHz 75dB Logarithmic/Limiting Amplifier; 500MHz的75分贝对数/限幅放大器
| 型号： | SL3522 |
| 厂家： | 
ZARLINK SEMICONDUCTOR INC |
| 描述： | 500MHz 75dB Logarithmic/Limiting Amplifier |
| 文件： | 总21页 (文件大小：935K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SL3522
500MHz 75dB Logarithmic/Limiting Amplifier
Advance Information
Supersedes edition in Professional Products IC Handbook May 1991
DS3534 - 2.0 April 1994
The SL3522 is a monolithic seven stage successive
detection logarithmic amplifier integrated circuit for use in the
100MHz to 500MHz frequency range. It features an on–chip
video amplifier with provision for external adjustment of log
Slope and offset. It also features a balanced RF output. The
SL3522 operates from supplies of ±5V.
RF I/P+
RF I/P–
N/C
N/C
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
V
3
EE
EE
GND
GND
4
V
V
5
EE
EE
GND
GND
6
V
V
7
EE
EE
FEATURES
GND
RF O/P GND
RF O/P–
8
VIDEO V
EE
9
■ 75dB Dynamic Range
GAIN ADJUST
TRIM REF
RF O/P+
10
11
12
13
14
■ Surface Mount SO Package
■ Adjustable Log Slope and Offset
■ 0dBm RF Limiting Output
■ 60dBm Limiting Range
RF O/P V
EE
EE
OFFSET ADJ
VIDEO GND
VIDEO O/P V
VIDEO O/P
VIDEO V
CC
VIDEO O/P V
CC
■ 2V Video Output Range
■ Low Power (Typ. 1W)
■ Temperature Range (TCASE): -55°C to +125°C
MC28
Fig.1 Pin connections - top view
ORDERING INFORMATION
APPLICATIONS
SL3522 A MC (Miniature Ceramic package)
SL3522 C MC (Miniature Ceramic package)
SL3522 NA 1C (Probe-tested bare die)
■ Ultra Wideband Log Receivers
■ Channelised and Monpulse Radar
■ Instrumentation
(Also available: SL3522 AA MC screened to Zarlink HI-REL
level A. Contact Zarlink Semiconductor sales outlet for a
separate datasheet.)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
±6.0V
-65°C to +175°C
+175°C
ESD PROTECTION
Storage temperature
Junction temperature
Thermal resistance
Die-to-case
Die-to-ambient
Applied DC voltage to RF input
Applied RF power to RF input
To achieve the high frequency performance there are no
ESDprotectionstructuresontheRFinputpins(27, 28). These
pins are highly static sensitive, typically measured as 250V
using MIL-STD-883 method 3015. Therefore, ESD handling
precautions are essential to avoid degradation of
performance or permanent damage to this device.
15.5°C/W
76.5°C/W
±400mV
+15dBm
RF
O/P+
RF
O/P–
O/P
V
CC
RF
I/P –
27
28
9
10 14
O/P
GND
RF
I/P +
16
13
12
VIDEO
OUT
O/P
V
EE
VIDEO GAIN
AND OFFSET
ADJUST
VIDEO
V
CC
15
19
18
17
GAIN
ADJ
OFFSET
ADJ
3, 5, 7, 20, 22, 24, 26 V
4, 6, 8, 21, 23, 25 GND
EE
R
R
O
R
T
G
Fig.2 Functional block diagram
SL3522
ELECTRICAL CHARACTERISTICS
The electrical characteristics are guaranteed over the following range of operating conditions, using test circuit in Fig. 3 (unless
otherwise stated):
Temperature range: Military:
Commercial:
SL3522 A MC, SL3522 NA 1C
SL3522 C MC
55°C to +125°C (TCASE
0°C to +70°C (TCASE
)
)
Supply voltage:
VCC: +4.50V to +5.50V (all grades)
VEE: -4.5V to -5.50V (all grades)
=100MHz to 500MHz
=1.5KΩ
Frequency
Rg, Ro, Rt
Video output load
=200Ω//20pF
Test conditions (unless otherwise stated):
Temperature:
SL3522 A MC:
SL3522 C MC:
SL3522 NA 1C
+25°C, +125°C & -55°C (TCASE)
+25°C
+25°C
Supply voltage:
VCC = +5.0V, VEE = -5.0V
Value
Units
Parameter
Pin
Conditions
Min.
Typ.
Max.
14, 15
28
VCC = +5.0V
Positive supply current
(quiescent)
35
mA
ALL VEE
Pins
150
180
VEE = -5.0V See note 1
EE = -5.0V See note 2
Negative supply current
(quiescent)
175
210
mA
mA
dB
dB
dB
dB
dB
V
V
100 to 400MHz See note 1, 3
See note 1, 4
Dynamic range
75
70
Linearity
-1
+1
+1
T
CASE = -55°C
CASE = +25°C
-1
T
TCASE = +125°C
-1.25
1.30
18
+1.25
2.00
24
13
13
Video output range
Video slope
1.75
21
mV/dB
13
See note 5
Video slope variation
Video slope adjust range
Video offset
-5
+5
%
13
±20
-0.1
±30
+0.25
-05
%
RG = 1kΩ to 2.2kΩ
13
+0.5
V
mV/°C
V
13
Video offset variation
Video offset adjust range
Video trim reference
voltage
TCASE = +25°C
13
RO = 1kΩ to 2.2kΩ
±0.5
17, 18,
19
-0.59
-0.54
-0.49
V
13
10
16
See note 8
Video output impedance
Video rise time
Ω
13
10% - 90% (60dB step)
See note 7
ns
27, 28
9, 10
Input VSWR
1.5:1
450
Zs = 50Ω See note 7
TCASE = +25°C RFIN = -70dBm
See notes 2, 7
RF bandwidth
MHz
9, 10
9, 10
RF limiting range
60
dB
See notes 2, 6, 7
RF limited output level
-3.0
-1.0
+1.0
dBm
R1 = 50Ω single ended
See note 2
9, 10
50
Single ended See notes 2, 8
RF output impedance
Ω
2
SL3522
ELECTRICAL CHARACTERISTICS (cont.)
Value
Typ.
Units
Parameter
Pin
Conditions
Min.
Max.
15
3
Freq = 300MHz RFIN = -60 to +10dBm
See notes 2, 7
Phase variation with RF
Input level
Degrees
Degrees
Phase tracking between
units
TCASE = +25°C FREQ = 300MHz
See notes 2, 7
Notes
1 RF output buffer OFF (pin 8 disconnected from 0V)
2 RF output buffer ON (pin 8 connected to 0V)
3 Minimum dynamic range under any single set of operating conditions
4 Log linearity guaranteed for pin = -64dBm to +6dBm for ALL supply, temperature and frequency conditions
5 Full range of supply, temperature and frequency conditions
6 Input limiting range typically -50dBm to +10dBm
7 Not tested, but guaranteed by characterisation
8 Not tested, but guaranteed by design
The SL3522 CANNOT be GUARANTEED to operate below 100MHz and meet the electrical characteristics shown above.
However, characterisation has shown that the device can still function adequately down to frequencies of 50MHz, with the following
reservations:-
1)The video bandwidth is fixed to approx 40MHz a certain amount of carrier breakthrough on the video O/P (pin 13) will occur,
with input signal frequencies below 100MHz.
2)There are 2 RF coupling capacitors (20pF) on-chip, which couple the output signal from stage 3 to the input of stage 4 (ref
Fig. 24). These can introduce undesirable limiting phase performance for input signal frequencies below 100MHz.
RF INPUT
R
+5V V
CC
T
1k5
GAIN
OFFSET
ADJUST
R 2k2
0
ADJUST
L1
L2
1
2
3
R
2k2
G
ANZAC
TP101
10n
6
5
4
10n
10n
28
27
26
25
24
23
22
21
20
19
10
18
11
17
12
16
15
L3
SL3552
7
1
2
3
4
5
6
8
9
13
14
10n
10n
10n
10n
1n
L5
200
L4
470 VIDEO
OUTPUT
1n
SW1
18p
100
+5V V
EE
6
5
4
ANZAC
NOTES
1.
TP101
Inductors L1 to L5 = 3 TURNS
30SWG on Ferrite bead.
1
2
3
2.
3.
D.U.T. mounted in a test socket
– ENPLAS OTS–28–1.27–04
Transmission line BALUNS used
– not recommended in Application (see Para 3C)
RF OUTPUT
Fig.3 Test circuit
3
SL3522
PRODUCT DESCRIPTION
The SL3522 is a complete monolithic successive detection
Log/limiting amplifier which can operate over an input
frequency range of 100MHz to 500MHz. Producing a log/lin
characteristic for input signals between -64dBm and +6dBm,
the log amplifier can provide an accuracy of better than
±1.00dB at case temperatures of -55°C and +25°C and an
accuracy of better than ±1.25dB at +125°C. The dynamic
range is better than 75dB over a frequency range of 100MHz
to 400MHz. The graph in fig 4 shows how the dynamic range
is guaranteed over frequency.
The limiting RF Output Buffer can be isolated from the
other sections of the SL3522, by disconnecting the RF Output
Buffer GND (pin 8) from 0V, and leave the pin floating. This
featureaidsstabilityinapplicationsNOTrequiringaLimitedRF
Output signal, and lowers the power consumption of the
SL3522 to 0.95Watts, when the other sections are powered up
from a ±5.0V power supply.
Each of the Gain and Detector stages has approximately
12dB of gain, and a significant amount of on-chip RF
decoupling (200pF per stage), also to aid stability. The Video
amplifierprovidesapositivegoingoutputsignalproportionalto
the log of the amplitude of an RF input applied between pins 27
and 28. The gain and the offset of the Video amplifier can be
adjusted by 3 resistors; RG , RT , and RO which are connected
to Gain adjust (pin 19),Trim reference (pin 18) and Offset
adjust(pin17). WithRT setto1.5kΩ, RG canbesettoanyvalue
between 1kΩ and 2k2Ω and achieve a range in Video Slope of
±20%, centred on 21mV/dB. Similarly, RO can be set to any
value between 1kΩ and 2.2KΩ and achieve an offset range of
±0.5V, which should allow the Video Offset to be trimmed to 0V
if required.
TheSL3522consistsof6Gainstages, 7Detectorstages,
a limiting RF Output buffer and a Video Output amplifier. The
power supply connections to each section are isolated from
each other to aid stability.
The SL3522 consumes 1.1W of power when ALL parts of
the circuit are powered up from a ±5.0V power supply. As the
circuit uses a differential architecture, the power consumption
of the RF gain/detector stages and RF Output Buffer will be
independent of RF input signal level. However, the Video
Output (pin 13) is driven by a single ended emitter follower and
so the power consumption of the Video amplifier will vary with
RF input signal level between pins 27 and 28.(upto 10mA over
2Vvideooutputrangewithmaxvideoloadof200Ω//20pF)The
SL3522 has a high RF gain (>50dB) across a wide bandwidth
(>450MHz) when the limiting RF Output Buffer is enabled. The
limiting RF Output Buffer provides a balanced Limited Output
levelofnominally–1.0dBmoneachRFOutputconnection(pin
9and10), forRFinputsignallevelsonpins27and28inexcess
of –50dBm.
The RF input pins (27 and 28) have a 50Ω terminating
resistor connected between them on–chip. These are
capacitively coupled to the I/P gain stage with 20pF on-chip
capacitors. (Refer to APPLICATION NOTES section for
informationonhowtoconnectanRFinputsignaltothedevice).
100
90
80
–55°C
+25°C
+125°C
70
60
Minimum
guaranteed
dynamic
range (dB)”
50
40
30
20
10
0
100
200
300
400
500
600
700
800
Fig.4 Plot showing guaranteed dynamic range v. frequency
(typical achievable dynamic range lines indicated across temperature)
4
SL3522
APPLICATION NOTES
3) SL3522 AS A LOG/LIMITING AMPLIFIER
1) VIDEO–AMPLIFIER
The SL3522 uses a single ended Video amplifier to
produce a trimmable Video transfer characteristic. Both the
gain (Slope) and Offset of the amplifier can be externally
adjusted.
- with RF Output-Buffer ENABLED (pin 8 connected
to GND)
If the SL3522 is to be used as a Limiting or Log/limiting
amplifierwitharequirementforaLimitedRFOutputsignal,care
isrequiredinthelayoutofcomponentsandconnectionsaround
the device to ensure stability. The following precautions should
be observed (refer to Application circuit diagram in Fig. 6):-
a) The device should be mounted on a ground plane,
ensuring that the impedance between the ground plane and
ALLtheGNDpinsiskeptaslowaspossible. IfamultilayerPCB
is used where the ground plane is connected to the GND pins
using through-plated holes (vias), it is essential to ensure that
the vias have a very low impedance. ALL supply decoupling
capacitorsshouldbeRFchipcapacitorswhoseleadsshouldbe
kept as short as possible.
a) Gain and Offset trimming (ref Applications
circuits in figs 5 and 6)
The Gain and Offset control is achieved by adjusting RG
and RO respectively. The control is dependent upon their
difference from the Trim reference resistor, RT. Adjustment of
Gain has an effect on Offset, but adjustment of Offset does
NOT affect the Gain. Therefore the Gain should be optimised
first. The Offset should only be adjusted once the Gain has
been set.
Fig 7 shows the variation of Video Offset with value of RO,
for a fixed value of RT and RG = 1k5Ω.
Fig 8 shows the variation of Video Slope with value of RG,
for a fixed value of RT and RO = 1k5Ω.
b) The RF VEE connections (pins 3,5,7,11,20,22,24,26)
should be connected to a low impedance copper plane. A two
layer PCB should help to achieve this.
c) The RF input (pins 27 and 28) should be driven with a
balanced source impedance. One way of achieving this is to
use an isolating BALUN transformer (50Ω UNBALANCED →
50Ω BALANCED) connected between the signal source and
theRFinputpins.(e.g.MinicircuitsTT1–6,TO–75).Thedevice
stability is VERY sensitive to an imbalance of the differential
source impedance at pins 27 and 28. Use of a transmission line
BALUN though, is NOT recommended.
d)TheRFOutputconnections(pins9and10)shouldeach
be loaded with matched impedances ideally 50Ω transmission
lines. The RF Output lines leading away from the device should
be balanced. Driving highly reactive SWR loads is NOT
recommended as these can encourage device instability, as
can an imbalance of the differential load impedance at pins 9
and 10.
e) The RF Output connections (pins 9 and 10) are DC
coupled, and ideally the output pins should be capacitively
coupled to their loads using 1nF capacitors. However the RF
Outputs can drive a DC load to GND and a DC offset of approx.
400mV will exist on each RF Output pin. IT WILL NOT BE
POSSIBLE TO DISABLE THE RF OUTPUT BUFFER UNDER
THESE CONDITIONS.
f) The RF output (pins 9 and 10) has a tendancy to limit on
self noise, particularly at low ambient temperatures (-55°C),
when the RF output buffer is enabled.
The Video amplifier incorporates temperature
compensation for Video gain (Slope). To ensure temperature
stability for Video gain (Slope) over the operating temperature
range, it is recommended that the resistors with identical
temperature coefficients of resistance are used for RT and RG.
The Video amplifier does NOT incorporate temperature
compensation for Video Offset. Although it is recommended
that a resistor with identical temperature coefficient of
resistance to RT be used for RO, it may be necessary to use an
additional external temperature compensating network.
b) Video performance
The Video–amplifier has a critically damped rise time of
16ns (10% - 90%).In order to achieve this transient
performance, it is important to ensure that:-
i) the resistor connected to Trim reference (pin 18), has a
nominal resistance of 1.5kΩ, with a parasitic capacitance
LESS than 5pF.
ii) the load applied to the Video Output (pin 13) does NOT
exceed 200Ω resistance in parallel with 20pF.
Also, the following decoupling should be incorporated:-
i)TheVideoOutputVCC(pin14)shouldbedecoupledwith
a 10nF capacitor to the RETURN line from the video load,
connected to Video GND (pin 16), avoiding any common
impedance path.
ii) The Video Output Vee (pin 12) should be decoupled
with a 10nF capacitor DIRECTLY to Video-Output VCC (pin
14).
NOTE that this will effect the liminting range as the gain of the
RF output buffer will reduce as the amount of noise limiting
increases.
2) SL3522 AS A LOG AMPLIFIER
If required the limited RF Output can be attenuated using
an attenuation network as shown in fig. 9. Under these
conditions the effective RF Output currents will be reduced,
allowing the device to operate with a greater margin of
stability.It may be possible to run the device without a BALUN
transformer on the RF input if the total output impedance on the
RF Output >> 50Ω , and the attenuation components are
mounted as close as possible to the RF Output connections
(pins 9 and 10). The RF input connection could then be
configured as in Fig 5.
with RF output buffer disabled (pin 8 floating)
If the SL3522 is to be used as a Logarithmic successive
detection amplifier only, with no requirement for a limited RF
Output, the RF input (pins 27 and 28) can be driven EITHER
differentially or single ended from a 50Ω source. If being used
with a single ended input, the SIGNAL should be applied to pin
27 and the RETURN should be connected to pin 28, as shown
in the Application circuit diagram in Fig 5.
The SL3522 is VERY stable when used in this way.
Although not a crucial requirement, it is recommended that the
device should be mounted using a ground plane.
5
SL3522
+5V V
GAIN
OFFSET
ADJUST
0
CC
R
ADJUST
T
1k5
R
2k2
R 2k2
G
RF INPUT
27
10n
10n
10n
28
26
25
24
23
22
21
20
19
18
17
12
16
15
SL3522
1
2
3
4
5
6
7
8
9
10
11
13
14
VIDEO
OUTPUT
10n
VIDEO
LOADING
R
C
200
20p
10n
10n
–5V V
EE
Fig.5 Application circuit successive detection logarithmic function only
RF INPUT
+5V V
GAIN
OFFSET
ADJUST
R 2k2
0
CC
R
ADJUST
T
1k5
R
2k2
G
10n
10n
10n
28
27
26
25
24
23
22
21
20
19
18
17
12
16
15
SL3522
1
2
3
4
5
6
7
8
9
10n
10
11
13
14
VIDEO
OUTPUT
10n
1n
1n
VIDEO
LOADING
R
C
200
20p
10n
10n
–5V V
EE
RF OUTPUT
Fig.6 Application circuit - Log / Limiting function
6
SL3522
1.50
1.25
1.00
.75
.50
.25
0.00
–.25
–.50
–.75
–1.00
1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100 2200
Offset–adjust resistor (ohms)
Fig.7 Video offset v. offset-adjust resistor (pin17 to gnd) across temperature
30
28
26
24
22
20
18
16
14
12
10
2200
1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100
Gain–adjust resistor (ohms)
Fig.8 Video slope v. gain-adjust resistor (pin19 to gnd) across temperature
1n
9
RF O/P–
1n
10
RF O/P+
R1
50
R1
50
SL3522
8
RF O/P GND
Fig.9 Network for attenuating limited RF output
7
SL3522
A PRACTICAL APPLICATION FOR THE SL3522
AS A LOG/LIMITING AMPLIFIER
4) The PCB is configured to accept a small surface
mounting DC isolating BALUN transformer (e.g VANGUARD
VE43666, available from Vanguard Electronics Company Inc,
1480 West 178th St. GARDENA, C.A. 90248, U.S.A. Tel:-
U.S.A. (213) 323 – 4100) to couple a signal into the RF input
connections (pins 27 and 28). It is NOT recommended to
attempt operating the SL3522 with the RF Output Buffer
enabled, WITHOUT using an input BALUN, although it may be
possible, provided the input source impedance to both pins 27
and 28 remains balanced. The centre tap of the secondary
winding of the transformer should be soldered to the small
ground plane on the upper side of the PCB.
5) The RF Output connection to the PCB is from pin 9 of
the SL3522 only, with pin 10 being terminated on the PCB
using a 51Ω resistor. It is important to ensure that both pin 9
and10 are terminated with equal impedances.
6) The RF Output Buffer can be enabled by soldering a
link (LK) between pin 8 of the SL3522 and the adjacent guard
track around the RF Output lines. Similarly, the buffer can be
disabled by removing the same link. When the buffer is
disabled, the following components can be omitted:-
1nF capacitors (C1, C2)
The SL3522, with the RF Output-Buffer ENABLED, has a
large limited RF Output level (0dBm on each of two RF Output
pins (9 and10)) and a wide RF bandwidth (450MHz) in a small
28 pin Miniature Ceramic S.O package. As a result, there is a
tendency for the device to become unstable unless care is
used in the application.
The PCB layout for a ”SL3522 DEMONSTRATION
BOARD” in Fig. 11 has proved reliably stable. The PCB is a
double layer Fibre epoxy board which uses SMDs where
possible.AcircuitdiagramfortheDemonstrationPCBappears
in Fig. 10.
The following points should be noted when this
application is realised practically:-
1)Awireneedstoconnectthetwopadsconnectedtopins
14 and 15 of the SL3522, to allow +5V to appear at both pins.
2) ALL the GND connections to the SL3522 are made
through the PCB to a Ground plane on the bottom side. It is
important to ensure that the impedance of each of these
connections is kept to an absolute minimum to prevent
instability. If these connections are achieved using through
plated holes, it is recommended that they are filled with solder
to lower their impedance.
10nF capacitor (C8)
3) The PCB is configured to accept SMA, SMB or SMC
connectors for the RF input, RF Output and Video Output
connections. These can be changed if necessary to an
alternative type, but it is vital to ensure that the ground plane
is solidly connected to the Guard Ring which surrounds the RF
Output tracks.
51Ω resistor (RFO
)
7) The Slope (gain) and Offset of the Video Output can be
adjusted using two 1kΩ trimmers, provision for which is
included in the PCB layout.
TheplotsinFig.12tofig.23aretypicaloftheperformance
ofSL3522devicesusedwiththePCBlayoutdetailedinFig.11.
+5V V
CC
GAIN
OFFSET
ADJUST
VR 1k
0
RF INPUT
ADJUST
VR 1k
G
C3
C4
10n
C5
10n
R
R
R
O
1k
G
T
1k
1k5
10n
28
27
26
25
24
23
22
21
20
19
10
18
11
17
12
16
15
14
SL3522
1
2
3
4
5
6
7
8
9
13
VIDEO
OUTPUT
C9
C8
R
VS
C2
1n
10n
LK
150
10n
C1
1n
R
FO
51
C7
10n
C6
10n
VIDEO LOADING
RF OUTPUT
R
C
200
20p
–5V V
EE
Fig.10 SL3522 demonstration board circuit diagram
8
SL3522
Fig.11 Demonstartion Circuit PCB showing components positions (2x full size) with top and bottom copper masks (full size)
9
SL3522
2
1.75
1.5
1.25
1
0.75
0.5
0.25
0
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10
RF input power (dBm)
Fig.12 Video O/P vs CW input level at 325MHz across temperature (VCC = +5.0V, VEE = -5.0V)
8
6
4
2
0
–2
–4
–70
–60
–50
–40
–30
–20
–10
0
10
RF input power (dBm)
Fig.13 Video O/P log-error, (referenced to single straight line measured at 325MHz, +25°C, 5.0V PSUs) across temperature
10
SL3522
7
6
5
4
3
2
1
0
4.5V
5.0V
5.5V
–1
–2
–3
–70
–60
–50
–40
–30
–20
–10
0
10
RF input power (dBm)
Fig.14 Video log error, (referenced to single straight line measured at 325MHz, 25°C, 5.0V PSUs), across supply voltage
6
5
500MHz
4
3
2
325MHz
1
0
–1
100MHz
–2
–3
–4
–70
–60
–50
–40
–30
–20
–10
0
10
RF input power (dBm)
Fig.15 Video log error, (referenced to single straight line measured at 325MHz, 25°C,
11
SL3522
70
60
50
40
30
20
10
0
10
110
210
310
410
510
610
710
810
910
1010
Frequency (MHz)
Fig.16 Linear gain (-70dBm I/P)
0
–5
–10
–15
–20
–25
–30
–35
–40
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10
RF input power (dBm)
Fig.17 RF input → output limiting transfer characteristic at Frequency = 100MHz
12
SL3522
0
–5
–10
–15
–20
–25
–30
–35
–40
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10
RF input power (dBm)
Fig.18 RF input → output limiting transfer characteristic at Frequency = 325MHz
0
–5
–10
–15
–20
–25
–30
–35
–40
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10
RF input power (dBm)
Fig.19 RF input → output limiting transfer characteristic at Frequency = 500MHz
13
SL3522
20
15
10
5
0
–5
–10
–15
–20
–60
–55
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
10
RF input power (dBm)
Fig.20 Limiting phase (100MHz) normalised at -30dBm
20
15
10
5
0
–5
–10
–15
–20
–60
–55
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
10
RF input power (dBm)
Fig.21 Limiting phase (300MHz) normalised at -30dBm
14
SL3522
20
15
10
5
0
–5
–10
–15
–20
–60
–55
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
10
RF input power (dBm)
Fig.22 Limiting phase (500MHz) normalised at -30dBm
+j1
+j0.5
+j2
+j0.2
+j5
0
0.2
0.5
1
2
5
100MHz
600MHz
–j5
–j0.2
–j2
–j0.5
–j1
Fig.23 Typical input impedance normalised to 50Ω - 20dBm I/P level
15
SL3522
F.4L352Shetcdigram
16
SL3522
1
2
46
45
44
43
42
41
40
39
38
37 36 35 34
33
32
31
30
29
28
27
26
47
25
48
49
3
24
23
50
51
52
4
13
14
15
16
17
18
19
20
21
22
5
6
7
8
9
10
11 12
5.480mm
TO SCALE
TERMINALS ((X) DENOTES MC PACKAGE PIN NUMBER)
1
Video O/P (13)
14 VEE 5A (22)
15 VEE 4A (22)
16 GND 4B (23)
17 GND 3A (23)
18 VEE 3A (24)
19 VEE 2A (24)
20 GND 2A (25)
21 GND 1A (25)
22 VEE 1A (26)
23 Test point
27 Test point
28 VEE 1B (3)
29 GND 1B (4)
30 GND 2B (4)
31 VEE 2A (5)
32 VEE 3A (5)
33 GND 3B (6)
34 Test point
35 Test point
36 Test point
37 Test point
38 GND 4B (6)
39 VEE 4B (7)
40 VEE 5B (7)
2
3
4
5
6
7
8
9
Video O/P VCC (14)
Gain VCC (15)
Video GND (16)
Offset ADJ (17)
Trim REF (18)
Gain ADJ (19)
Gain VEE (20)
Test point
41 RF BUF O/P GND (8)
42 RF BUF O/P GND (8)
43 RF O/P – (9)
44 RF O/P + (10)
45 RF BUF O/P VEE (11)
46 Video O/P VEE (12)
47 Test point
48 Test point
10 Test point
49 Test point
11 VEE 6A (20)
12 GND 6A (21)
13 GND 5A (21)
24 RF I/P signal (27)
25 Test point
50 Test point
51 Test point
26 RF I/P return (28)
52 Test point
NOTES
1. All pads with square cross–section =120 m
2. All pads with octagonal cross–section =100 m
3. Chip is passivated with polyimide
120 m
100 m
Fig.25 SL3522 pad map for bare IC dice
17
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TECHNICAL DOCUMENTATION - NOT FOR RESALE
相关型号：
SL3522AAMC
Log Or Antilog Amplifier, 1 Func, 400MHz Band Width, CDSO28, MINIATURE, CERAMIC, SO-28
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