SP8647BDG [ZARLINK]
250MHz + 10/11; 为250MHz + 10/11
| 型号： | SP8647BDG |
| 厂家： | 
ZARLINK SEMICONDUCTOR INC |
| 描述： | 250MHz + 10/11 |
| 文件： | 总7页 (文件大小：271K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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DS3643-1·2
SP8647
250MHz410/11
The SP8647 is an ECL variable modulus divider, with
ECL10K and TTL/CMOS compatible outputs. It divides by 10
when either of the ECL control inputs, PE1 orPE2, is in the high
state and by 11 when both are low (or open circuit).
The two clock inputs are interchangeable and either will act
as a clock inhibit when connected to an ECL high level.
Normally, one input is left open circuit and the other is AC-
coupled, with externally applied bias.
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
CLOCK INPUT 1
PE1
CLOCK INPUT 2
NC
NC
NC
V
CONTROL INPUTS
PE2
NC
SP8647
V
CC
EE
FEATURES
TTL/CMOS OUTPUT
NC
NC
NC
■ ECL Compatible Inputs/Outputs
■ Open Collector TTL/CMOS Output
■ AC-Coupled Input (External Bias)
ECL OUTPUT
ECL OUTPUT
DG16
Fig. 1 Pin connections - top view
QUICK REFERENCE DATA
■Supply Voltage: 25·2V60·25V (ECL), 5·0V60·25V (TTL)
■ Power Consumption: 260mW
■Temperature Range: 230°C to 170°C
ABSOLUTE MAXIMUM RATINGS
ORDERING INFORMATION
8V
20mA
265°C to 1150°C
1175°C
Supply voltage, |VCC2VEE
|
SP8647 B DG
5962-90618 (SMD)
Output current
Storage temperature range
Max. junction temperature
Open collector voltage (pin 11)
Max. clock input voltage
112V
2·5V p-p
15mA
Max. open collector current
V
CC
5
11
TTL/CMOS
OUTPUT
8
9
Q1
Q3
D1
D2
Q2
D3
D4 Q4
OUTPUT
OUTPUT
2
PE1
3
PE2
Q4
CK
CK
CK
CK
1
CLOCK INPUT 1
16
CLOCK INPUT 2
12
V
EE
Fig. 2 Functional diagram
SP8647
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, the Electrical Characteristics are guaranteed over specified supply, frequency and temperature range
ECL OPERATION
Supply voltage, VCC = 0V, VEE = 25·2V 6 0·25V
Temperature, TAMB = 230°C to 170°C
Value
Notes
Characteristic
Units
Symbol
Conditions
Min.
Max.
Maximum frequency (sinewave input)
Minimum frequency (sinewave input)
Power supply current
ECL output high voltage
ECL output low voltage
Clock and PE input high voltage
Clock and PE input low voltage
Clock to ECL output delay
Set-up time
fMAX
fMIN
IEE
VOH
VOL
VINH
VINL
tp
250
MHz Input = 400-800mV p-p
MHz Input = 400-800mV p-p
5
5
5
50
65
mA
V
V
V
V
V
V
V
V
V
EE = 25·2V
20·85 20·7
21·8
20·93
EE = 25·2V (25°C)
EE = 25·2V (25°C)
EE = 25·2V (25°C)
EE = 25·2V (25°C)
21·5
21·62
6
ns
ns
ns
6
3, 6
4, 6
ts
tr
2·5
3
Release time
TTL OPERATION
Supply voltage, VCC = 5V 6 0·25V, VEE = 0V
Temperature, TAMB = 230°C to 170°C
Value
Notes
Characteristic
Units
Symbol
Conditions
Min.
Max.
Maximum frequency (sinewave input)
Minimum frequency (sinewave input)
Power supply current
TTL output low voltage
TTL output high voltage
Clock to TTL output high delay,1ve going
Clock to TTL output low delay,2ve going
Set-up time
fMAX
fMIN
IEE
VOL
VOH
tPLH
tPHL
ts
250
MHz
MHz
mA
V
V
ns
ns
ns
ns
Input = 400-800mV p-p
Input = 400-800mV p-p
5
5
5
5, 7
5, 7
6
6
3, 6
4, 6
50
65
0·5
V
CC = 5·25V, sink current = 8mA
CC = 5·0V
3·5
V
15
15
2·5
3
Release time
tr
NOTES
1. The temperature coefficients of VOH = 11·63mV/°C, VOL = 10·94mV/°C and of VIN = 11·22mV/°C.
2. The test configuration for dynamic testing is shown in Fig.6.
3. The set-up time t is defined as the minimum time that can elapse between L→H transition of control input and the next L→H clock pulse transition
s
to ensure that the 410 mode is obtained.
4. The release time t is defined as the minimum time that can elapse between H→L transition of control input and the next L→H clock pulse transition
r
to ensure that the 411 mode is obtained.
5. Tested at 25°C only.
6. Guaranteed but not tested.
7. The open collector output is not recommended for use at output frequencies above 15MHz. CLOAD < 5pF.
1200
1000
800
600
400
200
0
T
= 230°C TO 170°C
AMB
*Tested as specified
in table of Electrical
Characteristics
GUARANTEED
OPERATING
WINDOW
*
0
100
200
300
INPUT FREQUENCY (MHz)
Fig. 3 Typical input characteristic
2
SP8647
TRUTH TABLE FOR
CONTROL INPUTS
CLOCK INPUT
PE INPUT
ts
tr
PE1
PE2 Division ratio
L
H
L
L
L
H
H
11
10
10
10
6
5
OUTPUT
5
H
Fig. 4 Timing diagram
j1
j0.5
j2
j0.2
j5
0.5
5
0.2
1
2
0
50
100
2j5
150
2j0.2
200
250
2j2
2j0.5
2j1
Fig. 5 Typical input impedance. Test conditions: Supply Voltage = 5V,
Ambient Temperature = 25°C. Frequencies in MHz, impedances normalised to 50Ω.
OPERATING NOTES
1. The clock and control inputs are ECLIII compatible. There
is an internal pulldown resistor to VEE of 4·3kΩ on each input
and therefore any unused input can be left open circuit. If it
is desirable to capacitively couple the signal source to the
clock then an external bias is required as shown in Fig. 6.
The external bias voltage should be 21·3V at 25°C.
2. The outputs are compatible with ECLII but can be interfaced
to ECL10K as shown in Fig.8.
4. Input impedance is a function of frequency. See Fig. 5.
5. The TTL/CMOS output is a free collector, with an output
rise/fall time which is a function of load resistance and load
capacitance. The load capacitance should therefore be kept
to a minimum and the load resistance should not be too
small otherwise VOL will be too great. For example, TTL
output current = 8mA, VOL = 0·5V. For CMOS outputs, the
value of load resistor should be the maximum consistent
with satisfactory rise times.
3. The circuit will operate down to DC but slew rate must be
better than 100V/µs.
6. All components should be suitable for the frequency in use.
3
SP8647
1N4148
91
16
1n
5
0.1µ
0.1µ
450
450
9
8
INPUT FROM
GENERATOR
OUTPUTS TO
SAMPLING
SCOPE
DUT
750
33
1
33
TO SAMPLING
SCOPE
12
1n
20
25·2V
1n
Fig. 6 Test circuit
TTL CONTROL INPUTS
0 = 411
1 = 410
15V
1·5k
680
1N4148
91
1n
V
CC
2
3
5
10n
1
680
4·3k
4·3k
8
4·3k
DIVIDE BY
10/11
TP1
16
9
11
TTL OUTPUT
4·3k
750
2k
2k
12
V
(0V)
EE
0V
Fig. 7 Typical application showing TTL interfacing. NB: Voltage at TP1 should be 13·75V at 25°C.
PIN 8 OR 9
47
ECL OUTPUT
1·5k
25·2V
Fig. 8 Interfacing to ECL10K
4
SP8647
NOTES
5
SP8647
PACKAGE DETAILS
Dimensions are shown thus: mm (in).
1
PIN 1 REF
NOTCH
7·62 (0·3)
NOM CTRS
5·59/7·87
(0·220/0·310)
16
1·14/1·65
(0·045/0·065)
0·20/0·36
(0·008/0·014)
20·32 (0·800)
MAX
0·51 (0·02) 3·18/4·06
MIN
(0·125/0·160)
5·08/(0·20)
MAX
SEATING PLANE
NOTES
1. Controllingdimensionsareinches.
2. This package outline diagram is for guidance
only. Please contact your GPS Customer
ServiceCentreforfurtherinformation.
0·36/0·58
(0·014/0·23)
16 LEADS AT 2·54 (0·10)
NOM. SPACING
16-LEAD CERAMIC DIL – DG16
HEADQUARTERS OPERATIONS
GEC PLESSEY SEMICONDUCTORS
Cheney Manor, Swindon,
Wiltshire SN2 2QW, United Kingdom.
Tel: (0793) 518000
CUSTOMER SERVICE CENTRES
●
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●
●
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●
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FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45 Fax : (1) 64 46 06 07
GERMANY Munich Tel: (089) 3609 06-0 Fax : (089) 3609 06-55
ITALY Milan Tel: (02) 66040867 Fax: (02) 66040993
JAPAN Tokyo Tel: (3) 5276-5501 Fax: (3) 5276-5510
Fax: (0793) 518411
NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023.
SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872
SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36
UK, EIRE, DENMARK, FINLAND & NORWAY
GEC PLESSEY SEMICONDUCTORS
P.O. Box 660017
1500 Green Hills Road,
Scotts Valley, CA95067-0017
United States of America.
Tel (408) 438 2900
Swindon Tel: (0793) 518510 Fax : (0793) 518582
These are supported by Agents and Distributors in major countries world-wide.
© GEC Plessey Semiconductors 1994 Publication No. DS3643 Issue No. 1.2 March 1994
Fax: (408) 438 5576
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded
as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company
reserves the right to alter without prior knowledge the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information
and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury
or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request.
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