ZL40122/DCA [ZARLINK]

Video Amplifier, 1 Channel(s), 4 Func, PDSO14, 0.150 INCH, MS-012AB, SOIC-14;
ZL40122/DCA
型号: ZL40122/DCA
厂家: ZARLINK SEMICONDUCTOR INC    ZARLINK SEMICONDUCTOR INC
描述:

Video Amplifier, 1 Channel(s), 4 Func, PDSO14, 0.150 INCH, MS-012AB, SOIC-14

放大器 光电二极管 商用集成电路
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ZL40122  
High Speed, Current Feedback  
Quad Operational Amplifier  
Data Sheet  
November 2004  
Features  
450 MHz small signal bandwidth  
Ordering Information  
1500 V/µs slew rate  
ZL40122/DCA  
ZL40122/DCB  
ZL40122DCB1  
ZL40122DCA1  
14 lead SOIC  
14 lead SOIC  
Tubes  
Tape & Reel  
5.2 mA/channel static supply current  
65 mA output current  
14 lead SOIC* Tape & Reel  
14 lead SOIC* Tubes  
*Pb Free Matte Tin  
120 MHz gain flatness to +/- 0. 1dB  
14 pin SOIC  
-40°C to +85°C  
the ideal choice where a high density of high speed  
devices is required.  
Applications  
Video switchers/routers  
Video line drivers  
The flat gain response to 120 MHz, 450 MHz small  
signal bandwidth and 1500 V/µs slew rate make the  
device an excellent solution for video applications such  
as driving video signals down significant cable lengths.  
Twisted pair driver/receiver  
Active filters  
Other applications which may take advantage of the  
ZL40122 superior dynamic performance features  
include low cost high order active filters and twisted pair  
driver/receivers.  
Description  
The ZL40122 is a high speed, quad, current feedback  
operational amplifier offering high performance at a  
low cost. The device has a very high output current  
drive capability of 65 mA while requiring only 5.2 mA of  
static supply current. This feature makes the ZL40122  
Out_1  
Out_4  
In_n_4  
In_p_4  
V-  
14  
13  
12  
11  
10  
9
1
In_n_1  
In_p_1  
V+  
2
3
4
5
6
7
1
2
4
3
ZL40122  
In_p_2  
In_n_2  
Out_2  
In_p_3  
In_n_3  
Out_3  
8
Figure 1 - Functional Block Diagram and Pin Connection  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2003-2004, Zarlink Semiconductor Inc. All Rights Reserved.  
ZL40122  
Data Sheet  
Application Notes  
Current Feedback Op Amps  
Current feedback op amps offer several advantages over voltage feedback amplifiers:  
AC bandwidth not dependent on closed loop gain  
High Slew Rate  
Fast settling time  
The architecture of the current feedback opamp consists of a high impedance non-inverting input and a low  
impedance inverting input which is always feedback connected. The error current is amplified by a transimpedance  
amplifier which can be considered to have gain  
Zo  
Z( f ) =  
f
1+ j  
fo  
where Zo is the DC gain.  
It can be shown that the closed loop non-inverting gain is given by  
Vout  
Vin  
Av  
=
fRf  
1+ j  
foZo  
where Av is the DC closed loop gain, Rf is the feedback resistor. The closed loop bandwidth is therefore given by  
foZo GBOL  
BWCL =  
=
Rf  
Rf  
and for low values of closed loop gain Av depends only on the feedback resistor Rf and not the closed loop gain.  
Increasing the value of Rf  
Increases closed loop stability  
Decreases loop gain  
Decreases bandwidth  
Reduces gain peaking  
Reduces overshoot  
Using a resistor value of Rf=510 for Av=+2 V/V gives good stability and bandwidth. However since requirements  
for stability and bandwidth vary it may be worth experimentation to find the optimal Rf for a given application.  
Layout Considerations  
Correct high frequency operation requires a considered PCB layout as stray capacitances have a strong influence  
over high frequency operation for this de0ice. The Zarlink evaluation board serves as a good example layout that  
should be copied. The following guidelines should be followed:  
Include 6.8 uF tantalum and 0.1 uF ceramic capacitors on both positive and negative supplies  
Remove the ground plane under and around the part, especially near the input and output pins to reduce  
parasitic capacitances  
Minimize all trace lengths to reduce series inductance  
2
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Application Diagrams  
Vcc  
6.8uF  
0.1uF  
¼ ZL40122  
Rf  
Vin  
Vout  
Rin  
Ra  
0.1uF  
6.8uF  
Vout  
Vin  
Rf  
= Av = 1+  
Ra  
Vee  
Figure 2 - Non-inverting Gain  
Vcc  
6.8uF  
Rb  
0.1uF  
Vout  
¼ ZL40122  
Rf  
Vin  
Ra  
Rin  
0.1uF  
Vout  
Vin  
Rf  
= Av = −  
Ra  
6.8uF  
Vee  
Figure 3 - Inverting Gain  
3
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Absolute Maximum Ratings  
Parameter  
Symbol  
Min.  
Max.  
Units  
1
2
Vin Differential  
VIN  
±1.2  
V
Output Short Circuit Protection  
VOS/C  
See Apps  
Note in this  
data sheet  
3
4
5
6
Supply voltage  
V+, V-  
±6.5  
V+  
V
V
Voltage at Input Pins  
Voltage at Output Pins  
V
(+IN), V(-IN)  
V-  
V-  
2
VO  
V+  
V
EDS Protection  
(see Note 3)  
kV  
(HBM Human Body Model)  
(see Note 2)  
7
8
Storage Temperature  
Latch-up test  
-55  
+150  
°C  
±100 mA  
for 100 ms  
(see Note 4)  
9
Supply transient test  
20%pulse  
for 100 ms  
(see Note 5)  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate  
conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed  
specifications and the test conditions, see the Electrical Characteristics.  
Note 2: Human body model, 1.5 kin series with 100 pF. Machine model, 20 in series with 100 pF.  
Note 3: 0.8 kV between the pairs of +INA, -INA and +INB pins only. 2 kV between supply pins, OUTA or OUTB pins and any input pin.  
Note 4: ±100 mA applied to input and output pins to force the device to go into "latch-up". The device passes this test to JEDEC spec  
17.  
Note 5: Positive and Negative supply transient testing increases the supplies by 20% for 100 ms.  
Operating Range  
Characteristic  
Supply Voltage (Vcc)  
Min.  
Typ.  
Max.  
Units  
Comments  
±4.0  
-40  
±6.0  
V
Operating Temperature (Ambient)  
Junction to Ambient resistance  
+85  
°C  
Rth(j-a)  
150  
60  
°C  
4 layer  
FR4 board  
Junction to Case resistance  
Rth(j-c)  
°C  
4 layer  
FR4 board  
4
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Electrical Characteristics - Vcc=±5 V, Tamb=25C(typ.),Tamb=-40C to +85C(min-max), Av=+2V/V, Rf=510 ,  
Rload=100 unless specified.  
Min/  
Min/  
Typ  
25C  
Max  
40 to  
+85C  
Test  
Type1  
Characteristic  
Conditions  
Max  
25C  
Units  
Frequency Domain Response  
-3 dB Bandwidth  
Av=+1; Vo < 0.5 Vp-p;  
Rf=1.5 kΩ  
450  
380  
170  
120  
-
-
-
-
-
-
-
-
MHz  
MHz  
MHz  
MHz  
C
C
C
C
Av=+2; Vo < 0.5 Vp-p;  
Rf=510 Ω  
Av=+2; Vo < 5 Vp-p;  
Rf=510 Ω  
+/- 0.1 dB Flatness  
Av=+2; Vo < 0.5 Vp-p;  
Rf=510 Ω  
Differential Gain (NTSC)  
Differential Phase (NTSC)  
Time Domain Response  
Rise and Fall Time  
Rload=150 Ω  
Rload=150 Ω  
0.01  
-
-
-
-
%
C
C
0.015  
deg.  
Vout=0.5 V Step  
Vout=5 V Step  
Vout=2 V Step  
Vout=0.5 V Step  
Vout=5 V Step  
1
2.8  
6
-
-
-
-
-
-
-
-
-
-
ns  
ns  
C
C
C
C
C
Settling Time to 0.1%  
Overshoot  
ns  
4
%
Slew Rate  
1500  
V/µs  
Noise and Distortion  
2nd Harmonic Distortion  
3nd Harmonic Distortion  
Equivalent Input Noise  
Voltage  
Vout=2 Vp-p, 1 MHz  
Vout=2 Vp-p, 1 MHz  
-84  
-85  
-
-
-
-
dBc  
dBc  
C
C
>1 MHz  
>1 MHz  
>1 MHz  
5.5  
1.3  
11  
-
-
-
-
-
-
nV Hz  
C
C
C
Non-Inverting Current  
Inverting Current  
pV  
Hz  
pA  
Hz  
Static, DC Performance  
Input Offset Voltage  
Average Drift  
2.7  
-
±6.3  
±7.7  
15  
±6  
6
mV  
A
C
A
C
-
±5.6  
-
µV/deg. C  
uA  
Input Bias Current – Non-inverting  
Average Drift  
2.6  
-
nA/deg. C  
5
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Min/  
Max  
Min/  
Max  
25C  
Typ  
25C  
Test  
Type1  
Characteristic  
Conditions  
Units  
40 to  
+85C  
Input Bias Current – Inverting  
Average Drift  
7.4  
-
±25  
-
±28  
15  
µA  
nA/deg. C  
dB  
A
C
A
Power Supply Rejection Ratio  
(+ve)  
DC  
DC  
DC  
61  
58  
57  
Power Supply Rejection Ratio  
(-ve)  
58  
56  
55  
dB  
A
Common Mode Rejection Ratio  
Supply Current (per Channel)  
Miscellaneous Performance  
Input Resistance (Non-inverting)  
Input Capacitance (Non-inverting)  
Common Mode Input Range  
Output Voltage Range  
54  
50  
49  
dB  
A
A
Quiescent  
5.2  
6.5  
6.7  
mA  
8
1
-
-
MΩ  
pF  
V
C
C
A
A
C
C
-
±2.2  
±2.7  
-
-
±2.0  
±2.6  
-
±2.4  
±2.8  
65  
Rload=100 Ω  
V
Output Current (max)  
mA  
mΩ  
Output Resistance, Closed Loop  
DC  
90  
-
-
Note: Test Types:  
(A) 100% tested at 25°C. Over temperature limits are set by characterization and simulation.  
(B) Limits set by characterization or simulation.  
(C) Typical value only for information.  
6
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Typical Performance Characteristics - Tamb=25degC, Vsupply=± 5 V, Rload=100 , Av=+2V/V, Rf=510 ,  
unless otherwise specified.  
Non-Inverting Frequency Response  
2
0
200  
150  
100  
50  
Gain  
Av =+1  
Rf = 1k  
-2  
Av =+8  
Rf = 150  
-4  
Phase  
-6  
0
-8  
-50  
-100  
-150  
-200  
Av =+4  
Rf = 150  
-10  
-12  
-14  
Vo=0.5Vp-p  
Av =+2  
Rf = 510  
1
10  
100  
1000  
Frequency (MHz)  
7
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Non-Inverting Frequency Response varying Rf  
2
0
Rf=390  
Rf=250  
-2  
Rf=700  
Rf=510  
-4  
-6  
-8  
-10  
-12  
-14  
-16  
-18  
Vo=0.5Vp-p  
10  
100  
1000  
Frequency (MHz)  
Open Loop Transimpedance Gain and Phase  
120  
110  
100  
90  
0
-30  
Transimpedance Gain  
Transimpedance Phase  
-60  
-90  
80  
-120  
-150  
-180  
-210  
-240  
70  
60  
50  
40  
1.0E+03  
1.0E+04  
1.0E+05  
1.0E+06  
1.0E+07  
1.0E+08  
1.0E+09  
Frequency (Hz)  
8
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Large Signal Gain  
0
-2  
Vo = 1V p-p  
-4  
Vo = 5V p-p  
-6  
Vo = 4V p-p  
-8  
-10  
-12  
-14  
-16  
10  
100  
1000  
Frequency (MHz)  
Harmonic Distortion vs Frequency  
-40  
-50  
Vo = 2V p-p  
2nd Harmonic  
-60  
-70  
-80  
3rd Harmonic  
-90  
-100  
1
10  
100  
Frequency (MHz)  
9
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
CMRR  
70  
60  
50  
40  
30  
20  
10  
T = - 40 degC  
T = + 25 degC  
T = + 85 degC  
0
1.0E+03  
1.0E+04  
1.0E+05  
1.0E+06  
1.0E+07  
1.0E+08  
Frequency (Hz)  
PSRR +ve  
80  
70  
60  
T = - 40 degC  
T = + 25 degC  
T = + 85 degC  
50  
40  
30  
20  
10  
0
1.0E+03  
1.0E+04  
1.0E+05  
1.0E+06  
1.0E+07  
1.0E+08  
Frequency (Hz)  
10  
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
PSRR -ve  
70  
60  
50  
40  
30  
20  
10  
0
T = - 40 degC  
T = + 25 degC  
T = + 85 degC  
1.0E+03  
1.0E+04  
1.0E+05  
1.0E+06  
1.0E+07  
1.0E+08  
Frequency (Hz)  
Input Voltage and Current Noise  
100  
10  
1
Inverting Input Current Noise  
Input Voltage Noise  
Non-Inverting Input Current  
1.0E+01  
1.0E+02  
1.0E+03  
1.0E+04  
1.0E+05  
1.0E+06  
1.0E+07  
Frequency (Hz)  
11  
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Supply Current vs Temperature  
5.60  
5.50  
5.40  
5.30  
5.20  
5.10  
5.00  
4.90  
4.80  
4.70  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
140  
Die Temp (deg. C)  
DC Drift Over Temperature  
9.00  
8.00  
7.00  
6.00  
5.00  
4.00  
3.00  
2.00  
1.00  
0.00  
Input Bias Inv  
Input Offset Voltage  
Input Bias Non-Inv  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
140  
Die Temp (deg. C)  
12  
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Large and Small Signal Pulse Response  
3
2
0.6  
0.4  
0.2  
0
Vout = 5V Step  
1
Vout = 0.5V Step  
0
-1  
-2  
-3  
-0.2  
-0.4  
-0.6  
0
10  
20  
30  
40  
50  
60  
70  
80  
Time (ns)  
Closed Loop Output Impedance  
10  
1
0.1  
0.01  
0.01  
0.1  
1
10  
100  
Frequency (MHz)  
13  
Zarlink Semiconductor Inc.  
ZL40122  
Data Sheet  
Differential Gain & Phase ZL40122 / ZL40123  
NTSC  
Best fit Gain  
RL=150?  
Best fit Phase  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
0.01  
0
-0.01  
-0.02  
-0.03  
-0.04  
-0.05  
-0.06  
-0.07  
-0.7  
-0.6  
-0.5  
-0.4  
-0.3  
-0.2  
-0.1  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.6  
0.7  
Bias Voltage  
14  
Zarlink Semiconductor Inc.  
Package Code  
c
Zarlink Semiconductor 2003 All rights reserved.  
ISSUE  
ACN  
Previous package codes  
DATE  
APPRD.  
For more information about all Zarlink products  
visit our Web Site at  
www.zarlink.com  
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.  
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such  
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or  
use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual  
property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in  
certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.  
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part  
of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other  
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the  
capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute  
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and  
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does  
not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in  
significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.  
Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system  
conforms to the I2C Standard Specification as defined by Philips.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright Zarlink Semiconductor Inc. All Rights Reserved.  
TECHNICAL DOCUMENTATION - NOT FOR RESALE  

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