PCA1401A [ZCOMM]

LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP; 低成本 - 高性能锁相环
PCA1401A
型号: PCA1401A
厂家: Z-COMMUNICATIONS, INC    Z-COMMUNICATIONS, INC
描述:

LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP
低成本 - 高性能锁相环

文件: 总2页 (文件大小:57K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PCA1401A  
9939 Via Pasar • San Diego, CA 92126  
TEL (858) 621-2700 FAX (858) 621-2722  
PHASE LOCKED LOOP  
Rev A1  
PHASE NOISE (1 Hz BW, typical)  
-50  
-60  
-70  
-80  
-90  
-100  
-110  
-120  
-130  
-140  
FEATURES  
-
• Frequency Range: 1401  
• Step Size:  
- Style Package  
1402  
MHz  
1000  
KHz  
cPLL  
APPLICATIONS  
• Fixed Wireless Broadband Equipment  
• Point-to-Point Microwave Radio  
100  
1000  
10000  
100000  
Satellite Communication Systems  
VALUE  
1401 - 1402  
UNITS  
MHz  
PERFORMANCE SPECIFICATIONS  
Frequency Range  
-103  
dBc/Hz  
dBc  
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)  
Harmonic Suppression (2nd, typ.)  
Sideband Spurs (typ.)  
-15  
-70  
dBc  
Power Output  
0±2  
50  
dBm  
Load Impedance  
Step Size  
1000  
1250  
KHz  
Charge Pump Output Current  
Switching Speed (typ., adjacent channel)  
Startup Lock Time (typ.)  
µΑ  
mSec  
2
3
mSec  
°C  
-40 to 85  
Operating Temperature Range  
Package Style  
cPLL  
POWER SUPPLY REQUIREMENTS  
Supply Voltage (Vcc, nom.)  
5
Vdc  
mA  
Supply Current (Icc, typ.)  
35  
All specifications are typical unless otherwise noted and subject to change without notice.  
APPLICATION NOTES  
AN-107 : How to Solder Z-COMM VCOs / PLLs  
AN-200 : Mounting and Grounding of Z-COMM PLLs  
AN-201 : PLL Fundamentals  
AN-202 : PLL Functional Description  
NOTES:  
Reference Oscillator Signal: 5 MHz<fosc<100 MHz  
Frequency Synthesizer: Analog Devices - ADF4113  
© Z-Communications, Inc.  
All rights reserved  
Page 1  
LOW COST - HIGH PERFORMANCE  
PHASE LOCKED LOOP  
PCA1401A  
PAGE 2  
VCO TUNING CURVE, typ.  
°c  
85  
°c  
25  
°c  
-40  
TUNING VOLTAGE (Vdc)  
VCO POWER CURVE, typ.  
°c  
25  
FREQUENCY (MHz)  
PHYSICAL DIMENSIONS  
Top View  
1. The inside radius of all 14 half holes at the perimeter of the board  
12  
11  
10  
are plated to provide a surface for the attachment of the PLL Module  
to the motherboard. 5 pads are for grounding, 8 pads are for signal  
interface.  
2. The surface of the shield is tin-plated and may be soldered to.  
1
9
8
7
The shield's base metal is brass.  
3.The ground plane on the bottom side is ground and attaches to a  
ground track on the top side of the board as well as to the shield.  
Bottom  
View  
4. Unless otherwise noted all dimensions are in inches.  
5.Unless otherwise noted all tolerances are as follows:  
.xxx = ± .010  
2
3
P1 RF OUTPUT  
P2 REFERENCE OSCILLATOR INPUT  
P3 CLOCK  
5
6
4
P4 DATA  
P5 LOAD ENABLE  
P6 LOCK DETECT  
P7 VCC  
SIDE VIEW  
P8 GROUND  
P9 NO CONNECTION  
P10-12 GROUND  
Page 2  
Printed in the U.S.A.  
© Z-Communications, Inc.  

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