Z86E2112PSC [ZILOG]
IC 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP40, PLASTIC, DIP-40, Microcontroller;
| 型号： | Z86E2112PSC |
| 厂家： | 
ZILOG, INC. |
| 描述： | IC 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP40, PLASTIC, DIP-40, Microcontroller 可编程只读存储器 电动程控只读存储器 时钟 微控制器 光电二极管 外围集成电路 装置 |
| 文件： | 总12页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Z86E21
CMOS Z8® OTP
MICROCONTROLLER
GENERAL DESCRIPTION
The Z86E21 microcontroller (MCU) introduces the next
level of sophistication to single-chip architecture. The
Z86E21 is a member of the Z8 single-chip microcontroller
family with 8 Kbytes of EPROM and 236 bytes of general
purpose RAM.
ThedeviceapplicationsdemandpowerfulI/Ocapabilities.
The Z86E21 fulfills this with 32-pin dedicated to input and
output. These lines are grouped into four ports. Each port
consists of eight lines, and is configurable under software
control to provide timing, status signals, serial or parallel
I/O with or without handshake, and an address/data bus
for interfacing external memory.
TheZ86E21isapincompatible,One-Time-Programmable
(OTP) version of the Z86C21. The Z86E21 contains 8
Kbytes of EPROM memory in place of the 8 Kbyte of ROM
on the Z86C21.
Therearethreebasicaddressspacesavailabletosupport
this wide range of configuration: Program Memory, Data
Memory and 236 General-Purpose registers.
The MCU is housed in a 40-pin DIP, 44-pin Leaded Chip-
Carrier, or a 44-pin Quad Flat Pack, and is manufactured
in CMOS technology. The ROMless pin option is available
on the 44-pin versions only. The MCU can address both
external memory and preprogrammed ROM which en-
ables this Z8 microcomputer to be used in high volume
applications or where code flexibility is required.
To unburden the program from coping with real-time
problemssuchascounting/timingandserialdatacommu-
nication,theZ86E21offerstwoon-chipcounter/timerswith
a large number of user selectable modes, and an asyn-
chronousreceiver/transmitter(UART)(seeFunctionalBlock
Description).
Zilog’s CMOS microcontroller offers fast execution, effi-
cientuseofmemory,sophisticatedinterrupts,input/output
bit manipulation capabilities, and easy hardware/software
system expansion along with low cost and low power
consumption.
In ROM Protect Mode, the instructions LDC, LDCI, LDE
and LDEI are disabled when reading address locations
%0000 to %1FFF.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
The Z86E21 architecture is based on Zilog’s 8-bit
microcontroller core. The device offers a flexible I/O
scheme,anefficientregisterandaddressspacestructure,
multiplexed capabilities between address/data, I/O, and a
number of ancillary features that are useful in many indus-
trial and advanced scientific applications.
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
Ground
VCC
GND
VDD
VSS
PRODUCT RECOMMENDATIONS
Zilog recommends the following programming equipment for use with this One-Time-Programmable product:
Recommended Revision Level
Device
Zilog Support Tool
Hardware
Software
Z86E21
Z86E21
Z86E21
Z86C1200ZEM ICEBOX™ Emulator* (*Does not support 4K/8K option.)
Data I/O 3900 Programmer* (*Does not support option bits.)
Data I/O Unisite Programmer* (*Does not support option bits.)
B
1.5
1.1
3.7
Some non-Zilog programmers may have different pro-
gramming waveforms, voltages and timings and not all
programmersmaymeettheprogrammingrequirementsof
Zilog's One-Time-Programmable products.
If difficulty is encountered in programming a Zilog OTP
product, please contact your local Zilog sales office.
DC-2964-10
1
GENERAL DESCRIPTION (Continued)
Vcc
GND
XTAL /AS /DS R//W /RESET
Output Input
Machine Timing and
Instruction Control
Port 3
UART
ALU
FLAGS
Counter/
Timers
(2)
Prg. Memory
8192 x 8-Bit
Register
Pointer
Interrupt
Control
Program
Counter
Register File
256 x 8-Bit
Port 2
Port 0
Port 1
8
4
4
I/O
Address or I/O
(Nibble Programmable)
Address/Data or I/O
(Byte Programmable)
(Bit Programmable)
Functional Block Diagram
2
PIN DESCRIPTION
Standard Mode
1
VCC
XTAL2
XTAL1
P37
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
P36
P31
P27
P26
P25
P24
P23
P22
P21
P20
P33
P34
P17
P16
P15
P14
P13
P12
P11
P10
2
3
4
P30
5
/RESET
R//W
/DS
6
7
8
/AS
9
Z86E21
DIP
P35
10
11
12
13
14
15
16
17
18
19
20
GND
P32
P00
P01
P02
P03
P04
P05
P06
P07
40-Lead DIP Pin Assignments
40-Lead DIP Pin Identification
Pin # Symbol
Function
Power Supply
Crystal, Oscillator Clock Output
Crystal, Oscillator Clock Input
Port 3 pin 7
Port 3 pin 0
Direction
Pin # Symbol
Function
Direction
1
2
3
4
5
VCC
Input
11
12
GND
P32
Ground, GND
Port 3 pin 2
Port 0 pin 0,1,2,3,4,5,6,7 In/Output
Port 1 pin 0,1,2,3,4,5,6,7 In/Output
Input
Input
XTAL2
XTAL1
P37
13-20 P00-P07
21-28 P10-P17
Output
Input
P30
29
P34
Port 3 pin 4
Output
6
7
8
9
/RESET
R//W
/DS
/AS
P35
Reset
Input
30
P33
Port 3 pin 3
Port 2 pin 0,1,2,3,4,5,6,7 In/Output
Port 3 pin 1
Port 3 pin 6
Input
Read/Write
Data Strobe
Address Strobe
Port 3 pin 5
Output
Output
Output
Output
31-38 P20-P27
39
40
P31
P36
Input
Output
10
3
PIN DESCRIPTION (Continued)
Standard Mode
6
5
4
3
2
1 44 43 42 41 40
7
39
38
37
36
35
34
33
32
31
30
29
N/C
P24
P23
P22
P21
P20
P33
P34
P17
P16
P15
/RESET
R//W
/DS
8
9
10
11
12
13
14
15
16
17
/AS
P35
Z86E21
PLCC
GND
P32
P00
P01
P02
R//RL
18 19 20 21 22 23 24 25 26 27 28
44-Lead PLCC Pin Assignments
44-Lead PLCC Pin Identification
Pin #
Symbol
Function
Power Supply
Crystal, Oscillator Clock Output
Crystal, Oscillator Clock Input
Direction
Pin #
Symbol
Function
Direction
1
2
3
4
V
Input
14-16 P00-P02 Port 0 pin 0,1,2
17 R//RL ROM/ROMless control
18-22 P03-P07 Port 0 pin 3,4,5,6,7
23-27 P10-P14 Port 1 pin 0,1,2,3,4
In/Output
Input
In/Output
In/Output
XCTCAL2
XTAL1
P37
Port 3 pin 7
Output
5
6
7
8
P30
N/C
/RESET
R//W
Port 3 pin 0
Not Connected
Reset
Input
Input
Input
Output
28
N/C
Not Connected
Input
29-31 P15-P17 Port 1 pin 5,6,7
32
33
In/Output
Output
Input
P34
P33
Port 3 pin 4
Port 3 pin 3
Read/Write
9
/DS
/AS
P35
GND
P32
Data Strobe
Address Strobe
Port 3 pin 5
Ground, GND
Port 3 pin 2
Output
Output
Output
Input
34-38 P20-P24 Port 2 pin 0,1,2,3,4
39 N/C Not Connected
40-42 P25-P27 Port 2 pin 5,6,7
In/Output
Input
In/Output
Input
10
11
12
13
43
44
P31
P36
Port 3 pin 1
Port 3 pin 6
Input
Output
4
33 32 31 30 29 28 27 26 25 24 23
/RESET
R//W
/DS
34
35
36
37
38
39
40
41
42
43
44
22
21
20
19
18
17
16
15
14
13
12
GND
P24
P23
P22
P21
P20
P33
P34
/AS
P35
Z86E21
QFP
GND
P32
P00
P01
P17
P16
P15
P02
R//RL
1
2
3
4
5
6
7
8
9
10 11
44-Lead QFP Pin Assignments
44-Lead QFP Pin Identification
Pin #
Symbol
Function
Direction
Pin #
Symbol
Function
Direction
1-5
6
7-14
15
P03-P07 Port 0 pin 3,4,5,6,7
GND Ground, GND
P10-P17 Port 1 pin 0,1,2,3,4,5,6,7 In/Output
In/Output
Input
31
32
33
34
XTAL1
P37
P30
Crystal, Oscillator Clock Input
Port 3 pin 7
Port 3 pin 0
Reset
Output
Input
Input
P34
Port 3 pin 4
Output
/RESET
16
P33
Port 3 pin 3
Input
In/Output
Input
35
36
37
38
R//W
/DS
/AS
Read/Write
Output
Output
Output
Output
17-21 P20-P24 Port 2 pin 0,1,2,3,4
22 GND Ground, GND
23-25 P25-P27 Port 2 pin 5,6,7
Data Strobe
Address Strobe
Port 3 pin 5
In/Output
P35
26
27
28
29
30
P31
P36
GND
V
Port 3 pin 1
Port 3 pin 6
Ground, GND
Power Supply
Crystal, Oscillator Clock Output
Input
Output
Input
Input
39
40
GND
P32
Ground, GND
Port 3 pin 2
Input
Input
In/Output
Input
41-43 P00-P02 Port 0 pin 0,1,2
44 R//RL ROM/ROMless control
XCTCAL2
5
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for an extended pe-
riod may affect device reliability.
Symbol Description
Min
Max Units
VCC
TSTG
TA
Supply Voltage*
Storage Temp
Oper Ambient Temp
-0.3 +7.0
-65 +150
†
V
C
C
Notes:
* Voltages on all pins with respect to GND.
13.0 V Maximum on P30-P33.
† See Ordering Information
STANDARD TEST CONDITIONS
+5V
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Test Load
Diagram).
2.1 kΩ
From Output
Under Test
150 pF
9.1 kΩ
Test Load Diagram
6
DC CHARACTERISTICS
TA = 0°C
to +70°C
TA = -40°C
to +105°C
Typical
Sym. Parameter
Min
Max
Min
Max
@ 25°C Units Conditions
µ
µ
µ
µ
µ
µ
Notes:
ICC2 requires loading TMR (%F1H) with any value prior to STOP execution.
Use this sequence:
LD TMR,#00
NOP
7
AC CHARACTERISTICS
External I/O or Memory Read or Write Timing Diagram
R//W
13
12
Port 0, /DM
16
3
19
1
Port 1
/AS
A
- A
D
- D IN
7 0
7
0
2
9
8
18
11
4
5
6
/DS
(Read)
17
10
Port 1
A
- A
D
- D OUT
7
0
7 0
14
15
7
/DS
(Write)
External I/O or Memory Read/Write Timing
8
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing Table
TA = 0°C to 70°C
12 MHz 16 MHz
Max Min Max Min Max Min Max Min Units Notes
TA = -40°C to 105°C
12 MHz 16 MHz
No Symbol
Parameter
Notes:
[1] When using extended memory timing add 2 TpC.
[2] Timing numbers given are for minimum TpC.
[3] See clock cycle dependent characteristics table.
Clock Dependent Formulas
Number
Symbol
Equation
1
2
3
4
TdA(AS)
TdAS(A)
TdAS(DR)
TwAS
0.40TpC + 0.32
0.59TpC - 3.25
2.38TpC + 6.14
0.66TpC - 1.65
Standard Test Load
All timing references use 2.0V for a logic 1 and 0.8V for a logic 0.
6
7
8
10
TwDSR
TwDSW
TdDSR(DR)
TdDS(A)
2.33TpC - 10.56
1.27TpC + 1.67
1.97TpC - 42.5
0.8TpC
11
12
13
14
TdDS(AS)
0.59TpC - 3.14
0.4TpC
0.8TpC - 15
0.4TpC
TdR/W(AS)
TdDS(R/W)
TdDW(DSW)
15
16
17
18
19
TdDS(DW)
TdA(DR)
TdAS(DS)
TsDI(DS)
TdDM(AS)
0.88TpC - 19
4TpC - 20
0.91TpC - 10.7
0.8TpC - 10
0.9TpC - 26.3
9
AC CHARACTERISTICS
Additional Timing Diagram
3
1
Clock
2
2
3
T
IN
4
IRQ
N
5
Additional Timing
AC CHARACTERISTICS
Additional Timing Table
TA = 0°C to 70°C
12 MHz 16 MHz
TA = -40°C to 105°C
12 MHz
16 MHz
No Symbol
Parameter
Max Min Max Min Max Min Max Min Units Notes
Notes:
[1] Clock timing references use 3.8V for a logic 1 and 0.8V for a logic 0.
[2] Timing references use 2.0V for a logic 1 and 0.8V for a logic 0.
[3] Interrupt references request via Port 3.
[4] Interrupt request via Port 3 (P31-P33).
[5] Interrupt request via Port 30.
10
AC CHARACTERISTICS
Handshake Timing Diagrams
Data In
Data In Valid
Next Data In Valid
1
2
3
/DAV
Delayed DAV
(Input)
4
5
6
RDY
Delayed RDY
(Output)
Input Handshake Timing
Data Out
Data Out Valid
Next Data Out Valid
7
/DAV
Delayed DAV
(Output)
8
9
11
10
RDY
Delayed RDY
(Input)
Output Handshake Timing
11
AC CHARACTERISTICS
Handshake Timing Table
TA = 0°C to 70°C
12 MHz 16 MHz
Max Min Max Min Max Min Max Min Direction
TA = -40°C to 105°C
12 MHz 16 MHz
Data
No Symbol
Parameter
©1995byZilog, Inc. Allrightsreserved. Nopartofthisdocument
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
byZilog,Inc.arecoveredbywarrantyandpatentindemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makesnowarranty, express, statutory, impliedor
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of mer-
chantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
Zilog’s products are not authorized for use as critical compo-
nents in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056
Internet: http://www.zilog.com
12
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