Z86L9900100ZEM [ZILOG]

ICEBOX; 冰箱
Z86L9900100ZEM
型号: Z86L9900100ZEM
厂家: ZILOG, INC.    ZILOG, INC.
描述:

ICEBOX
冰箱

文件: 总70页 (文件大小:1316K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Z86L9900100ZEM  
Z86L99 ICEBOX  
User Manual  
UM005100-IRR0400  
ZiLOG WORLDWIDE HEADQUARTERS • 910 E. HAMILTON AVENUE • CAMPBELL, CA 95008  
TELEPHONE: 408.558.8500 • FAX: 408.558.8300 • WWW.ZILOG.COM  
This publication is subject to replacement by a later edition. To determine whether a later edition exists, or to  
request copies of publications, contact  
ZiLOG Worldwide Headquarters  
910 E. Hamilton Avenue  
Campbell, CA 95008  
Telephone: 408.558.8500  
Fax: 408.558.8300  
www.ZiLOG.com  
Windows is a registered trademark of Microsoft Corporation.  
Document Disclaimer  
© 2000 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or  
technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT ASSUME  
LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR  
TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR  
INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION,  
DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Except with the express written approval  
ZiLOG, use of information, devices, or technology as critical components of life support systems is not authorized. No  
licenses or other rights are conveyed, implicitly or otherwise, by this document under any intellectual property rights.  
ii  
UM005100-IRR0400  
Electrical  
Safeguards  
Follow the precautions listed below to avoid permanent damage to the emulator.  
I. Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD).  
II. Power-Up Precautions.  
3. Ensure that all power to the emulator and the target application (if any) is turned OFF.  
4. Connect the target pod to the target application (if any).  
5. Power up the emulator, then press the RESET button.  
6. Power up the target application (if any).  
III Power-Down Precautions.  
When powering down, follow this procedure in the precise order shown below:  
1. Power down the target application board (if any).  
2. Remove the target pod.  
3. Power down the emulator.  
NOTES:  
1. Refer to the ÒPrecaution ListÓ section of the Product Information sheet for additional operating  
precautions specific to various devices.  
2. Do not leave the emulator powered up with the RS-232C cable connected to a powered-down PC.  
3. Before inserting target pod into target application board, refer to Chapter 2 to determine appropriate  
jumper selections and options.  
UM005100-IRR0400  
iii  
Z86L99 ICEBOX USERS MANUAL  
PREFACE  
ABOUT THIS MANUAL  
We recommend that you read and understand everything in this manual before setting up and  
using the product. However, we recognize that users have different styles of learning. There-  
fore, we have designed this manual to be used either as a how-to procedural manual or a ref-  
erence guide to important data.  
The following conventions have been adopted to provide clarity and ease of use:  
Universe Medium 10-point all-caps is used to highlight to the following items:  
– commands , displayed messages  
– menu selections, pop-up lists, button, fields, or dialog boxes  
– modes  
– pins and ports  
– program or application name  
– instructions, registers, signals and subroutines  
– an action performed by the software  
– icons  
Courier Regular 10-pointis used to highlight the following items  
– bit  
– software code  
– file names and paths  
– hexadecimal value  
Grouping of Actions Within A Procedure Step  
Actions in a procedure step are all performed on the same window or dialog box.  
Actions performed on different windows or dialog boxes appear in separate steps.  
UM005100-IRR0400  
Z86L99 ICEBOX USERS MANUAL  
TABLE OF CONTENTS  
Chapter Title and Subsections  
Page  
Chapter 1  
Introduction  
OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1  
EMULATOR FEATURES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
EMULATOR LIMITATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
SUPPORTED ZILOG DEVICES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
HARDWARE SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
POWER REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
SERIAL INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
GUI-SUPPORTED COMPILER, ASSEMBLER FORMATS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
KIT CONTENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
ADDITIONAL ITEMS NOT SUPPLIED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
OPTIONAL RECOMMENDED ITEM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5  
COMPUTER REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5  
MINIMUM REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5  
CONTACTING ZILOG CUSTOMER SUPPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6  
UM005100-IRR0400  
vii  
Chapter Title and Subsections  
Page  
Chapter 2  
Set-Up and Installation  
HARDWARE INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1  
QUICK INSTALLATION INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1  
COMPLETE INSTALLATION INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
SOFTWARE INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8  
EMULATOR OPERATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8  
RESETTING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8  
LED OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9  
JUMPER SETTINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10  
DIP SETTINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12  
PERFORMING OTP PROGRAMMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14  
Chapter 3  
Overview  
EMULATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1  
USING ZDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
SELECT THE EMULATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
OPEN A PROJECT AND ADD FILES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
AVAILABLE DEBUG WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7  
Appendix A  
Troubleshooting Guide  
INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-1  
COUNTER JUMPS TO UNEXPECTED ADDRESS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-2  
ZDS ERROR MESSAGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-3  
CAN NOT OPEN WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-3  
OUT OF SYNCHRONIZATION WITH THE EMULATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-3  
Appendix B  
Problem/Suggestion Report Form  
Glossary  
Index  
viii  
UM005100-IRR0400  
Z86L99 ICEBOX USERS MANUAL  
LIST OF TABLES  
Table  
Page  
TABLE 1-1 SUPPORTED PRODUCTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
TABLE 2-1 JUMPER SETTINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10  
TABLE 2-2 DIP SETTINGS TO DISABLE DIGITAL FUNCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12  
TABLE 2-3 DIP SETTINGS TO SET PULL-UP RESISTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12  
TABLE 3-1 DEBUG WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7  
UM005100-IRR0400  
ix  
Z86L99 ICEBOX USERS MANUAL  
LIST OF FIGURES  
Figure  
Page  
FIGURE 2-1 EMULATOR CONNECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
FIGURE 2-2 J6 JUMPER SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3  
FIGURE 2-3 Z86L9900100ZEM ICEBOX EXTERNAL TOP VIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4  
FIGURE 2-4 FRONT LED ASSIGNMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9  
FIGURE 3-1 NEW PROJECT DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
FIGURE 3-2 EMULATOR CONFIGURATION DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3  
FIGURE 3-3 PROJECT VIEWER WINDOW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
FIGURE 3-4 INSERT FILES INTO PROJECT DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
FIGURE 3-5 PROJECT VIEWER WINDOW WITH FILE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
UM005100-IRR0400  
xi  
Z86L99 ICEBOX USERS MANUAL  
CHAPTER 1  
INTRODUCTION  
OVERVIEW  
Congratulations for selecting a fine development tool! The Z86L9900100ZEM ICEBOX is  
ZiLOG’s in-circuit emulator providing emulation for the Z8 family of IR controllers. The  
emulator is also capable of OTP programming for the family being emulated. The emulator  
consists of an emulation daughter board that is plugged into a 64K motherboard via P1 and  
P2 headers. The Z86D99 ICE chip is used as the emulation processor on the daughter board.  
The motherboard provides host communication interface, control processor, I/O space  
decoding and LED indicators. The emulator is designed to be used with ZiLOG Developers  
Studio, giving the user a total package to write, edit and debug their applications.  
UM005100-IRR0400  
1–1  
Emulator Features  
Introduction  
EMULATOR FEATURES  
Key features of the Z86L9900100ZEM ICEBOX include:  
Supports up to 32K of ROM  
Vary the operating voltage from 3.0-4.0V  
Supports in-circuit emulation on target systems that operate from 3.0-4.0V  
The user can choose to power the ICE chip from either the emulator or target board  
Supports IR devices that operate up to 8MHz  
Emulates 28 and 40-pin DIP and 28-pin SOIC  
OTP programming for 28 pin DIP and 28 pin SOIC, 40 pin DIP packages  
Emulates and supports all the features and functions for a specified Z8 IR  
microcontroller  
Multitasking allows the user to use other Windows applications while ZiLOG  
Developer Studio (ZDS) is running  
EMULATOR LIMITATIONS  
The Z86D99 ICE chip’s ROM/ROMLESS pin is used to configure the ICE CHIP for 32K of  
internal ROM. This configuration affects the Z86L9900100ZEM ICEBOX in the following  
ways:  
Will not support emulation of a ROMLESS operation mode  
If the host software specifies that a device has between 4K to 32K of ROM the emulator  
operates as if it is emulating a device with 32K of ROM  
To emulate pull-up transistors for their target board, you must manually set the emulator’s  
pull-up resistor dip switches. See page 2-12 for the proper settings of the emulator’s dip  
switches.  
NOTE: Mask option pull-up resistance at 3V is about 200k Ohm +/-50% at room temperature. Lower  
voltage may cause an increase in resistance.  
1–2  
UM005100-IRR0400  
Introduction  
Supported ZiLOG Devices  
SUPPORTED ZILOG DEVICES  
Table 1-1 shows the products supported by the Z86L9900100ZEM ICEBOX:  
TABLE 1-1. SUPPORTED PRODUCTS  
Packages Emulation  
OTP  
Required accessories  
28 PDIP  
Z86L991PZ008SC Z86D991  
PZ008SC  
28 PDIP emulation pod  
28 PDIP program platform  
(PC ASSY#99C0667-001)  
28 SOIC  
Z86L991SZ008SC Z86D991  
SZ008SC  
28 PDIP emulation pod and a DIP to SOIC  
conversion adapter from Emulation  
Technology (AS-DIP 6-028-S003-1 or AS-DIP-6-  
028-S003-2)  
28 SOIC program platform  
(PC ASSY#99C0668-001)  
40 PDIP  
Z86L990PZ008SC Z86D990  
PZ008SC  
40 PDIP emulation pod  
40 PDIP program platform  
(PC ASSY#990716-001) Rev. B  
48 SSOP N/A  
Z86D990  
HZ008SC  
Accessories for the 48 pin SSOP will be  
available the 4th quarter of 2000  
HARDWARE SPECIFICATIONS  
OPERATING CONDITIONS  
Operating Humidity:  
Operating Temperature:  
Clocks:  
10%-90% RH (Non condensing)  
20°C ±10°C  
The control processor operates at 7.3728 Mhz, the  
emulation processor operates at 8Mhz  
Serial Baud Rate:  
57,600 bps  
POWER REQUIREMENTS  
This emulator requires an external 5VDC power supply.  
Operating Voltage (Input):  
Operating Voltage (Target):  
Operating Current:  
+4.75 VDC to +5.25 VDC Max (+5.0 VDC typical)  
+3.0 VDC to +4.0 VDC Max  
0.8A typical 1.5A MAX  
UM005100-IRR0400  
1–3  
GUI-Supported Compiler, Assembler Formats  
SERIAL INTERFACE  
Introduction  
ZiLOG Developer Studio communicates with theZ86L9900100ZEM ICEBOX using a  
DB25, RS-232 and DCE cable (TxD, RxD only).  
GUI-SUPPORTED COMPILER, ASSEMBLER FORMATS  
The Emulator supports object (binary or Intel hex) code files produced by ZiLOG Developer  
Studio (ZDS), ZiLOG Macro Cross Assembler (ZMASM).  
KIT CONTENTS  
The emulator kit contains one each of the following items:  
Z86L9900100ZEM ICEBOX  
Z86D991 40 PDIP program platform ZiLOG PC: 99C0716-001  
Z86D991 28 PDIP program platform ZiLOG PC: 99C0667-001  
Z86D991 28 SOIC program platform ZiLOG PC: 99C0668-001  
40 PDIP emulation pod with cable ZiLOG PC: 99C0206-001  
28 PDIP emulation pod with cable ZiLOG PC: 99C0217-001  
5V Power Cable with banana plugs  
RS-232 Serial Cable, 9-pin M-F  
ZiLOG Developer Studio Installation CD  
Z86L99 ICEBOX User’s Manual  
ADDITIONAL ITEMS NOT SUPPLIED  
The following items are required but are not currently supplied in the emulator kit:  
A source of power (+5VDC typical) for the emulator. This can be a laboratory power  
supply with current rating of at least 1.5 ampere.  
1–4  
UM005100-IRR0400  
Introduction  
Computer Requirements  
OPTIONAL RECOMMENDED ITEM  
The following items are recommended:  
Your target design. Typically this is a wire-wrapped or printed circuit prototype that  
includes a socket for the target device which the emulator cable/pod plugs into.  
Z8 C-Compiler  
Oscilloscope  
Logic Analyzer  
COMPUTER REQUIREMENTS  
MINIMUM REQUIREMENTS  
IBM PC (or 100-percent compatible) Pentium-Based Machine  
75 MHz  
16 MB RAM  
VGA Video Adapter  
Hard Disk Drive (12 MB free space)  
CD-ROM Drive (a CD-ROM drive is not needed if you download ZDS from the web at  
www.zilog.com)  
RS-232 COM Port  
Mouse or Pointing Device  
Microsoft Windows 95/98/NT  
The following enhancements to the minimum requirements are recommended:  
166MHz IBM PC  
SVGA video adapter  
UM005100-IRR0400  
1–5  
Contacting ZiLOG Customer support  
Introduction  
CONTACTING ZILOG CUSTOMER SUPPORT  
ZILOG has a worldwide customer support center located in Austin, Texas. The customer  
support center is open from 7 a.m. to 7 p.m. Central Time.  
The customer support toll-free number for the United States and Canada is 1-877-ZiLOGCS  
(1-877-945-6427). For calls outside of the United States and Canada dial 512-306-4169. The  
FAX number to the customer support center is 512-306-4072. Customers can also access  
customer support via the website at:  
For customer service - http://register.zilog.com/login.asp?login=servicelogin  
For technical support- http://register.zilog.com/login.asp?login=supportlogin  
For valuable information about hardware and software development tools go to ZiLOG home  
page at http://www.zilog.com. The latest released version of the ZDS can be downloaded  
from this site.  
1–6  
UM005100-IRR0400  
Z86L99 ICEBOX USERS MANUAL  
CHAPTER 2  
SET-UP AND INSTALLATION  
HARDWARE INSTALLATION  
Before installing the hardware, refer to Figure 2-1 for a diagram on connecting the emulator  
to a PC and power supply; Figure 2-3 provides option jumper locations.  
QUICK INSTALLATION INSTRUCTIONS  
To install the hardware utilizing a 5VDC wall-adaptor power supply, perform the following.  
1. Set the correct jumper setting for powering the ICE chip and target board. See Emulator  
connection on page 2-2.  
2. Plug a 5.0 VDC 1.5 Amp Wall Power Adaptor to the power connector on the  
Z86L9900100ZEM ICEBOX.  
3. Turn on the power supply and ensure that it is set to + 5.0V and current limited at 2.5A.  
4. Connect the serial cable to the PC.  
5. Connect the emulator to the target board (if performing in-circuit emulation).  
6. Set up the oscillator and option jumpers.  
7. Power up the Z86L9900100ZEM.  
UM005100-IRR0400  
2–1  
Hardware Installation  
Set-Up and Installation  
COMPLETE INSTALLATION INSTRUCTIONS  
The following procedures illustrate a complete step-by-step guide on installing the emulator.  
-
+
FIGURE 2-1. EMULATOR CONNECTION  
Set Power Jumper  
The Z86L9900100ZEM ICEBOX allows the user to power the emulator and target from a  
variety of different sources. Before powering the emulator the user should select their power  
configuration.  
CAUTION!  
The user must choose their power source before powering the emulator. Before selecting a  
power source study Figure 2-2, which shows a schematic of the J6 power jumper. Failure to  
properly configure the power source will result in damage to the emulator or target.  
2–2  
UM005100-IRR0400  
Set-Up and Installation  
Hardware Installation  
The user should choose from one of the below options when selecting their power source  
Jumper pin 1 to pin 3 and pin 2 to pin 4 to power both the ICE chip and target from the  
emulator’s adjustable voltage regulator (default setting)  
Jumper pin 1 to pin 3 to power the ICE chip with the emulator’s adjustable regulator  
Jumper pin 2 to pin 4 to power target with the emulator’s adjustable regulator  
Jumper pin 3 to pin 4 to power the ICE chip from the target  
CAUTION!  
When powering the target from the emulator ensure that the target’s power supply is discon-  
nected .  
Emulator Adjustable  
Voltage Regulator  
1
3
2
4
Target  
ICE chip  
6
8
5
7
Voltage Digital to Analog Converter  
FIGURE 2-2. J6 JUMPER SCHEMATIC  
UM005100-IRR0400  
2–3  
Hardware Installation  
Set-Up and Installation  
RS-232C  
Power  
Reset  
J6  
Debug  
pins  
Logic analyzer  
connector  
Voltage  
adjuster  
J2  
J1  
OTP programing  
interface  
J4  
J3  
P3  
JP1  
Ice Chip  
J5  
On  
S5  
1 2 3 4 5 6 7 8  
On  
On  
S4  
S2  
S1  
1 2 3 4 5 6 7 8  
On  
1 2 3 4 5 6 7 8  
On  
S6  
1 2 3 4 5 6 7 8  
1 2 3 4 5 6 7 8  
Oscillator  
JP2  
JP4  
JP3  
J8  
J7  
Target Pod P6  
Target Pod P5  
LEDS  
FIGURE 2-3. Z86L9900100ZEM ICEBOX EXTERNAL TOP VIEW  
2–4  
UM005100-IRR0400  
Set-Up and Installation  
Hardware Installation  
Connect the Power Supply  
1. If the power supply provides voltage adjustment:  
Turn the power supply on and adjust it to +5V  
Adjust the setting adjustment for at least 2.5A, if there is a current-limiting adjustment.  
2. Turn the power supply off.  
3. Locate the power cable (red wire, black wire, and banana plugs on the other end). Plug in  
the black banana plug into the black jack on the power supply (labeled COM, GND, or with  
the ground symbol). Plug the red plug into the red jack on the power supply (labeled +, +V  
or +5V).  
4. Plug the white connector on the other end of the cable into the matching 4-pin connector  
on the back side of the emulator. (This connection is keyed to ensure against an improper  
connection.)  
NOTE: The ZiLOG Power Supply Accessory Kit (ZPS05V00ZAC), which is sold separately, provides  
a fixed-5V Universal Output Power Supply, accepts 110V to 220V AC input, and includes a power  
cable and an in-line jack cable.  
CAUTION!  
Always check the supply voltage before plugging in the power cord.  
Connect the Serial Cable to the PC  
Locate the serial cable. Connect the male end to the female connector on the back of the ICE-  
BOX, and the female end to either the COM1, COM2, COM3, or COM4 connector of the  
host PC.  
NOTE: If connector availability is limited to a 9-pin COM1 through COM4, then use either a different  
cable or a 25-pin to 9-pin converter. (Available at any electronics store for a nominal fee.)  
UM005100-IRR0400  
2–5  
Hardware Installation  
Connect to the Design  
Set-Up and Installation  
Connect to the target design by performing the following steps:  
1. Locate the emulation cable for the device.  
CAUTION!  
Wear a properly grounded wrist strap or similar ESD protection before continuing.  
2. Plug the cable into the target device. Ensure that the pin 1 marking (as indicated by the red  
mark on the ribbon cable) matches pin 1 on the target board.  
3. Plug the other end of the cables into target pod on top of the emulator. See Figure 2-3 for  
the location of the target pod.  
4. Select the power source for the Z86D99 ICE chip by configuring the J6 jumper. See  
Table 2-2 for more information on jumper settings and Figure 2-3 for the location of the J6  
jumper.  
5. Select either the supplied 8MHz oscillator or the target’s oscillator to clock the ICE chip.  
See Jumper settings on page 2-10 for more information on how to configure the emulator  
to use the target boards oscillator.  
CAUTION!  
The user can not run the emulator’s oscillator if the target oscillator or XTAL is connected. At  
this time use one of the following methods to set the ICE-chip’s clock:  
To use the emulators oscillator remove the target’s oscillator and connect pin 2 to  
pin 3 on the J5 jumper  
To Use the target’s oscillator and connect pin 1 to pin 2 on the J5 jumper and remove  
the ICEBOX’s 8 MHz oscillator located at Y1.  
2–6  
UM005100-IRR0400  
Set-Up and Installation  
Adjust the voltage  
Hardware Installation  
If the emulator is powered by its adjustable regulator then the voltage must be manually set.  
Set the emulator voltage by performing the following steps:  
CAUTION!  
If the target and emulator are using separate power supplies then the ICE chip voltage must be  
adjusted to match the target’s device voltage. Failure to match the target devices voltage with  
the ICE chip’s voltage could result in damage to the emulator, target device or ICE chip.  
1. Locate the voltage adjuster on top of the emulator. See Figure 2-3 for the location of the  
voltage adjuster.  
2. Attach the voltmeter lead to either pin 1 or pin 2 on the J6 jumper and ground.  
3. Apply power to the emulator with the target device disconnected.  
4. Turn the voltage adjuster’s screw until the voltmeter read-out matches the target device  
output voltage.  
Connect Logic Analyzer (Optional)  
The logic analyzer can either be connected as part of the initial setup, or later as the user con-  
tinues working with their design.  
Connect to a logic analyzer by performing the following steps:  
1. Locate the cable for the logic analyzer.  
NOTE: Wear a properly grounded wrist strap or similar ESD protection before continuing.  
2. Plug the logic analyzer into the ZiLOG logic analyzer adapter (sold separately from the  
Z86L9900100ZEM ICEBOX kit).  
NOTE: The logic analyzer adapter can be ordered from customer support by requesting part number  
98C0289-001.  
3. Plug the cable from the ZiLOG logic analyzer adapter into the emulator. Ensure that the pin  
1 marking (as indicated by the red mark on the ribbon cable) matches the pin 1 on the target  
board. See Figure 2-3 for the location of the logic analyzer connector.  
UM005100-IRR0400  
2–7  
Software Installation  
Power the Emulator  
Set-Up and Installation  
If anything unusual (such as an unexpected sound and/or smell occurs when turning on the  
power supply, turn off the power supply and check the setting for the J6 jumper. See Emula-  
tor connection on page 2-2. If the power supply allows voltage adjustment, adjust it again to  
+5V. (It may be somewhat lower than +5V because of the emulator load.  
After power-up, press the RESET button to reset the ICE chip. (Pressing the RESET button  
avoids bus contention on the I/O lines.) If the emulator is not powering your design through  
the V pin, turn on the power supply of the design.  
CC  
CAUTION!  
If your design already has a power supply, do not power your design from the emulator V pin.  
CC  
When powering down, follow the procedure described below:  
1. Power down the target application board (if using the target power supply).  
2. Power down the emulator.  
NOTE: Refer to the complete Electrical Safeguards information shown on the inside cover of this man-  
ual.  
SOFTWARE INSTALLATION  
For more information on installing ZDS refer to the user manual PDF that is included on the  
installation CD-ROM or download ZDS literature from the ZiLOG web page at zilog.com.  
EMULATOR OPERATION  
The following topics guide the user on how to operate the emulator and configure jumper set-  
tings.  
RESETTING  
Press the RESET button on the emulator to reset the state of the target device and the status  
that was established using ZDS.  
For example, the emulator sets the program counter to %000C.  
After reset, wait until the Ready LED is ON and has finished blinking before starting ZDS.  
Refer to the LED Operation section of this chapter for more details.  
NOTE: Always press the RESET button on the emulator before starting ZDS.  
2–8  
UM005100-IRR0400  
Set-Up and Installation  
LED OPERATION  
Emulator Operation  
ZiLOG emulators use LEDs to communicate the different hardware states. The following  
table gives a description of the LEDs. The Z86L9900100ZEM LED’s are located on the right  
front of the emulator.  
FIGURE 2-4. FRONT LED ASSIGNMENTS  
LED  
Indication  
Description  
READY On  
Off  
Communicating in Bisync Mode and waiting for command  
Communicating in ASCII Mode or executing Bisync command  
RUN  
OTP  
PWR  
On  
Off  
Running user code  
Not running user code  
On  
Off  
The Emulator is performing OTP programing  
The Emulator is not performing OTP programming  
On  
Off  
Emulator is powered up and Self Test is completed  
Power is off  
Blink  
Emulator is self-testing  
UM005100-IRR0400  
2–9  
Emulator Operation  
JUMPER SETTINGS  
Set-Up and Installation  
The following table lists jumper setting that the are easily configured by the user. See  
Figure 2-3 for the jumper locations.  
TABLE 2-1. JUMPER SETTINGS  
Jumper Pin  
Position  
Description  
J1  
J2  
J3  
J4  
J6  
N/A  
N/A  
1-2  
1-2  
1-3  
Out (Default)  
Out (Default)  
Out (Default)  
Out (Default)  
In (Default)  
OTP programming adapter pins  
OTP programming adapter pins  
Reserved for data memory (do not use)  
Reserved for external memory (do not use)  
ICE chip is powered by the emulator’s adjustable  
regulator  
J6  
J6  
2-4  
5-7  
In (Default)  
In  
Target is powered by emulator’s adjustable  
regulator  
ICE chip is powered by a programmable regulator  
(The programmable regulator is currently not  
supported . Contact ZiLOG customer support to see if  
the programmable regulator has been released .)  
J6  
J7  
4-6  
In  
Target is not powered by emulator (See Emulator  
connection on page 2-2 for more information)  
N/A  
Open (Default)  
Do not Jumper, jumping these pins will short port  
4 pin 3 VCC! These two pins are used as a  
connector for the port 4 pin 3 IR LED.  
J8  
1-2  
1-2  
1-2  
1-2  
1-2  
1-2  
In (Default)  
Out  
Connects Ports 4 pin 3 to target  
Disconnects ports 4 pin 3 from target  
Disable Vbo  
J8  
JP1  
JP1  
JP2  
JP2  
In  
Out (Default)  
In (Default)  
Out  
Enable Vbo  
AVDD to VDD core  
Target board will supply power to AVDD (a 40 pin  
part is being emulated)  
JP3  
JP3  
JP4  
JP4  
1-2  
1-2  
1-2  
1-2  
In  
A 28 pin part is being emulated  
Out (Default)  
In (Default)  
Out  
VCC_I isolates from AVDD (use internal filter)  
Cap’s to AVDD  
N/A  
2–10  
UM005100-IRR0400  
Set-Up and Installation  
Emulator Operation  
TABLE 2-1. JUMPER SETTINGS (CONTINUED)  
Jumper Pin  
Position  
Description  
J1  
N/A  
1-2  
Out (Default)  
In  
OTP programming adapter pins  
JP5  
ICE chip uses target oscillator/clock (see Note at the  
bottom of the table)  
JP5  
2-3  
In * (Default)  
ICE chip uses emulator oscillator/clock (see Note at  
the bottom of the table)  
NOTE: The user can not run the emulator’s oscillator if the target oscillator or XTAL is connected. At  
this time use one of the following methods to set the ICE-chip’s clock:  
To use the emulators oscillator remove the target’s oscillator and connect pin 2 to pin 3 on  
the J5 jumper  
To use the target’s oscillator and connect pin 1 to pin 2 on the J5 jumper  
Setting Jumpers for Targets  
For all targets ensure that JP2 and JP4 are always connected. For 40 pin targets also connect  
JP3.  
UM005100-IRR0400  
2–11  
Emulator Operation  
DIP SETTINGS  
Set-Up and Installation  
DIP switch banks S1 and S3 are used to disable digital functions for ports 1 and 3. DIP  
switch banks S2, S4, S5 and S6 are used to emulate port pin pull-up transistors for the Ice  
Chip. See Figure 2-3 for the location of the DIP switches. The following tables list DIP set-  
tings that are easily configured by the user.  
TABLE 2-2. DIP SETTINGS TO DISABLE DIGITAL FUNCTIONS  
DIP bank Switch Description  
S1  
S1  
S1  
S1  
S1  
S1  
S1  
S1  
1
2
3
4
5
6
7
8
Turn off to disable digital functions for Port 5 Pin 0  
Turn off to disable digital functions for Port 5 Pin 1  
Turn off to disable digital functions for Port 5 Pin 2  
Turn off to disable digital functions for Port 5 Pin 3  
Turn off to disable digital functions for Port 4 Pin 4  
Turn off to disable digital functions for Port 4 Pin 5  
Turn off to disable digital functions for Port 4 Pin 6  
Turn off to disable digital functions for Port 4 Pin 7  
TABLE 2-3. DIP SETTINGS TO SET PULL-UP RESISTORS  
DIP bank Switch Description  
S2  
S2  
S2  
S2  
S2  
S2  
S2  
S2  
S4  
S4  
S4  
S4  
S4  
1
2
3
4
5
6
7
8
1
2
3
4
5
Turn on to set a pull-up resistor for Port 2 Pin 0  
Turn on to set a pull-up resistor for Port 2 Pin 1  
Turn on to set a pull-up resistor for Port 2 Pin 2  
Turn on to set a pull-up resistor for Port 2 Pin 3  
Turn on to set a pull-up resistor for Port 2 Pin 4  
Turn on to set a pull-up resistor for Port 2 Pin 5  
Turn on to set a pull-up resistor for Port 2 Pin 6  
Turn on to set a pull-up resistor for Port 2 Pin 7  
Turn on to set a pull-up resistor for Port 5 Pin 0  
Turn on to set a pull-up resistor for Port 5 Pin 1  
Turn on to set a pull-up resistor for Port 5 Pin 2  
Turn on to set a pull-up resistor for Port 5 Pin 3  
Turn on to set a pull-up resistor for Port 5 Pin 4  
2–12  
UM005100-IRR0400  
Set-Up and Installation  
Emulator Operation  
TABLE 2-3. DIP SETTINGS TO SET PULL-UP RESISTORS (CONTINUED)  
DIP bank Switch Description  
S4  
S4  
S4  
S5  
S5  
S5  
S5  
S5  
S5  
S5  
S5  
S6  
S6  
S6  
S6  
S6  
S6  
S6  
S6  
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
Turn on to set a pull-up resistor for Port 5 Pin 5  
Turn on to set a pull-up resistor for Port 5 Pin 6  
Turn on to set a pull-up resistor for Port 5 Pin 7  
Turn on to set a pull-up resistor for Port 6 Pin 0  
Turn on to set a pull-up resistor for Port 6 Pin 1  
Turn on to set a pull-up resistor for Port 6 Pin 2  
Turn on to set a pull-up resistor for Port 6 Pin 3  
Turn on to set a pull-up resistor for Port 6 Pin 4  
Turn on to set a pull-up resistor for Port 6 Pin 5  
Turn on to set a pull-up resistor for Port 6 Pin 6  
Turn on to set a pull-up resistor for Port 6 Pin 7  
Turn on to set a pull-up resistor for Port 4 Pin 0  
Turn on to set a pull-up resistor for Port 4 Pin 1  
Turn on to set a pull-up resistor for Port 4 Pin 2  
Turn on to set a pull-up resistor for Port 4 Pin 3  
Turn on to set a pull-up resistor for Port 4 Pin 4  
Turn on to set a pull-up resistor for Port 4 Pin 5  
Turn on to set a pull-up resistor for Port 4 Pin 6  
Turn on to set a pull-up resistor for Port 4 Pin 7  
NOTE: Mask option pull-up resistance at 3V is about 200k Ohm +/-50% at room temperature. Lower  
voltage may cause an increase in resistance.  
UM005100-IRR0400  
2–13  
PERFORMING OTP PROGRAMMING  
The Z86L9900100ZEM ICEBOX is designed for OTP programming. To perform OTP pro-  
gramming perform the following steps:  
1. Locate the supplied OTP adapter for the micro controller you wish to program. Consult  
Table 1-1for the proper OTP adapter.  
2. Insert the OTP adapter into the emulator’s OTP Programming socket (J1 and J2), see  
Figure 2-3.  
3. Place the micro controller into the OTP programing adapter.  
4. If the adapter is equipped with a ziff socket, ensure that the ZIF socket locking lever is in  
the down (closed) position.  
5. Perform OTP programing. Consult the ZDS user manual for more information on OTP  
programing.  
6. Pull straight up on the micro controller to remove it from the OTP programing adapter.  
NOTE: Be careful not to bend the micro controller’s pins when removing it from the OTP adapter.  
Z86L99 ICEBOX USERS MANUAL  
CHAPTER 3  
OVERVIEW  
EMULATION  
The Z86L9900100ZEM ICEBOX uses the Z86D99 ICE chip to provide emulation for the Z8  
family of IR controllers. The emulator is capable of OTP programming for the family being  
emulated. The user can manually set pull-up resistors and adjust the voltage of the ICE chip  
to match the target’s voltage.  
UM005100-IRR0400  
3–1  
Using ZDS  
Overview  
USING ZDS  
This emulator is fully compatible with ZiLOG Developer Studio (ZDS) software. The fol-  
lowing steps briefly describe the procedures necessary to setup and create projects with the  
Z86L9900100ZEM emulator. A summary of the emulator’s available debug windows is also  
included at the end of this chapter.  
For more detailed information on using ZDS, refer to the ZDS User Manual (in PDF format)  
located on the installation CD-ROM, or download the latest information from our web site at  
www.zilog.com.  
SELECT THE EMULATOR  
To select the emulator and create a new project, perform the following steps:  
1. Open ZDS by selecting Start>Programs>Zilog Developer Studio> ZDS.  
2. Choose New Project from the File menu. The New Project dialog box appears.  
NOTE: If the project has already been created, select Target from the Project menu and perform the  
following steps for the ZiLOG MCU Database dialog box. See Figure 3-1.  
FIGURE 3-1. NEW PROJECT DIALOG BOX  
3. Select Applicationin the Selection by field.  
4. Select IR Remotefrom the Master pop-up list.  
5. Select a microcontroller from the IR Remote family in the Project Target pop-up list.  
6. Select Z86L9900100ZEMin the Emulator pop-up list.  
3–2  
UM005100-IRR0400  
Overview  
Using ZDS  
7. Click on the browse button (...) in the Project Name field. The New Project Browse  
dialog box appears.  
8. Enter the project file name and select a path in the New Project Browse dialog box.  
NOTE: All build output files, such as linker and assembly files are saved in the same directory as the  
project.  
9. Click Save. The project name appears in the Project Name field in the New Project dialog  
box.  
10. Click on Chip Data to view the micro controller specifications.  
NOTE: Fields in the Chip Data page are read-only and can’t be modified.  
11. Click OK. The new project is saved as the name specified in the New Project Browse  
dialog box.  
12. Select Emulator Configuration from the Project menu. The Emulator Configuration  
dialog box appears. See Figure 3-2.  
FIGURE 3-2. EMULATOR CONFIGURATION DIALOG BOX  
13. Ensure that Emulator is selected in the Module field.  
14. Select the port the emulator is connected to from the Port pop-up list.  
15. Select 57600from the Baud Rate pop-up list.  
16. Click OK to close and apply the Emulator Configuration options.  
17. Select Save Project from the File menu to save the emulator configuration setting.  
UM005100-IRR0400  
3–3  
Using ZDS  
Overview  
OPEN A PROJECT AND ADD FILES  
A previously created project has the following attributes saved with it:  
Target settings  
Assembler and Linker settings for the specified target  
Source files (including header files)  
NOTE: Use the Project Viewer window to view and access the various files in any given project.  
Perform the following steps to open a previously created project:  
1. Select Open Project from the File menu. The Open Project dialog box appears.  
2. In the Open Project dialog box, select the previously created project. The project appears  
in the Project Viewer window. See Figure 3-3.  
FIGURE 3-3. PROJECT VIEWER WINDOW  
Add an existing file  
Perform the following steps to add an existing file to a project:  
1. Select Add to Project>Files from the Project menu. The Insert Files into Project dialog  
box appears. See Figure 3-4.  
3–4  
UM005100-IRR0400  
Overview  
Using ZDS  
FIGURE 3-4. INSERT FILES INTO PROJECT DIALOG BOX  
2. Select the file to add to the project.  
3. Click Open. The file appears in the Project Viewer window. See Figure 3-5.  
FIGURE 3-5. PROJECT VIEWER WINDOW WITH FILE  
4. Double-click on the file in the Project Viewer window. The file appears in the ZDS main  
Edit window.  
NOTE: In some cases, non-editable files, such as .obj files need to be included in a project.  
These files will be displayed in the source file list, but cannot be opened. When the project is built,  
these files are automatically linked.  
5. Select Update All Dependencies from the Build menu. The Dependencies folder list  
in the Project Viewer window is updated.  
UM005100-IRR0400  
3–5  
Using ZDS  
Add a new file  
Overview  
1. Select Add to Project>New from the Project menu. The Insert New Files Into  
Project dialog box appears.  
2. Type a file name in the File Name field.  
3. Click Open. The new file name appears in the Project Viewer window with a .asm  
suffix, and a blank Edit window also appears.  
NOTE: Header and Included files do not have to be added. The program detects those called by the  
source code.  
3–6  
UM005100-IRR0400  
Overview  
Available Debug Windows  
AVAILABLE DEBUG WINDOWS  
The following table lists the debug windows that are available using ZDS.  
TABLE 3-1. DEBUG WINDOWS  
Window  
Function  
(Updated values will display in red)  
Shows the symbols and the contents of the registers (see the  
Watch  
ZDS user manual for more information)  
Shows the contents of the Z8 standard registers  
Z8 Standard  
Registers  
Allows the user to monitor, edit, and download a file.ldor  
file.hexinto the Code Memory from generated assembly  
source code  
Code Memory  
Tracks a specific address entered in the Code Address edit box  
Shows code memory along with the corresponding  
Disassembly  
disassembled code  
Allows the user to edit, and download a file.ld or file.hex into  
the Code memory  
Follows the program counter  
Provides a complete scroll down with this window, however  
the scroll up is limited  
Accesses the disassembly of code at the address specified in  
the Code Address field  
The Disassembly window is automatically displayed when  
debugging hex code or whenever there is no corresponding  
source file available at the address specified by the program  
counter  
Shows all Z8 internal and external registers, all RAM pointer  
Z8 Register File  
and data registers, status registers and status flags, and stacks  
Monitor and edit write-able registers in this window  
Displays the Z8 Expanded Register banks that are specified in  
Z8 Expanded  
Register  
the configuration  
Monitor and edit write-able registers directly in this window by  
selecting a specific bank tab  
Modify and view working registers in this window  
Working Registers  
UM005100-IRR0400  
3–7  
Available Debug Windows  
Overview  
TABLE 3-1. DEBUG WINDOWS (CONTINUED)  
Window  
Function  
(Updated values will display in red)  
Modify the timer/counter registers in this window  
Timer Counter  
Registers  
Monitor and edit port registers in this window  
Display address from FF00 to FFFF  
Ports Register  
Internal Data  
Memory  
3–8  
UM005100-IRR0400  
Z86L99 ICEBOX USERS MANUAL  
APPENDIX A  
TROUBLESHOOTING GUIDE  
INTRODUCTION  
Before contacting a ZiLOG representative or submitting a Problem Report, please follow  
these simple steps. Also, check the Precautions and Limitations sections in the Product Infor-  
mation document included with the emulator to eliminate other possible known problems. If  
a hardware failure is suspected, contact a local ZiLOG representative for assistance.  
If the initial ZiLOG screen is not appearing after selecting the COM port and the screen mes-  
sage displays Time-out while reading:  
1. Check the RS-232C cable connection and communication port selection in ZDS. See Select  
the Emulator on page 3-2 for more information on how to configure the host PC’s port.  
2. Reset the emulator and ZDS.  
3. If you are using the emulator’s oscillator, ensure that you removed the target’s oscillator  
and connected pin 2 to pin 3 on the J5 jumper.  
4. If ICEBOX stops working after connecting to the target, check whether the target crystal is  
removed while using the ICEBOX’s oscillator.  
5. Try connecting another cable.  
6. Check if transmit/receive signals need to be swapped.  
NOTE: On some DB9 connectors for the COM ports, the transmit/receive signal may be swapped and  
a Null Modem adapter may be required.  
7. Ensure that the power supply is connected, is turned on, and power is available.  
8. Ensure that the power supply is set at +4.75 VDC to +5.25 VDC Max (+5.0 VDC typical).  
9. Ensure that the J6 power jumper has been properly configured. See Emulator connection  
on page 2-2 for more information on setting the J6 jumper.  
10. Check if power supply is supplying the required current (0.8A typical) to the emulator.  
UM005100-IRR0400  
A–1  
Counter Jumps to Unexpected Address  
Troubleshooting Guide  
11. Check P42 pin. If P42 stays low check the target pod and ensure that it is not shorting to  
ground. If it is shorted, ensure that you are using the proper emulation pod, see Table 1-1.  
12. After resetting the emulator, wait a minimum of 5 seconds before running ZDS.  
13. If P42 always shows low, check the 40-pin target pod’s pin 31.  
NOTE: The previous Z86L71 and Z86L98 ICEBOX 40 pin target pod have pin 31 connecting to  
ground for emulating the L73/87/89. That target pod can not be used for Z86L990 emulation. Only use  
the target cable which is shipped with the Z86L99 ICEBOX.  
COUNTER JUMPS TO UNEXPECTED ADDRESS  
Any instruction other than a DIinstruction is used to disable interrupts. Possible causes  
include:  
The stack overflows into the general register locations.  
Extra POP, PUSH, IRET, or RETis encountered (stack unbalanced).  
Program resets repeatedly.  
– Program counter rolls over from value FFFF to 0000 and proceeds back to the  
beginning of program.  
– Watch-Dog Timer (WDT) is not initialized or refreshed.  
Unintialized interrupt vector is activated. The interrupt vector is not set to the interrupt  
handler.  
A–2  
UM005100-IRR0400  
Troubleshooting Guide  
ZDS Error Messages  
ZDS ERROR MESSAGES  
CAN NOT OPEN WINDOWS  
If this message appears while attempting to open a window in ZDS, there may be too many  
applications running. Try closing the other active applications or exit and restart your PC.  
OUT OF SYNCHRONIZATION WITH THE EMULATOR  
This message appears whenever communication between the emulator and the PC is inter-  
rupted.  
1. Ensure that the power cable is connected.  
2. Ensure that the RS-232C cable is connected.  
3. Change the baud rate setting (default is 19200). A lower setting usually improves  
communications reliability.  
4. Reestablish communication between ZDS and the emulator. See the ZDS user manual for  
more information establishing communication with an emulator.  
UM005100-IRR0400  
A–3  
Z86L99 ICEBOXUSERS MANUAL  
APPENDIX B  
PROBLEM/SUGGESTION REPORT FORM  
If you experience any problems while operating this product, or if you note any inaccuracies  
while reading the User's Manual, please copy this form, fill it out, then mail or fax it to  
ZiLOG. We also welcome your suggestions!  
Customer Information  
Name  
Country  
Company  
Address  
Telephone  
Fax Number  
E-Mail Address  
City/State/ZIP  
Product Information and Return Information  
Serial # or Board Fab #/Rev. #  
ZiLOG, Inc.  
Software Version  
System Test/Customer Support  
910 E. Hamilton Ave., Suite 110, MS 4-3  
Campbell, CA 95008  
Manual Number  
Host Computer Description/Type  
Fax Number: (408) 558-8536  
Email: tools@zilog.com  
Problem Description or Suggestion  
Provide a complete description of the problem or your suggestion. If you are reporting a  
specific problem, include all steps leading up to the occurrence of the problem. Attach  
additional pages as necessary.  
______________________________________________________________________________________  
______________________________________________________________________________________  
______________________________________________________________________________________  
UM005100-IRR0400  
B–1  
Z86L99 ICEBOX USERS MANUAL  
GLOSSARY  
Address Space  
Physical or logical area of the target systemÕs  
Memory Map. The memory map could be physically  
partitioned into ROM to store code, and RAM for data.  
The memory can also be divided logically to form sepa-  
rate areas for code and data storage.  
ANSI  
ASCII  
ASM  
American National Standards Institute.  
American Standard Code of Information Interchange.  
Assembler File.  
ASYNC  
ATM  
Asynchronous Communication Protocol.  
Asynchronous Transfer Mode.  
B
Binary.  
Baud  
Binary  
BISYNC  
Unit of measure of transmission capacity.  
Number system based on 2. A binary digit is a bit.  
Bidirectional Synchronous Communication Protocol.  
Bisynchronous  
Communications  
A protocol for communications data transfer used  
extensive in mainframe computer networks. The  
UM005100-IRR0400  
Glossary–1  
Glossary  
sending and receiving computers synchronize their  
clocks before data transfer may begin.  
Bit  
A digit of a binary system. It has only two possible  
values: 0 or 1.  
BPS  
Bits Per Second. Number of binary digits transmitted  
every second during a data-transfer procedure.  
Buffer  
Bug  
Storage Area in Memory.  
A defect or unexpected characteristic or event.  
Bus  
In Electronics, a parallel interconnection of the internal  
units of a system that enables data transfer and  
control Information.  
Byte  
A collection of four sequential bits of memory. Two  
sequential bytes (8 bits) comprise one word.  
CALL  
This command invokes a subroutine  
Checksum  
A field of one or more bytes appended to a block of n  
words which contains a truncated binary sum formed  
from the contents of that block. The sum is used to  
verify the integrity of data in a ROM or on a tape.  
COM  
Device name used to designate a communication  
port.  
Glossary–2  
UM005100-IRR0400  
Glossary  
Control Section  
A continuous logical area containing code or user  
data. Each control section has a name. The linker puts  
all those control sections with the same name in one  
entity. The linker provides address spaces to the  
control sections. There are either absolute control  
sections or relocatable ones.  
CPU  
Central Processing Unit.  
Cross-Linkage Editor  
A linkage editor that executes on a processor that is not  
the same as the target processor.  
DSP  
Digital Signal Processing. A specialized micropro-  
cessor that is tailored to perform high repetition math  
processing and improve signal quality.  
Emulator  
An emulation device. For example, an In-Circuit  
Emulator (ICE) module duplicates the behavior of the  
chip it emulates in the circuit being tested.  
External Symbol  
GUI  
A symbol that is referenced in the current program file  
but is defined in another program file.  
Graphical User Interface. The windows and text that a  
user sees on their computer screen when they are  
using a program.  
H
Hexadecimal, Half-Carry Flag.  
Hexadecimal.  
Hex  
Hexadecimal  
A Base-16 Number System. Hex values are often  
substituted for harder to read binary numbers.  
ICE  
In-Circuit Emulator. A ZiLOG product which supports  
the application design process.  
IE  
Interrupt Enable.  
UM005100-IRR0400  
Glossary–3  
Glossary  
IM  
Immediate Data Addressing Mode.  
Interrupt Mask Register.  
Interrupt Mask Register.  
Increment.  
IMASK  
IMR  
INC  
INCW  
Initialize  
Increment Word.  
To establish start-up parameters, typically involving  
clearing all of some part of the deviceÕs memory space.  
Instruction  
INT  
Command.  
Interrupt.  
Internal Symbol  
A symbol that is defined in a program file. This symbol  
could be visible to multiple functions within the same  
program file.  
I/O  
Input/Output. In computers, the part of the system that  
deals with interfacing to external devices for input or  
output, such as keyboards or printers.  
IPR  
Ir  
Interrupt Priority Register.  
Indirect Working-Register Pair Only.  
IR  
Infrared. A light frequency range just below that of  
visible light.  
IRQ  
Interrupt Request.  
ISDN  
ISO  
Integrated Services Digital Network.  
International Standards Organization.  
Glossary–4  
UM005100-IRR0400  
Glossary  
JP  
Jump.  
JR  
Jump Relative.  
Library  
A File Created by a Librarian. This file contains a  
collection of object modules that were created by an  
assembler or directly by a C compiler.  
Local Symbol  
Symbol visible only to a particular function within a  
program file.  
LSB  
Least Significant Bit.  
Microcontroller or Microcomputer Unit.  
Minus.  
MCU  
MI  
MLD  
Multiply and Load.  
Multiply and ADD.  
MPYA  
MPYS  
MSB  
Multiply and Subtract.  
Most Significant Bit.  
A Group of 4 Bits.  
Nibble  
NMI  
Non-Maskable Interrupt.  
No Operation.  
NOP  
Object Module  
Programming code created by assembling a file with  
an assembler or compiling a file with a compiler.  
These are relocatable object modules and are input to  
the linker in order to produce an executable file.  
OMF  
Object Module Format.  
UM005100-IRR0400  
Glossary–5  
Glossary  
OPC  
Operation Code.  
Op Code  
OTP  
Operation Code.  
One-Time Programmable.  
Port configuration register.  
PCON  
PER  
Peripheral. A device which supports the import or  
output of information.  
POP  
POR  
Port  
Retrieve a Value from the Stack.  
Power-On Reset.  
The point at which a communications circuit termi-  
nates at a Network, Serial, or Parallel Interface card.  
PRE  
Prescaler.  
PROM  
Protocol  
Programmable Read-Only Memory.  
Formal set of communications procedures governing  
the format and control between two communications  
devices. A protocol determines the type of error  
checking to be used, the data compression method, if  
any, how the sending device will indicate that it has  
finished sending a message, and how the receiving  
device will indicate that it has received a message.  
PRT  
PTR  
PTT  
Programmable Reload Timer or Print.  
Pointer.  
Post, Telephone, and Telegraph. Agency in many  
countries that is responsible for providing telecommu-  
nication approvals.  
Glossary–6  
UM005100-IRR0400  
Glossary  
Public/Global Symbol  
A programming variable that is available to more than  
one program file.  
PUSH  
r
Store a Value In the Stack.  
Working Register Address.  
R
Register or Working-Register Address, Rising Edge.  
Relative Address.  
RA  
RAM  
Random-Access Memory. A memory that can be  
written to or read at random. The device is usually  
volatile, which means the data is lost without power.  
RC  
Resistance/Capacitance.  
RD  
Read.  
Reset.  
RES  
Resolution  
In a digital image, the total number of pixels in the  
horizontal and vertical directions.  
RFSH  
ROM  
Refresh.  
Read-Only Memory. Nonvolatile memory that stores  
permanent programs. ROM usually consists of  
solid-state chips.  
ROMCS  
RP  
ROM Chip Select.  
Register Pointer.  
RR  
Read Register or Rotate Right.  
Set C Flag.  
SCF  
UM005100-IRR0400  
Glossary–7  
Glossary  
SIO  
SL  
Serial Input/Output.  
Shift Left or Special Lot.  
Shift Left Logical.  
Stop Mode Recovery.  
Serial Number.  
SLL  
SMR  
SN  
SOIC  
SP  
Small Outline IC.  
Stack Pointer.  
SPH  
SPI  
Stack Pointer High.  
Serial Peripheral Interface.  
Stack Pointer Low.  
Static Random Access Memory.  
Shift Right.  
SPL  
SRAM  
SR  
SRA  
SRC  
SSI  
Shift Right Arithmetic.  
Source.  
Small Scale Integration. Chip that contains 5 to 50  
gates or transistors.  
Static  
Characteristic of Random Access Memory that  
enables It to operate without clocking signals.  
ST  
Status.  
STKPTR  
Stack Pointer.  
Glossary–8  
UM005100-IRR0400  
Glossary  
SUB  
Subtract.  
SVGA  
Super Video Graphics Adapter.  
Software.  
S/W  
SWI  
Software Interrupt.  
Symbol Definition  
Symbol defined when the symbol name is associ-  
ated with a certain amount of memory space,  
depending on the type of the symbol and the size of  
Its dimension.  
Symbol Reference  
SYNC  
Symbol referenced within a program flow, when-  
ever It is accessed for a read, write, or execute  
operation.  
Synchronous Communication Protocol. An event or  
device is synchronized with the CPU or other process  
timing.  
TC  
Time Constant.  
TCM  
TCR  
TMR  
UART  
Trellis Coded Modulation.  
Timer Control Register.  
Timer Mode Register.  
Universal Asynchronous Receiver Transmitter.  
Component or functional block that handles asynchro-  
nous communications. Converts the data from the  
parallel format in which it is stored, to the serial format  
for transmission.  
UGE  
UGT  
Unsigned Greater Than or Equal.  
Unsigned Greater Than.  
UM005100-IRR0400  
Glossary–9  
Glossary  
ULE  
Unsigned Less Than or Equal.  
Unsigned Less Than.  
ULT  
UM  
UserÕs Manual.  
USART  
Universal Synchronous/Asynchronous  
Receiver/Transmitter. Can handle synchronous as well  
as asynchronous transmissions.  
USB  
USC  
UTB  
Universal Serial Bus.  
Universal Serial Controller.  
Use Test Box. A board or system to test a particular  
chip in an end-use application.  
V
Volt, Overflow Flag.  
V
V
V
Supply Voltage.  
CC  
DD  
PP  
Voltage from the Digital Power Supply.  
Programmed Voltage.  
VRAM  
Video Random-Access Memory. A special form of  
RAM chip that has a separate serial-output port for  
display refresh operations. This architecture speeds up  
video adaptor performance.  
V
Analog Reference Voltage.  
REF  
WDT  
Watch-Dog Timer. A timer that, when enabled under  
normal operating conditions, must be reset within the  
time period set within the application (WDTMR (1,0)). If  
the timer is not reset, a Power-on Reset occurs. Some  
earlier manuals refer to this timer as the WDTMR.  
Glossary–10  
UM005100-IRR0400  
Glossary  
WDTOUT  
Word  
Watch-Dog Timer Output.  
Amount of data a processor can hold in its registers  
and process at one time. A DSP word is often 16 bits.  
Given the same clock rate, a 16-bit controller  
processes four bytes in the same time it takes an 8-bit  
controller to process two.  
WR  
WS  
X
Write.  
Wafer Sort.  
Indexed Address, Undefined.  
Bitwise Exclusive OR.  
Crystal.  
XOR  
XTAL  
Z
Zero, Zero Flag.  
ZASM  
ZiLOG Assembler. ZiLOGÕs program development  
environment for DOS.  
ZDS  
ZiLOG Developer Studio. ZiLOGÕs program develop-  
ment environment for Windows 95/98/NT.  
ZEM  
ZiLOG Emulator.  
ZiLOG Symbol Format  
Three fields per symbol including a string containing  
the Symbol Name, a Symbol Attribute, and an Absolute  
Value in Hexadecimal.  
ZLD  
ZiLOG Linkage Editor. Cross linkage editor for ZiLOGÕs  
microcontrollers.  
ZLIB  
ZiLOG Librarian. Librarian for creating library files from  
locatable object modules for the ZiLOG family of  
microcontrollers.  
UM005100-IRR0400  
Glossary–11  
Glossary  
ZMASM  
ZDS  
ZiLOG Macro Cross Assembler.  
ZiLOGÕs program development environment for  
Windows 3.1 and up.  
ZOMF  
ZiLOGÕs Object Module Format. The object module  
format used by the linkage editor.  
Glossary–12  
UM005100-IRR0400  
Z86L99 ICEBOX USERS MANUAL  
INDEX  
Quick installation . . . . . . . . . . . . . .2-1  
Requirements . . . . . . . . . . . . . . . . .1-5  
RESET . . . . . . . . . . . . . . . . . . . . . .2-8  
Resetting. . . . . . . . . . . . . . . . . . . . .2-8  
Selecting the emulator . . . . . . . . . . .3-2  
serial cable . . . . . . . . . . . . . . . . . . .2-5  
Software Installation . . . . . . . . . . . .2-8  
Software Setup . . . . . . . . . . . . . . . .3-2  
Supported ZiLOG Devices . . . . . . . .1-3  
Target connectors . . . . . . . . . . . . . .2-4  
Troubleshooting . . . . . . . . . . . . . . A-1  
A–D  
Adjust the voltage. . . . . . . . . . . . . . 2-7  
Adjusting power . . . . . . . . . . . . . . . 2-7  
Available Debug Windows . . . . . . . 3-7  
Chip Data. . . . . . . . . . . . . . . . . . . . 3-3  
Choosing the IceChip . . . . . . . . . . . 2-8  
Clocks . . . . . . . . . . . . . . . . . . . . . . 1-3  
Connect to Your Design . . . . . . . . . 2-6  
E–I  
Error Messages. . . . . . . . . . . . . . . .A-3  
Header and Included files . . . . . . . . 3-6  
Insert Files . . . . . . . . . . . . . . . . . . . 3-4  
installation instructions . . . . . . . . . . 2-2  
U–Z  
voltage adjuster . . . . . . . . . . . . . . . .2-7  
ZDS  
adding files . . . . . . . . . . . . . . . . .3-4  
Create a New Project . . . . . . . . . .3-2  
Debug windows. . . . . . . . . . . . . .3-7  
New Project . . . . . . . . . . . . . . . .3-3  
obj files. . . . . . . . . . . . . . . . . . . .3-5  
Open a project . . . . . . . . . . . . . . .3-4  
Project Viewer window . . . . . . . .3-6  
J–N  
jumper settings . . . . . . . . . . . . . . . . 2-8  
Kit Contents . . . . . . . . . . . . . . . . . . 1-4  
LED Operation. . . . . . . . . . . . . . . . 2-9  
Limitations. . . . . . . . . . . . . . . . . . . 1-2  
logic analyzer. . . . . . . . . . . . . . . . . 2-7  
O–T  
OTP programming . . . . . . . . . . . . 2-14  
power supply . . . . . . . . . . . . . . . . . 2-5  
adjusting . . . . . . . . . . . . . . . . . . 2-5  
problems . . . . . . . . . . . . . . . . . . 2-8  
settings . . . . . . . . . . . . . . . . . . . 2-1  
powering down. . . . . . . . . . . . . . . . 2-8  
UM005100-IRR0400  
Index–1  
A
B
C
D
E
( U13)  
( U13)  
( U13)  
( U13)  
( U13)  
( U13)  
( U13)  
( U13)  
( U8)  
( U8)  
( U8)  
( U8)  
( U10)  
( U10)  
( U12)  
( U12)  
( U9)  
( U9)  
4
3
2
1
4
3
2
1
VCC  
C8  
C9  
C10  
C11  
C12  
C13  
C14  
C15  
C16  
C17  
C18  
C19  
C20  
C21  
C22  
C23  
C24  
C25  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
0.1UF  
( U9)  
( U9)  
( U11)  
( U11)  
( U11)  
( U11)  
( U15)  
( U15)  
( U16)  
( U16)  
( U14)  
( U14)  
( Y1)  
( U1)  
( U1)  
( U2)  
( U2)  
( U3)  
VCC  
C26  
0.1UF  
C27  
0.1UF  
C28  
0.1UF  
C29  
0.1UF  
C30  
0.1UF  
C31  
0.1UF  
C32  
0.1UF  
C33  
0.1UF  
C34  
0.1UF  
C35  
0.1UF  
C36  
0.1UF  
C37  
0.1UF  
C38  
0.1UF  
C39  
0.1UF  
C40  
0.1UF  
C41  
0.1UF  
C42  
0.1UF  
C43  
0.1UF  
( U3)  
( U10)  
( U1)  
( U3)  
( U10)  
( U2)  
( U3)  
( U12)  
( U2)  
( U6)  
( U7)  
( U5)  
VCC  
C44  
0.1UF  
C45  
0.1UF  
C46  
0.1UF  
C47  
0.1UF  
C48  
0.1UF  
C49  
0.1UF  
C78  
0.1UF  
+
C72  
100UF  
( U12)  
( U15)  
( U15)  
( U16)  
( U16)  
( U14)  
( U14)  
( U17)  
( U17)  
( U17)  
( U17)  
( U17)  
( U18)  
( U18)  
( U1)  
VCC_I  
C50  
0.1UF  
C51  
0.1UF  
C52  
0.1UF  
C53  
0.1UF  
C54  
0.1UF  
C55  
0.1UF  
C56  
0.1UF  
C57  
0.1UF  
C58  
0.1UF  
C59  
0.1UF  
C60  
0.1UF  
C61  
0.1UF  
C62  
0.1UF  
C63  
0.1UF  
C64  
0.1UF  
C65  
0.1UF  
C66  
0.1UF  
C67  
0.1UF  
VCC  
GND  
VCC_I  
1
2
3
4
5
1
2
3
4
5
C68  
0.1UF  
C69  
0.1UF  
C70  
0.1UF  
+
C71  
100UF  
+
C77  
100UF  
CON5  
CON5  
BYP AS S /DECOUP LING CAP ACITORS  
Title  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
Size  
B
Docume nt Numbe r  
R e v  
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
1
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 1  
A
B
C
D
E
P4[0..7]  
P5[0..7]  
P2[0..7]  
LG  
P _CT_CLK  
P _TBD3  
P _TBD2  
P _TBD1  
P _CLK  
P _CLR  
4
3
2
1
4
3
2
1
nP _P GM  
P _WR_RD  
P _CLK_CE  
P GM_LOGIC  
P _RD_WR  
P OWER  
P _RD_WR  
R32_64  
nEXR_OFF  
nIRQ_ACK  
nMAS _I  
S CLK  
nMDS _I  
nS YNC  
nRS T_frI  
FG_BG  
AD_M[7..0]  
A_I[15..8]  
AD_I[7..0]  
D_P[7..0]  
nIRQ_ACK  
P _CLK_CE  
P _WR_RD  
nP _P GM  
P _CLR  
P _CLK_CE  
P _WR_RD  
nP _P GM  
P _CLR  
P _AL_CLK  
P _AH_CLK  
P _CLK  
P _CLK  
nRS T_frI  
FG_BG  
P _TBD1  
P _TBD2  
P _TBD3  
P _TBD1  
P _TBD2  
P _TBD3  
P OWER LOGIC  
AD_I[7..0]  
nDS _I  
AD_M[7..0]  
P4_I[0..7]  
P5_I[0..7]  
P6_I[0..7]  
P2_I[0..7]  
R_W_I  
nAS_I  
P ROGRAMMING LOGIC  
nWR_DAC  
LOGIC ANALYZER CONNECTOR  
TRANS  
CP LD  
ICE  
C TR L  
nAS _Itv  
nAS _Itv  
nAS _Itv  
P2_I[0..7]  
P6_I[0..7]  
P5_I[0..7]  
P4_I[0..7]  
nDS _Itv  
P 34tv  
A_Itv[15..8]  
nDS _Itv  
P 34tv  
A_Itv[15..8]  
nDS _Itv  
P 34tv  
A_Itv[15..8]  
P 34_nDM  
A_I[15..8]  
nDS _I  
P 34_nDM  
A_I[15..8]  
nDS _I  
AD_I[7..0]  
R_W_I  
nS YNC  
nMDS _I  
S CLK  
P 34_nDM  
A_I[15..8]  
nDS _I  
AD_Itv[7..0]  
R_W_Itv  
nS YNCtv  
nMDS _Itv  
S CLKtv  
nMAS _Itv  
nDTMRtv  
XTAL1tv  
nXROFFtv  
nAS_I  
P _CT_CLK  
AD_Itv[7..0]  
R_W_Itv  
nS YNCtv  
nMDS _Itv  
S CLKtv  
nMAS _Itv  
nDTMRtv  
XTAL1tv  
nXROFFtv  
AD_Itv[7..0]  
R_W_Itv  
nS YNCtv  
nMDS _Itv  
S CLKtv  
nMAS _Itv  
nDTMRtv  
XTAL1tv  
nXROFFtv  
nAS_I  
P _CT_CLK  
P _CT_CLK  
R_W_I  
nS YNC  
nMDS _I  
S CLK  
R_W_I  
nS YNC  
nMDS _I  
S CLK  
AD_M[7..0]  
C_J AM_P 1  
A_M[15..8]  
nDS _frI  
nDS _M  
nAS _M  
AD_M[7..0]  
C_J AM_P 1  
A_M[15..8]  
nDS _frI  
nDS _M  
nAS _M  
R_W_M  
C_DR_ADI  
nDM  
nRS T_frM  
n R S T_ C T  
AD_M[7..0]  
C_J AM_P 1  
A_M[15..8]  
nDS _frI  
nDS _M  
nAS _M  
R_W_M  
C_DR_ADI  
nDM  
nRS T_frM  
n R S T_ C T  
R_W_I  
P2[0..7]  
P5[0..7]  
P4[0..7]  
nMAS _I  
nMAS _I  
nMAS _I  
nEXR_OFF  
R32_64  
R_W_M  
C_DR_ADI  
nEXR_OFF  
R32_64  
nRS T_frI  
n R S T_ T  
nEXR_OFF  
R32_64  
nRS T_frI  
n R S T_ T  
nRS T_Itv  
n R S T_ Ttv  
nRS T_Itv  
n R S T_ Ttv  
nRS T_Itv  
n R S T_ Ttv  
n R S T_ T  
nRS T_frM  
n R S T_ C T  
nDR_P 1MM  
nAD_I_OE  
I_WR_RD  
nDR_P 1MM  
nAD_I_OE  
I_WR_RD  
nDR_P 1MM  
nAD_I_OE  
I_WR_RD  
ICE MCU  
nIACKtv  
CONTROL LOGIC  
nIACKtv  
VOLTAGE TRANS LATOR  
nMAS _I  
S CLK  
nRS T_Itv  
nS YNC  
A_I[15..8]  
AD_I[7..0]  
MOTHERBOARD INTERFACE  
ZILOG  
4201 Be e Ca ve s Roa d  
S uite C-100  
Aus tin, TX 78746  
FOR USER" S MANUAL ONLY  
Title  
S CHEMATIC, Z86L9E9MULATION DAUGHTER BOARD  
Size  
B
Docume nt Numbe r  
R e v  
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Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
2
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 2  
A
B
C
D
E
VCC  
VCC  
J 4  
J 3  
DM_ENA  
E XT_ MEM  
USER NOTE:  
1
2
2
1
USER NOTE:  
INSTALL JUMPER IF TA RGET  
SYSTEM USES POR T 3 PIN 4  
AS /DM PIN TO ACCE SS  
EXTERNAL DATA/PROG RAM  
ME MORY.  
INSTALL JUMPER IF  
TARGET SYSTEM U SES  
PORT 1 AS AD DRESS/DATA  
BUS.  
R17  
10K  
R18  
10K  
4
3
2
1
4
3
2
1
A_M[15..8]  
A_M[15..8] pg8  
P _CT_CLK pg8  
n R S T_ C T pg8  
nDS _M  
pg8  
R19  
1
2
10K  
VCC  
nRS T_frM  
C_DR_ADI  
nAS _M  
nRS T_frM pg8  
C_DR_ADI pg8  
nAS _M  
pg8  
U13  
R_W_M pg8  
AD_M[7..0] pg8  
R_W_M  
AD_M[7..0]  
13  
26  
74  
VCC13  
VCC26  
R/W_M  
AD_M0  
AD_M1  
AD_M2  
AD_M3  
AD_M4  
AD_M5  
AD_M6  
AD_M7  
73  
70  
69  
68  
67  
65  
64  
63  
AD_M0  
AD_M1  
AD_M2  
AD_M3  
AD_M4  
AD_M5  
AD_M6  
AD_M7  
19  
32  
GND19  
GND32  
n R S T_ T  
nMDS _I  
nDS _I  
R_W_I  
nMAS _I  
P 34_nDM  
nDM  
nS YNC  
S CLK  
nAS_I  
12  
15  
16  
17  
18  
20  
21  
22  
24  
25  
pg11  
pg11  
pg11  
pg11  
pg11  
pg11  
pg8  
pg11  
pg11  
n R S T_ T  
nMDS _I  
nDS _I  
R_W_I  
nMAS _I  
P 34_nDM  
nDM  
nS YNC  
S CLK  
n R S T_ T  
nMDS _I  
nDS _I  
R/W_I  
nMAS _I  
P 34_nDM  
nDM  
P _CLK_CE  
P _WR_RD  
nDS _frI  
nP _P GM  
P _CLR  
61  
60  
58  
57  
56  
55  
P _CLK_CE pg7,8,10  
P _WR_RD pg7,8,10  
P _CLKE/CE  
P _WR/RD  
nDS _frI  
nP _P GM  
P _CLR  
nDS _frI  
pg8  
nS YNC  
S CLK  
nAS_I  
nP _P GM pg7,10  
pg11  
nAS_I  
P _CLR  
P _CLK  
pg7,10  
pg7,10  
P _CLK  
P _CLK  
R32_64  
27  
28  
pg7  
R32_64  
R32/63  
( TDO)  
( TCK)  
nEXR_OFF  
71  
62  
pg7 nEXR_OFF  
( TDO)  
( TCK)  
nEXR_OFF  
I/O1  
I/O2  
C_J AM_P 1  
FG_BG  
nDR_P 1MM  
VCC  
29  
30  
31  
pg8  
pg8  
C_J AM_P 1  
FG_BG  
nDR_P 1MM  
C_J AM_P 1  
FG_BG  
nDR_P 1MM  
59  
72  
GND59  
GND72  
nRS T_frI  
nRS T_toM  
14  
23  
( TDI )  
pg11  
nRS T_frI  
nRS T_frI  
66  
VCC  
nRS T_toM ( TMS)  
VCC66  
R20  
10K  
R21  
10K  
ISP HEA DER FOR ALTERA CPLD  
VCC  
P 4  
( TCK)  
( TDO)  
( TMS)  
EP M7128S -LC84  
1
3
5
7
9
2
4
6
8
( TDI )  
10  
A_I[15..8]  
pg11 A_I[15..8]  
pg11 I_WR_RD  
pg11 nAD_I_OE  
pg4,11 nRS T_Itv  
DESIGNER NOTE:  
R22  
10K  
ALTERA PIN USE FOR ISP CAN ALSO BE  
USED AS I/O CONTROL PIN. P IN NOT  
CURENTLY USED A S I/O PIN CAN BE  
USED AS I/O PIN IN THE FUTURE AS  
NEEDED.  
A_M_LO[1..0]  
pg9 A_M_LO[1..0]  
pg10 P _RD_WR  
pg7,10  
pg7,10  
pg7,10  
P _TBD3  
P _TBD2  
P _TBD1  
( TMS)  
( TDI )  
CONTROL LOGIC  
Title  
S CHEMATIC, Z869L9 EMULATION DAUGHTER BOARD  
FOR USER" S MANUAL ONLY  
Size  
B
Docume nt Numbe r  
R e v  
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
3
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 3  
A
B
C
D
E
VCC_I VCC_I  
R46  
10K  
R45  
10K  
A_Itv[15..8]  
AD_Itv[7..0]  
A_Itv[15..8] pg11  
AD_Itv[7..0] pg11  
Test Port  
4
3
2
1
4
3
2
1
P 7  
AD_Itv0  
AD_Itv1  
AD_Itv2  
AD_Itv3  
AD_Itv4  
AD_Itv5  
AD_Itv6  
AD_Itv7  
2
4
6
1
3
5
7
9
11  
13  
15  
L99 IC E MCU  
P 34tv  
pg11  
( L99 PORT2)  
( L99 PORT6)  
( L99 PORT5)  
( L99 PORT4)  
P2_I[0..7]  
8
P2_I[0..7] pg5,7  
U17  
10  
12  
14  
16  
AD_Itv0  
AD_Itv1  
AD_Itv2  
AD_Itv3  
AD_Itv4  
AD_Itv5  
AD_Itv6  
AD_Itv7  
P 2_I0  
P 2_I1  
P 2_I2  
P 2_I3  
P 2_I4  
P 2_I5  
P 2_I6  
P 2_I7  
4
6
3
74  
78  
79  
80  
81  
5
n R S T_ Ttv pg11  
MAD0  
MAD1  
MAD2  
MAD3  
MAD4  
MAD5  
MAD6  
MAD7  
MA8  
P 20  
P 21  
P 22  
P 23  
P 24  
P 25  
P 26  
P 27  
VCC_I VCC_I  
9
10  
18  
19  
21  
27  
28  
31  
34  
59  
60  
61  
62  
7
8
P6_I[0..7]  
R43  
10K  
R42  
10K  
P6_I[0..7] pg5,7  
VCC_I  
A_Itv8  
A_Itv9  
P 6_I0  
P 6_I1  
P 6_I2  
P 6_I3  
P 6_I4  
P 6_I5  
P 6_I6  
P 6_I7  
82  
83  
84  
1
44  
45  
46  
47  
MA9  
P 60  
P 61  
P 62  
P 63  
P 64  
P 65  
P 66  
P 67  
A_Itv10  
A_Itv11  
A_Itv12  
A_Itv13  
A_Itv14  
A_Itv15  
MA10  
MA11  
MA12  
MA13  
MA14  
MA15  
R44  
10K  
nAS _Itv  
nDS _Itv  
pg11  
pg11  
P5DA_I[0..7]  
pg11  
pg5  
pg11  
pg5  
pg11  
pg11  
pg11  
pg11  
pg11  
nXROFFtv  
L99Vre f+  
nMAS _Itv  
L99Vre f-  
P5DA_I[0..7] pg5,7  
L99Vre f+  
23  
63  
15  
64  
71  
65  
77  
66  
73  
14  
69  
Vre f+  
nMAS  
Vre f-  
nMAS _Itv  
L99Vre f-  
nMDS _Itv  
nIACKtv  
nS YNCtv  
S CLKtv  
nDTMRtv  
nICEtv  
AGND  
P 5DA_I0  
P 5DA_I1  
P 5DA_I2  
P 5DA_I3  
P 5DA_I4  
P 5DA_I5  
P 5DA_I6  
P 5DA_I7  
55  
35  
38  
39  
40  
49  
54  
50  
52  
P 50  
P 51  
P 52  
nMDS _Itv  
nIACKtv  
nS YNCtv  
S CLKtv  
nDTMRtv  
nMDS  
nIACK  
P 53  
nS YNC  
P 54  
S CLK  
P 55  
nDTIMER  
nICE  
AGND1  
AGND2  
P 56  
P 57a  
P 57b  
P4DA_I[0..7]  
VCC_I  
P4DA_I[0..7] pg5,7  
pg5  
pg5  
AGND  
AVDD  
nXROFFtv  
AVDD  
P 4DA_I0  
P 4DA_I1  
P 4DA_I2  
P 4DA_I3  
P 4DA_I4  
P 4DA_I5  
P 4DA_I6  
P 4DA_I7  
R_W_Itv  
56  
67  
68  
72  
16  
17  
20  
22  
57  
P 40  
P 41  
P 42  
P 43  
P 44  
P 45  
P 46  
P 47  
R/nW  
58  
nICEIBF  
J P 2  
24  
11  
25  
75  
26  
33  
1
2
J P 3  
AVDD  
R26  
1M  
VDD1_CORE  
VDD4_CORE  
VDD3  
USER NOTE:  
VCC_I  
INSTALL JP2 AND JP3 IF 28 PIN PART  
INSTALL JP2 IF 40 PIN PART  
1
2
VDD5  
VDD2  
nRS T_Itv  
XTAL1_I  
XTAL2_ T  
nRS T_Itv  
2
13  
41  
42  
70  
76  
32  
43  
30  
29  
nRS T_Itv pg3,11  
VSS8  
VSS7  
VSS6  
VSS5  
VSS4  
VSS3  
VSS2  
nRES ET  
XTAL1  
XTAL2  
J P 4  
2
1
12  
36  
37  
51  
53  
NC1  
NC2  
NC3  
NC4  
NC5  
R27  
10K  
48  
DVBON  
+
C79  
100uF  
J P 1  
CON2 Z86D99AA  
C80  
.01UF  
FOR USER" S MANUAL ONLY  
R_W_Itv  
XTAL2_ T  
pg11  
pg5  
R_W_Itv  
XTAL2_T  
J 5  
XTAL1_ T  
XTAL1tv  
XTAL1_ T  
XTAL1tv  
1
3
pg5  
XTAL1_T  
XTAL1tv  
XTAL1_I  
2
pg11  
HDR103  
USER NOTE:  
SELECT CLOCK SOURCE FOR ICE MCU  
JUMPER PIN 1 & 2 => CLOCK FOR DAUGHTER BOA  
TARGET SY STEM.  
ON DAUGHTER BOARD.  
ICE MCU  
Title  
RD ICE MCU TO COME FROM  
JUMPER PIN 2 & 3 => DAUGHTER BOARD I  
RESIDING ON DAUG HTER BOARD.  
CE MCU WILL USES OSCILLATOR  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
Size  
B
Docume nt Numbe r  
R e v  
A
Da te :  
Tue s da y, Augus t 15, 2000  
S he e t  
E
4
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 4  
A
B
C
D
E
( L99 PORT5)  
( L99 PORT6)  
( L99 PORT4)  
( L99 PORT2)  
P5_I[0..7]  
P6_I[0..7]  
P4_I[0..7]  
P2_I[0..7]  
pg4,7 P5_I[0..7]  
pg4,7 P6_I[0..7]  
pg4,7 P4_I[0..7]  
pg4,7 P2_I[0..7]  
TURN SWITCH TO ON POSIT ION  
TO ENABL E RESISTOR PULL UP  
ON PORT PINS.  
TARGE T CONNECTORS  
PLACE SWITCH IN OPEN  
POSITION WHEN USING PORT  
PIN FOR ANALOG FUN CTION.  
VCC_I  
P 5  
P 6_I2  
P 6_I1  
P 6_I3  
P 6_I0  
P 2_I5  
2
4
6
1
3
5
7
4
3
2
1
4
3
2
1
S 2  
P 2P U_I0  
P 2P U_I1  
P 2P U_I2  
P 2P U_I3  
P 2P U_I4  
P 2P U_I5  
P 2P U_I6  
P 2P U_I7  
P 2_I0  
P 2_I1  
P 2_I2  
P 2_I3  
P 2_I4  
P 2_I5  
P 2_I6  
P 2_I7  
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
8
P 5_I4  
P 5_I5  
P 5_I6  
P 5_I7  
P 5DA_I4  
P 5DA_I5  
P 5DA_I6  
P 5DA_I7  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
58  
60  
62  
64  
66  
68  
70  
72  
74  
76  
78  
80  
9
P 2_I4  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
33  
35  
37  
39  
41  
43  
45  
47  
49  
51  
53  
55  
57  
59  
61  
63  
65  
67  
69  
71  
73  
75  
77  
79  
P 2_I6  
P 2_I3  
P 2_I7  
P 2_I2  
AGND  
P 2_I1  
L99Vre f-  
P 2_I0  
P 4_I0  
P 4_I1  
P 4_I2  
P 4DA_I0  
P 4DA_I1  
P 4DA_I2  
P 4DA_I3  
S 1  
P 5_I0  
P 5_I1  
P 5_I2  
P 5_I3  
P 5DA_I0  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
P 5DA_I1  
P 5DA_I2  
P 5DA_I3  
P 4DA_I4  
P 4DA_I5  
P 4DA_I6  
P 4DA_I7  
10  
AGND  
pg4  
P 4_I3  
S W DIP -8  
RN1  
L99Vre f- pg4  
P 4_I4  
P 4_I5  
P 4_I6  
RES _BUS 9_680K  
P 4DA_I4  
P 4DA_J 3  
P 4DA_I5  
GND  
P 4DA_I6  
P 4DA_I2  
P 4DA_I7  
P 4DA_I1  
L99Vre f+  
P 4DA_I0  
AVDD  
P 5DA_I0  
VCC_Ita r  
P 5DA_I6  
XTAL2_ T  
P 5DA_I7  
XTAL1_ T  
P 5DA_I5  
P 5DA_I1  
P 6_I7  
P5DA_I[0..7]  
P5DA_I[0..7] pg4,7  
TURN SWITCH TO ON POSI TION  
TO ENAB LE RESISTOR PULL UP  
ON PORT PINS.  
P 4_I7  
VCC_I  
S W DIP -8  
S 4  
P 5P U_I0  
P 5P U_I1  
P 5P U_I2  
P 5P U_I3  
P 5P U_I4  
P 5P U_I5  
P 5P U_I6  
P 5P U_I7  
P 5_I0  
P 5_I1  
P 5_I2  
P 5_I3  
P 5_I4  
P 5_I5  
P 5_I6  
P 5_I7  
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
L99Vre f+ pg4  
P4DA_I[0..7]  
AVDD  
VCC_Ita r  
pg4  
P4DA_I[0..7] pg4,7  
XTAL2_T  
XTAL1_T  
pg4  
pg4  
10  
S W DIP -8  
RN2  
RES _BUS 9_680K  
P 5DA_I2  
P 6_I6  
P 5DA_I3  
P 6_I5  
P 5DA_I4  
P 6_I4  
TURN SWITCH TO ON POSI TION  
TO ENAB LE RESISTOR PULL UP  
ON PORT PINS.  
VCC_I  
S 5  
P 6P U_I0  
P 6P U_I1  
P 6P U_I2  
P 6P U_I3  
P 6P U_I4  
P 6P U_I5  
P 6P U_I6  
P 6P U_I7  
P 6_I0  
P 6_I1  
P 6_I2  
P 6_I3  
P 6_I4  
P 6_I5  
P 6_I6  
P 6_I7  
J 8  
J 7  
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
P 4DA_I3  
1
2
1
2
IR LED OUTPUT  
VCC_Ita r  
P 6  
CON2  
CON2  
P 2_I5  
P 2_I4  
P 2_I6  
P 2_I3  
P 2_I7  
2
4
6
1
3
5
7
10  
8
S W DIP -8  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
58  
60  
9
P 2_I2  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
33  
35  
37  
39  
41  
43  
45  
47  
49  
51  
53  
55  
57  
59  
RN3  
RES _BUS 9_680K  
P 4DA_I4  
P 2_I1  
P 4DA_I5  
P 2_I0  
P 4DA_I6  
P 4DA_J 3  
P 4DA_I7  
GND  
TURN SWITCH TO ON POSI TION  
TO ENAB LE RESISTOR PULL UP  
ON PORT PINS.  
VCC_I  
VCC_Ita r  
P 3DA_I2  
XTAL2_T  
P 3DA_I1  
XTAL1_T  
P 4DA_I0  
P 5DA_I1  
P 5DA_I0  
P 5DA_I2  
P 5DA_I6  
P 5DA_I3  
P 5DA_I7  
P 5DA_I4  
P 5DA_I5  
GND  
VCC_Ita r  
XTAL2_T  
XTAL1_T  
S 6  
pg4  
pg4  
P 4P U_I0  
P 4P U_I1  
P 4P U_I2  
P 4P U_I3  
P 4P U_I4  
P 4P U_I5  
P 4P U_I6  
P 4P U_I7  
P 4_I0  
P 4_I1  
P 4_I2  
P 4_I3  
P 4_I4  
P 4_I5  
P 4_I6  
P 4_I7  
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
10  
S W DIP -8  
RN4  
RES _BUS 9_680K  
GND  
ICE MCU  
Title  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
FOR USER" S MANUAL ONLY  
Size  
B
Docume nt Numbe r  
R e v  
A
Da te :  
Tue s da y, Augus t 15, 2000  
S he e t  
E
5
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 5  
A
B
C
D
E
4
3
2
1
4
3
2
1
L99 MODE:  
-
-
-
SET ROM_SI ZE_RG  
T3 I S TRI - STATED.  
WHEN DS_I I S ASSERTED:  
I F ( FG/ BG && OUTSI DE_ROM)  
TR- STATE T1.  
= 16K.  
ELSE I F ( FG/ BG && ! OUTSI DE_ROM)  
ENABLE T1.  
ELSE I F ( ! FG/ BG)  
I F ( C_J AM_P1)  
TRI - STATE T1.  
ELSE  
ENABLE T1.  
NOTE: ZDS MUST NOT SET D_MEMFLAG REGI STER  
DMF_DATA BI T WHEN ACCESSI NG EXECUTABLE  
RAM.  
BUFFER  
TRANSLATER  
3
P1_I [ 0. . 7]  
P1_M[ 0. . 7]  
5V  
0- 5V  
MOTHERBOARD  
I NTERFACE  
T3  
TARGET  
CONNECTOR  
BUFFER  
TRANSLATER  
1
P1_I [ 0. . 7]  
0- 5V  
AD_I t v[ 7. . 0]  
0- 5V  
AD_I [ 7. . 0]  
5V  
I CE  
MCU  
T1  
Title  
S CHEMATIC, Z869L9 EMULATION DAUGHTER BOARD  
Size  
Docume nt Numbe r  
R e v  
B
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
6
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 6  
A
B
C
D
E
AD_I[7..0]  
pg8,11 AD_I[7..0]  
U8  
AD_I0  
AD_I1  
AD_I2  
AD_I3  
AD_I4  
AD_I5  
AD_I6  
AD_I7  
A_I8  
MAD0  
MAD1  
MAD2  
MAD3  
MAD4  
MAD5  
MAD6  
MAD7  
MA8  
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
2
3
5
6
8
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
1A1  
1Y1  
1Y2  
1Y3  
1Y4  
2Y1  
2Y2  
2Y3  
2Y4  
3Y1  
3Y2  
3Y3  
3Y4  
4Y1  
4Y2  
4Y3  
4Y4  
1A2  
1A3  
1A4  
2A1  
2A2  
2A3  
2A4  
3A1  
3A2  
3A3  
3A4  
4A1  
4A2  
4A3  
4A4  
SIG NAL BUFFER  
P6[0..7]  
P2[0..7]  
U9  
nAS  
LG_32_64  
nMAS  
nAS_I  
2
3
5
6
8
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
nAS_I  
pg11  
pg3  
pg11  
pg11  
1Y1  
1Y2  
1Y3  
1Y4  
2Y1  
2Y2  
2Y3  
2Y4  
3Y1  
3Y2  
3Y3  
3Y4  
4Y1  
4Y2  
4Y3  
4Y4  
1A1  
1A2  
1A3  
1A4  
2A1  
2A2  
2A3  
2A4  
3A1  
3A2  
3A3  
3A4  
4A1  
4A2  
4A3  
4A4  
R32_64  
nMAS _I  
R_W_I  
R32_64  
nMAS _I  
R_W_I  
SIG NAL BUFFER  
4
3
2
1
4
3
2
1
A_I9  
MA9  
R_W  
A_I10  
A_I11  
A_I12  
A_I13  
A_I14  
A_I15  
MA10  
MA11  
MA12  
MA13  
MA14  
MA15  
nRES ET  
nDS  
nMDS  
nLG_S YNC  
nLG_IACK  
LG_FG_BG  
LG_S CLK  
LG_nXROF  
nRS T_frI  
nMDS _I  
nDS _I  
nS YNC  
nIRQ_ACK  
FG_BG  
S CLK  
nEXR_OFF  
9
nRS T_frI pg11  
nMDS _I pg11  
nDS _I  
nS YNC  
nIRQ_ACK pg11  
FG_BG  
S CLK  
nEXR_OFF pg3,11  
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
pg11  
pg11  
LOGIC ANALYZER CONNECTOR  
pg8  
pg11  
A_I[15..8]  
MA[15..8]  
MAD[7..0]  
1
48  
25  
24  
7
pg11 A_I[15..8]  
VCC  
1OE  
2OE  
3OE  
4OE  
VCC7  
VCC18  
VCC31  
VCC42  
18  
31  
42  
P 3  
MAD0  
MAD2  
MAD4  
MAD6  
MA8  
MA10  
MA12  
MA14  
nAS  
MAD1  
MAD3  
MAD5  
MAD7  
MA9  
LG_CTCLK  
VCC  
P _CT_CLK  
1
3
5
7
9
2
4
6
8
P _CT_CLK pg8  
4
10  
15  
21  
28  
34  
39  
45  
GND4  
GND28  
7
18  
31  
42  
1
GND10 GND34  
GND15 GND39  
GND21 GND45  
VCC7  
1OE  
2OE  
3OE  
4OE  
R29  
10K  
48  
25  
24  
VCC18  
VCC31  
VCC42  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
58  
60  
62  
64  
66  
68  
70  
72  
74  
76  
78  
80  
82  
84  
86  
88  
90  
92  
94  
96  
98  
100  
MA11  
MA13  
MA15  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
33  
35  
37  
39  
41  
43  
45  
47  
49  
51  
53  
55  
57  
59  
61  
63  
65  
67  
69  
71  
73  
75  
77  
79  
81  
83  
85  
87  
89  
91  
93  
95  
97  
99  
IDT74FCT16244ATP A  
28  
34  
39  
45  
4
GND28  
GND4  
P2_I[0..7]  
10  
15  
21  
pg4,5 P2_I[0..7]  
GND34 GND10  
GND39 GND15  
GND45 GND21  
U10  
GND  
P 2_I0  
P 2_I1  
P 2_I2  
P 2_I3  
P 2_I4  
P 2_I5  
P 2_I6  
P 2_I7  
P 6_I0  
P 6_I1  
P 6_I2  
P 6_I3  
P 6_I4  
P 6_I5  
P 6_I6  
P 6_I7  
P 20  
P 21  
P 22  
P 23  
P 24  
P 25  
P 26  
P 27  
P 60  
P 61  
P 62  
P 63  
P 64  
P 65  
P 66  
P 67  
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
2
3
5
6
8
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
LG_32_64  
nMAS  
R_W  
nMDS  
nLG_S YNC  
nLG_IACK  
LG_FG_BG  
LG_nXROF  
IDT74FCT16244ATP A  
nRES ET  
nDS  
SIGNA L  
TRA NSLATION  
P2[0..7]  
P2[0..7]  
pg8  
( L99 PORT2)  
( L99 PORT6)  
GND  
P 21  
P 23  
P 25  
P 27  
P 61  
P 63  
P 65  
P 67  
P 20  
P 22  
P 24  
P 26  
P 60  
P 62  
P 64  
P 66  
SIGN AL BUFFER  
AD_M[7..0]  
AD_M[7..0] pg8  
U11  
LG_AD_M0  
AD_M0  
AD_M1  
AD_M2  
AD_M3  
AD_M4  
AD_M5  
AD_M6  
AD_M7  
P _TBD3  
P _TBD2  
P _TBD1  
P _CLK  
P _CLR  
nP _P GM  
2
3
5
6
8
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
1Y1  
1Y2  
1Y3  
1Y4  
2Y1  
2Y2  
2Y3  
2Y4  
3Y1  
3Y2  
3Y3  
3Y4  
4Y1  
4Y2  
4Y3  
4Y4  
1A1  
1A2  
1A3  
1A4  
2A1  
2A2  
2A3  
2A4  
3A1  
3A2  
3A3  
3A4  
4A1  
4A2  
4A3  
4A4  
P6_I[0..7]  
LG_AD_M1  
LG_AD_M2  
LG_AD_M3  
LG_AD_M4  
LG_AD_M5  
LG_AD_M6  
LG_AD_M7  
LG_P TBD3  
LG_P TBD2  
LG_P TBD1  
LG_P _CLK  
LG_P _CLR  
LG_nP GM  
LG_WR_RD  
LG_CLKCE  
48  
1
25  
24  
7
pg4,5 P6_I[0..7]  
VCC  
1OE  
1DIR  
2OE  
2DIR  
VCCB1  
VCCB2  
VCCA1  
VCCA2  
LG_S CLK  
18  
31  
42  
VCC  
( L99 PORT5)  
( L99 PORT4)  
GND  
P 51  
P 53  
P 55  
P 57  
P 41  
P 43  
P 45  
P 47  
VCC_I  
P 50  
P 52  
P 54  
P 56  
P 40  
P 42  
P 44  
P 46  
LG_S CLK  
9
4
10  
15  
21  
28  
34  
39  
45  
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
GND4  
GND28  
GND10 GND34  
GND15 GND39  
GND21 GND45  
P _TBD3 pg3  
P _TBD2 pg3  
P _TBD1 pg3  
P _CLK  
P _CLR  
nP _P GM pg3  
P _WR_RD pg3  
P _CLK_CE pg3  
IDT74FCT164245TP A  
pg3  
pg3  
P5_I[0..7]  
pg4,5 P5_I[0..7]  
U12  
GND  
P 5_I0  
P 5_I1  
P 50  
P 51  
P 52  
P 53  
P 54  
P 55  
P 56  
P 57  
P 40  
P 41  
P 42  
P 43  
P 44  
P 45  
P 46  
P 47  
LG_AD_M0  
LG_AD_M2  
LG_AD_M4  
LG_AD_M6  
LG_P TBD3  
LG_P TBD1  
LG_P _CLR  
LG_WR_RD  
LG_CTCLK  
LG_AD_M1  
LG_AD_M3  
LG_AD_M5  
LG_AD_M7  
LG_P TBD2  
LG_P _CLK  
LG_nP GM  
LG_CLKCE  
P _WR_RD  
P _CLK_CE  
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
2
3
5
6
8
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
P 5_I2  
P 5_I3  
P 5_I4  
P 5_I5  
P 5_I6  
P 5_I7  
P 4_I0  
P 4_I1  
P 4_I2  
P 4_I3  
P 4_I4  
P 4_I5  
P 4_I6  
P 4_I7  
7
18  
31  
42  
1
VCC7  
1OE  
2OE  
3OE  
4OE  
VCC  
48  
25  
24  
VCC18  
VCC31  
VCC42  
28  
34  
39  
45  
4
SIGNA L  
TRA NSLATION  
GND28  
GND4  
GND  
10  
15  
21  
GND34 GND10  
GND39 GND15  
GND45 GND21  
IDT74FCT16244ATP A  
VCC  
LG_AD_M[7..0]  
P4[0..7]  
P5[0..7]  
48  
1
25  
24  
7
VCC  
1OE  
1DIR  
2OE  
2DIR  
VCCB1  
VCCB2  
VCCA1  
VCCA2  
P4[0..7]  
P5[0..7]  
18  
31  
42  
P4[0..7]  
P5[0..7]  
pg8  
pg8  
VCC_I  
P4_I[0..7]  
pg4,5 P4_I[0..7]  
4
10  
15  
21  
28  
34  
39  
45  
LOGIC ANALYZER CONNECTOR  
GND4  
GND28  
GND10 GND34  
GND15 GND39  
GND21 GND45  
Title  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
Docume nt Numbe r  
FOR USER" S MANUAL ONLY  
IDT74FCT164245TP A  
Size  
B
R e v  
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
7
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 7  
A
B
C
D
E
4
3
2
1
4
3
2
1
A_M[15..8]  
MB INTER FACE CONNECTOR 2  
pg3  
pg3  
A_M[15..8]  
nRS T_frM  
AD_I[7..0]  
AD_I[7..0] pg7,11  
MB INTER FACE CONNECTOR 1  
FG_BG  
nMAS _I  
pg3,7,11  
pg11  
pg3 C_DR_ADI  
C_J AM_P 1 pg3  
nIRQ_ACK pg11  
VCC  
VCC  
P 1  
P 2  
pg3  
pg3  
pg3  
pg3  
R_W_M  
n R S T_ C T  
nAS _M  
nDS _M  
1
3
5
7
9
2
4
6
8
1
3
5
7
9
2
4
6
8
( nM_AS)  
( nM_DS)  
( M_R/ W)  
( TRACE)  
( CH_DI R)  
( nI ACK)  
( nCS_U245)  
( nU_AS)  
( I CRAM)  
FG_BG  
( U_PXX)  
R_W_I  
nAS _M  
nDS _M  
R_W_M  
nIRQ_ACK  
C_J AM_P 1  
nMAS _I  
R_W_I  
pg11  
( U_P35)  
C_DR_ADI  
( TRI GGER)  
AD_M[7..0]  
nS YNC  
S CLK  
( U_P10)  
( U_P11)  
( U_P12)  
( U_P13)  
( U_P14)  
( U_P15)  
( U_P16)  
( U_P17)  
nS YNC  
S CLK  
pg11  
pg11  
pg3,7,9,10 AD_M[7..0]  
( nRESET2)  
( M_P25)  
( M_A8)  
( M_A9)  
( M_A10)  
( M_A11)  
( M_A12)  
( M_A13)  
( M_A14)  
( M_A15)  
n R S T_ C T  
nRS T_frM  
A_M8  
A_M9  
A_M10  
A_M11  
A_M12  
A_M13  
A_M14  
A_M15  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
58  
60  
62  
64  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
32  
34  
36  
38  
40  
42  
44  
46  
48  
50  
52  
54  
56  
58  
60  
62  
64  
( M_D0)  
( M_D1)  
( M_D2)  
( M_D3)  
( M_D4)  
( M_D5)  
( M_D6)  
( M_D7)  
( D0)  
( D1)  
( D2)  
( D3)  
( D4)  
( UD0)  
( UD1)  
( UD2)  
( UD3)  
( UD4)  
( UD5)  
( UD6)  
( UD7)  
AD_M0  
AD_M1  
AD_M2  
AD_M3  
AD_M4  
AD_M5  
AD_M6  
AD_M7  
D_P 0  
D_P 1  
D_P 2  
D_P 3  
D_P 4  
AD_I0  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
33  
35  
37  
39  
41  
43  
45  
47  
49  
51  
53  
55  
57  
59  
61  
63  
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
31  
33  
35  
37  
39  
41  
43  
45  
47  
49  
51  
53  
55  
57  
59  
61  
63  
AD_I1  
AD_I2  
AD_I3  
AD_I4  
AD_I5  
AD_I6  
AD_I7  
D_P[7..0]  
pg10 D_P[7..0]  
( U_P50)  
( U_P40)  
P 50  
P 51  
P 52  
P 53  
P 54  
P 55  
P 56  
P 57  
P 40  
P 41  
P 42  
P 43  
P 44  
P 45  
P 46  
P 47  
P 20  
P 21  
P 22  
P 23  
P 24  
P 25  
P 26  
P 27  
( SI ZE0)  
( SI ZE1)  
( SI ZE2)  
( SI ZE3)  
( SI ZE4)  
( M_P31)  
( U_P51)  
( U_P52)  
( U_P53)  
( U_P54)  
( U_P55)  
( U_P56)  
( U_P57)  
( U_P41)  
( U_P42)  
( U_P43)  
( U_P44)  
( U_P45)  
( U_P46)  
( U_P47)  
( U_P20)  
( U_P21)  
( U_P22)  
( U_P23)  
( U_P24)  
( U_P25)  
( U_P26)  
( U_P27)  
( D5)  
( D6)  
( D7)  
D_P 5  
D_P 6  
D_P 7  
( P_TBD0) ( nCS)  
( P_TBD1) ( VPP)  
( P_TBD2) ( EPM)  
( P_TBD3) ( VCC_CT)  
( nCS_RD)  
( nD_E)  
( 6D0X=>6D0X)  
( 6D2X=>6D1X)  
( 6D4X=>6D2X)  
( 6D6X=>6D3X) LED_CLK  
( 6D8X=>6D4X) P_BUF_WR_CLK  
( 6DAX=>6D5X)  
( UA8)  
( UA9)  
P _CLK_CE  
P _WR_RD  
P _AH_CLK  
P _AL_CLK  
P _CT_CLK  
A_I8  
A_I9  
P4[0..7]  
pg7  
( UA10)  
( UA11)  
( UA12)  
( UA13)  
( UA14)  
( UA15)  
A_I10  
A_I11  
A_I12  
A_I13  
A_I14  
A_I15  
( nU_M_DS)  
nDS _frI  
pg3  
nDS _frI  
( 14V)  
( nBRPDRAM)  
( nBRP_OFF)  
( nBRPPRAM)  
( nBRP_ROM)  
( 57FX=>6D7X)  
nWR_DAC  
nDM  
( 57EX=>6D6X)  
P2[0..7]  
nDM  
pg7  
pg3  
nDM  
A_I[15..8]  
pg9  
nWR_DAC  
A_I[15..8] pg11  
P5[0..7] pg7  
pg3,7 P _CT_CLK  
pg10 P _AL_CLK  
pg10 P _AH_CLK  
pg3  
P _WR_RD  
pg3 P _CLK_CE  
FOR USER" S MANUAL ONLY  
MOTHERBOARD INTERFACE  
Title  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
Size  
B
Docume nt Numbe r  
R e v  
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
8
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 8  
A
B
C
D
E
15V OUTP UT ISR  
U4  
VCC  
VCC_15V  
P T5042  
1
3
VIN  
VOUT  
VCC  
U19  
LT1086CM  
+
C1  
1UF  
C2  
1UF  
C3  
3
2
100uF16V  
VCC_re g  
VIN  
VOUT  
4
3
2
1
4
3
2
1
+
+
C74  
C73  
R30  
121  
C75  
0.1UF  
10uF  
22uF  
VCC_15V  
R31  
73.2  
2V - 4V  
Adjustable  
Power  
U5A  
R1  
2K_1%  
3
2
+
-
1
R32  
200  
C4  
LT1014DS  
POWER OP-AMP  
CIRC UIT  
0.1UF  
R2  
2K_1%  
R3  
(0-14V)  
10K_1%  
R4  
VCC_VV  
VCC_VV  
2K_1%  
VCC_15V  
U5B  
R5  
2K_1%  
5
6
+
-
7
DAC IC  
C5  
AD_M[7..0]  
LT1014DS  
pg8 AD_M[7..0]  
U6  
AD_M0  
AD_M1  
AD_M2  
AD_M3  
AD_M4  
AD_M5  
AD_M6  
AD_M7  
DAC_V0  
DAC_V1  
DAC_V2  
DAC_V3  
14  
13  
12  
11  
10  
9
2
D0  
VOUTA  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
0.1UF  
1
R6  
R7  
VOUTB  
VOUTC  
VOUTD  
(0-14V)  
20  
19  
2K_1%  
10K_1%  
R8  
VCC_VP P  
VCC_VP P  
8
7
2K_1%  
A_M_LO[1..0]  
VCC_15V  
pg3 A_M_LO[1..0]  
18  
3
6
5
4
VCC  
2.5V REFERE NCE  
VDD  
VSS  
A_M_LO0  
A_M_LO1  
17  
16  
A0  
A1  
U5C  
DGND  
AGND  
VREF  
R9  
nWR_DAC  
DAC_VREF  
15  
12  
11  
pg8  
nWR_DAC  
+
-
WR  
10  
2K_1%  
MAX506  
U7  
1
4
5
3
2
Vin Vo_2.5  
C6  
LT1014DS  
6
7
8
NC1  
NC3  
NC2  
NC4  
GND NC5  
MC1403D  
0.1UF  
R10  
R11  
LAYO UT NOTE:  
USE THICK TRACES FOR THESE POWER  
SOURCES.  
(0-14V)  
2K_1%  
10K_1%  
R12  
VCC_EP M  
VCC_EP M  
2K_1%  
VCC_15V  
USER NOTE:  
SELECT VO LTAGE SOURCE FOR EMULATION SYSTEM.  
R40  
200 1W  
J 6  
U5D  
16  
VCC_re g  
VCC_I  
VCC_I  
VCC_re g  
VCC_Ita r  
VCC_Ita r  
VCC_Iint  
1
3
5
7
2
4
6
8
1) I CE  
2) I CE  
3) I CE  
4) I CE  
5) I CE  
6) I CE  
7) I CE  
=
=
=
=
=
=
=
VCC_r e g 1- 3  
R13  
R41  
500  
Q4  
VCC_r e g TARGET  
=
VCC_r e g 1- 3  
,
2- 4  
,
14  
15  
+
-
VCC_l i nt  
VCC_l i nt  
5- 7  
TARGET  
1
2K_1%  
VCC_Iint  
FZT849  
=
=
VCC_l i nt  
VCC_l i nt  
VCC_r e g 5- 7  
5- 7  
1- 3  
6- 8  
VCC_r e g TARGET  
=
,
,
6- 8  
2- 4  
CON8A  
C7  
LT1014DS  
VCC_l i nt  
TARGET  
TARGET 3- 4  
0.1UF  
R14  
R15  
(0 - 5.0V)  
2K_1%  
2K_1%  
R16  
P OWER LOGIC  
VCC_Iint  
VCC_Iint  
Title  
2K_1%  
FOR USER" S MANUAL ONLY  
+
C76  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
Docume nt Numbe r  
22uF  
Size  
B
R e v  
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
9
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 9  
A
B
C
D
E
HEADERS FOR OTP  
PROGRAMMING SOCKET  
ADAP TER  
HIGH TO LOW & LOW TO HIGH  
VO LTAGE TRANSLATION  
D_P[7..0]  
D_P tv[7..0]  
pg8  
D_P[7..0]  
U1  
4
3
2
1
4
3
2
1
D_P 0  
D_P 1  
D_P 2  
D_P 3  
D_P 4  
D_P 5  
D_P 6  
D_P 7  
P _CLK_CE  
P _WR_RD  
nP _P GM  
P _CLR  
P _CLK  
P _TBD1  
P _TBD2  
P _TBD3  
D_P tv0  
D_P tv1  
D_P tv2  
D_P tv3  
D_P tv4  
D_P tv5  
D_P tv6  
D_P tv7  
nP _tvCE  
nP _tvOE  
nP _tvP GM  
P _tvCLR  
P _tvCLK  
P _tvTBD1  
P _tvTBD2  
P _tvTBD3  
2
3
5
6
8
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
J 1  
D_P tv0  
D_P tv2  
D_P tv4  
D_P tv6  
D_P tv1  
D_P tv3  
D_P tv5  
D_P tv7  
1
3
5
7
9
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
2
4
6
8
CONTROL SIGNAL FOR OTP  
PROGRAMM ING  
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
pg3 P _CLK_CE  
pg3  
pg3  
pg3  
pg3  
pg3  
pg3  
pg3  
P _WR_RD  
nP _P GM  
P _CLR  
P _tvCLR  
P _tvCLK  
P _CLK  
P _TBD1  
P _TBD2  
P _TBD3  
P _tvTBD2  
P _tvTBD3  
7
18  
31  
42  
48  
1
25  
24  
VCC  
VCC_I  
VCCB1  
VCCB2  
VCCA1  
VCCA2  
1OE  
1DIR  
2OE  
P _RD_WR  
HDR15X2  
2DIR  
28  
34  
39  
45  
4
GND28  
GND4  
10  
15  
21  
GND34 GND10  
GND39 GND15  
GND45 GND21  
IDT74FCT164245TP A  
pg3  
P _RD_WR  
HIGH TO LOW VOLT AGE TRANSLATION  
OTP REGI STER FOR MSB  
& LSB OF ADD RESS  
A_Ptv[15..0]  
AD_M[7..0]  
AD_M[7..0] pg8  
U3  
U2  
A_P tv0  
A_P 0  
A_P 1  
A_P 2  
A_P 3  
A_P 4  
A_P 5  
A_P 6  
A_P 7  
A_P 8  
A_P 9  
A_P 10  
A_P 11  
A_P 12  
A_P 13  
A_P 14  
A_P 15  
AD_M0  
AD_M1  
AD_M2  
AD_M3  
AD_M4  
AD_M5  
AD_M6  
AD_M7  
AD_M0  
AD_M1  
AD_M2  
AD_M3  
AD_M4  
AD_M5  
AD_M6  
AD_M7  
HEADERS FOR OTP  
PROGRAMMING SOCKET  
ADAP TER  
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
2
3
5
6
8
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
2
3
5
6
8
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
1O1  
1O2  
1O3  
1O4  
1O5  
1O6  
1O7  
1O8  
2O1  
2O2  
2O3  
2O4  
2O5  
2O6  
2O7  
2O8  
1D1  
1D2  
1D3  
1D4  
1D5  
1D6  
1D7  
1D8  
2D1  
2D2  
2D3  
2D4  
2D5  
2D6  
2D7  
2D8  
A_P tv1  
A_P tv2  
A_P tv3  
A_P tv4  
A_P tv5  
A_P tv6  
A_P tv7  
A_P tv8  
A_P tv9  
A_P tv10  
A_P tv11  
A_P tv12  
A_P tv13  
A_P tv14  
A_P tv15  
J 2  
9
A_P tv0  
A_P tv2  
A_P tv4  
A_P tv6  
A_P tv1  
A_P tv3  
A_P tv5  
A_P tv7  
A_P tv9  
A_P tv11  
A_P tv13  
A_P tv15  
1
3
5
7
9
11  
13  
15  
17  
19  
21  
23  
25  
27  
29  
2
4
6
8
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
A_P tv8  
10  
12  
14  
16  
18  
20  
22  
24  
26  
28  
30  
A_P tv10  
A_P tv12  
A_P tv14  
nP _tvCE  
nP _tvOE  
nP _tvP GM  
P _tvTBD1  
VCC_VP P  
VCC_EP M  
VCC_VV  
VCC_I  
VCC  
P _AL_CLK  
P _CLK_CE  
P _AH_CLK  
P _CLK_CE  
48  
1
25  
7
7
18  
31  
42  
48  
1
25  
P _AL_CLK pg8  
P _AH_CLK pg8  
1OE  
1DIR  
2OE  
2DIR  
VCCB1  
VCCB2  
VCCA1  
VCCA2  
VCC7  
1CLK  
1OE  
2CLK  
18  
31  
42  
VCC18  
VCC31  
VCC42  
VCC_I  
24  
24  
2OE  
HDR15X2  
4
10  
15  
21  
28  
34  
39  
45  
28  
34  
39  
45  
4
GND4  
GND28  
GND28  
GND4  
10  
15  
21  
FOR USER" S MANUAL ONLY  
GND10 GND34  
GND15 GND39  
GND21 GND45  
GND34 GND10  
GND39 GND15  
GND45 GND21  
P ROGRAMMING LOGIC  
IDT74FCT164245TP A  
Title  
IDT74FCT162374ATP V  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
Size  
B
Docume nt Numbe r  
R e v  
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
10  
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 10  
A
B
C
D
E
pg7,8 nIRQ_ACK  
pg3,7  
nRS T_frI  
pg3,7  
pg3,7,8  
nAS_I  
S CLK  
pg3,7,8 nS YNC  
pg3 P 34_nDM  
pg3,7,8 nMAS _I  
pg3,7,8  
pg3,7  
pg3,7  
pg3  
R_W_I  
nDS _I  
nMDS _I  
4
3
2
1
4
3
2
1
n R S T_ T  
LOW TO HIGH VOLT AGE TRANSLATION  
U15  
n R S T_ Ttv  
nMDS _Itv  
nDS _Itv  
R_W_Itv  
nMAS _Itv  
P 34tv  
nS YNCtv  
S CLKtv  
nAS _Itv  
nRS T_T  
nMDS _I  
nDS _I  
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
2
3
5
6
8
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
pg4  
pg4  
pg4  
pg4  
pg4  
pg4  
pg4  
pg4  
pg4  
n R S T_ Ttv  
nMDS _Itv  
nDS _Itv  
R_W_Itv  
nMAS _Itv  
P 34tv  
nS YNCtv  
S CLKtv  
nAS _Itv  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
R_W_I  
nMAS _I  
P 34_nDM  
nS YNC  
S CLK  
nAS_I  
nRS T_frI  
U14D  
12  
13  
VCC_I  
11  
nRS T_Itv  
nIACKtv  
nXROFFtv  
74LVC08A  
U14C  
pg3,4 nRS T_Itv  
pg4  
nIRQ_ACK  
nIACKtv  
nEXR_OFF  
9
pg4  
nXROFFtv  
nEXR_OFF pg7  
8
10  
VCC_I  
R24  
10K  
74LVC08A  
U14B  
48  
1
25  
24  
7
4
5
VCC  
1OE  
1DIR  
2OE  
2DIR  
VCCB1  
VCCB2  
VCCA1  
VCCA2  
nDTMRtv  
XTAL1tv  
18  
31  
42  
6
VCC  
nDTMRtv pg4  
FG_BG  
VCC_I  
74LVC08A  
U14A  
4
10  
15  
21  
28  
34  
39  
45  
GND4  
GND28  
1
2
GND10 GND34  
GND15 GND39  
GND21 GND45  
3
XTAL1tv pg4  
XTAL1_EM  
IDT74FCT164245TP A  
74LVC08A  
FG_BG  
pg8  
LOW TO HIGH VOLT AGE TRANSLATION  
AD_I[7..0]  
pg7,8 AD_I[7..0]  
pg3,7,8 A_I[15..8]  
A_I[15..8]  
A_Itv[15..8]  
pg4 A_Itv[15..8]  
U16  
A_Itv8  
A_Itv9  
A_I8  
A_I9  
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
2
3
5
6
8
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
A_Itv10  
A_Itv11  
A_Itv12  
A_Itv13  
A_Itv14  
A_Itv15  
A_I10  
A_I11  
A_I12  
A_I13  
A_I14  
A_I15  
SOCKET F OR ICE  
AD_Itv[7..0]  
MCU  
OSCILLATO  
pg4 AD_Itv[7..0]  
R
AD_Itv0  
AD_I0  
AD_Itv1  
AD_Itv2  
AD_Itv3  
AD_Itv4  
AD_Itv5  
AD_Itv6  
AD_Itv7  
AD_I1  
AD_I2  
AD_I3  
AD_I4  
AD_I5  
AD_I6  
AD_I7  
VCC  
Y1  
1
14  
5
NC  
VCC  
4
GND1 O UT1  
48  
1
25  
24  
7
VCC  
nAD_I_OE  
I_WR_RD  
VCC  
1OE  
1DIR  
2OE  
2DIR  
VCCB1  
VCCB2  
VCCA1  
VCCA2  
18  
31  
42  
7
8
pg3  
pg3  
nAD_I_OE  
I_WR_RD  
GND2 O UT2  
8MHZ_FS  
VCC_I  
4
10  
15  
21  
28  
34  
39  
45  
GND4  
GND28  
GND10 GND34  
GND15 GND39  
GND21 GND45  
IDT74FCT164245TP A  
VOLTAGE TRANS LATOR  
Title  
FOR USER" S MANUAL ONLY  
S CHEMATIC, Z86L99EMULATION DAUGHTER BOARD  
Size  
B
Docume nt Numbe r  
R e v  
A
Da te :  
Monda y, Augus t 14, 2000  
S he e t  
E
11  
of  
11  
A
B
C
D
UM005100-IRR0400  
Schematic 11  

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