Z90239 [ZILOG]
Z8 DIGITAL TELEVISION CONTROLLERS; Z8数字电视控制器
| 型号： | Z90239 |
| 厂家： | 
ZILOG, INC. |
| 描述： | Z8 DIGITAL TELEVISION CONTROLLERS |
| 文件： | 总9页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY DATA SHEET
Z90231/233/234/239
1
Z8 DIGITAL TELEVISION CONTROLLERS
FEATURES
One 14-bit Pulse Width Modulator
ROM
(KB)
RAM
I/O
Voltage
Range
Device
(Bytes) Lines1
On-Chip Infrared (IR) Capture Registers
Four Channel 4-bit Analog-to-Digital Converter
Twenty Seven General Purpose I/O Pins
Z90231
Z90233
Z90234
Z90239
32(OTP)
16
236
236
236
236
27
27
27
27
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
24
32(ext.)
2
I C Master Serial Communication Port
Note: ꢀꢁꢂ+VꢂEQWPVUꢂCNNꢂOWZGFꢂ+ꢃ1ꢂRQTVꢄ
On Screen Display (OSD) Section
Z8-Based CMOS Microcontroller for Consum-
er Television, Cable Box, and Satellite Re-
ceiver Applications
Supports Displays up to 10 rows by 24 Columns with
256 Characters
Character Cell Resolution of 14 Pixels by 18 Scan lines
42-Pin SDIP Package except Z90239 (124 PGA)
Z8 MCU Core at 6 MHz
Mask ROM sizes Available in 16 and 24KB
Ten 6-bit Pulse Width Modulators
®
Variable Inter-row Spacing from 0–15 Horizontal Scan
Lines
Foreground and Background Colors Fully Programma-
ble by Character
GENERAL DESCRIPTION
The Z9023X Digital Television Controller (DTC) family is
ZiLOG’s latest and most powerful Z8-based DTC product
offering. These parts feature larger system RAM and ROM
options, togetherwithahostof newfeaturesincludinganew
color palette system, flexible inter-row spacing, higher
charactercellresolution, backgroundmesheffect,dedicated
I.R. capture registers, on-chip Analog-to-Digital conver-
Z90233 supports 16KB system ROM and Z90234 supports
24KB system ROM for mask.
The Z9021X family takes full advantage of the Z8’s ex-
panded register file space to offer greater flexibility in On
Screen Display creation.
2
sion, and a hardware Master mode I C interface. The famil-
Note: All signals with an overline, “ ”, are active Low. For ex-
ample, B/: (WORD is active Low, only); %/W (BYTE
is active Low, only).
iar Z8 core in combination with these advanced features
makes the Z9023X family an ideal choice for low to mid-
range televisions in both PAL and NTSC markets.
TheZ9023Xfamilyconsistsofthreebasicdevicetypes;ICE
Chip (Z90239), ROM Mask Parts (Z90233/Z90234), and
OTP Part (Z90231). The OTP (Z90231) supports field pro-
grammable 32KB system ROM. ICE Chip (Z90239) is used
in Z90239 Emulator and ProtoPak. As described above,
CP00300-TVX0698
1
Part_Number
Z8 Digital Television Controllers
ZiLOG
GENERAL DESCRIPTION (Continued)
Power connections follow conventional descriptions below:
Connection
Power
Circuit
VCC
Device
VDD
Ground
GND
VSS, AVSS
:6#.ꢀ
1UEKNNCVQT
:6#.ꢆ
4'5'6
9&6
2ꢆꢋ
2ꢆꢀ
2ꢆꢆ
2ꢆꢉ
2ꢆꢈ
2ꢆꢏ
2ꢆꢇ
2ꢆꢍ
ꢅꢃꢀꢆꢃꢀꢇꢃꢆꢈꢃꢉꢆ-ꢂ
4'5'6
$[VG
%QWPVGT
2TQITCOꢂ41/
6KOGT
2QTVꢆ
%QWPVGTꢂ
6KOGT
<ꢅꢂ%27
%QTG
#&%ꢋ
#&%ꢀ
#&%ꢆ
#&%ꢉ
ꢈꢊDKV
#&%
+4
+4+0
2ꢈꢋ
2ꢈꢀ
2ꢈꢆ
2ꢈꢉ
2ꢈꢈ
2ꢈꢏ
2ꢈꢇ
2ꢈꢍ
%QWPVGT
2ꢇꢋ
2ꢇꢀ
2ꢇꢆ
2ꢇꢉ
2QTVꢈ
2QTVꢉ
4GIKUVGTꢂ(KNG
ꢆꢉꢇꢂ$[VG
29/ꢂꢀꢀ
ꢎꢀꢈꢊDKVꢁ
29/ꢀꢀ
29/ꢀ
29/ꢆ
29/ꢉ
29/ꢈ
29/ꢏ
29/ꢇ
29/ꢍ
29/ꢅ
29/ꢌ
29/ꢀꢋ
5%.-ꢋ
5#ꢋ
5%.-ꢀ
5#ꢀ
+ %
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ꢐꢂꢀꢋꢂD[ꢂꢅꢊDKV
29/ꢂꢀ
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29/ꢂꢀꢋ
ꢎꢇꢊDKVꢁ
15&:ꢀ
15&:ꢆ
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)
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2ꢏꢋ
2ꢏꢀ
2ꢏꢆ
2ꢏꢉ
2ꢏꢈ
2ꢏꢏ
2ꢏꢇ
1WVRWV
2QTV
%JCTCEVGTꢂ41/
ꢌ-ꢂD[ꢂꢍꢊDKV
8$NCPM
*.(60
Figure 1. Functional Block Diagram
2
P R E L I M I N A R Y
CP00300-TVX0698
Z90231/233/234/239
Z8 Digital Television Controllers
ZiLOG
PIN IDENTIFICATION
ꢀ
ꢆ
ꢉ
ꢈ
ꢏ
ꢇ
ꢍ
ꢅ
ꢌ
ꢀꢋ
ꢀꢀ
ꢀꢆ
ꢀꢉ
ꢀꢈ
ꢀꢏ
ꢀꢇ
ꢀꢍ
ꢀꢅ
ꢀꢌ
ꢆꢋ
ꢆꢀ
2ꢆꢍꢃ5#ꢀ
ꢈꢆ
ꢈꢀ
ꢈꢋ
ꢉꢌ
ꢉꢅ
ꢉꢍ
ꢉꢇ
ꢉꢏ
ꢉꢈ
ꢉꢉ
ꢉꢆ
ꢉꢀ
ꢉꢋ
ꢆꢌ
ꢆꢅ
ꢆꢍ
ꢆꢇ
ꢆꢏ
ꢆꢈ
ꢆꢉ
ꢆꢆ
29/ꢀꢀꢃ2ꢏꢇ
29/ꢇꢃ2ꢏꢏ
29/ꢏꢃ2ꢏꢈ
29/ꢈꢃ2ꢏꢉ
29/ꢉꢃ2ꢏꢆ
29/ꢆꢃ2ꢏꢀ
29/ꢀꢃ2ꢏꢋ
2ꢈꢋ
2ꢇꢋꢃ#&%ꢉ
2ꢇꢀꢃ#&%ꢆ
2ꢈꢀꢃ#&%ꢀ
2ꢇꢆꢃ#&%ꢋ
#855
2ꢆꢇꢃ5%.-ꢀ
2ꢆꢏꢃ5#ꢋ
2ꢆꢈꢃ5%.-ꢋ
2ꢆꢉ
2ꢆꢆ
+4+0
2ꢆꢀ
8
4'5'6
:6#.ꢆ
:6#.ꢀ
855
15&:ꢆ
15&:ꢀ
85;0%
*5;0%
8$.#0-
4
<ꢌꢋꢆꢉZ
ꢎ6QRꢂ8KGYꢁ
2ꢈꢆ
2ꢈꢉ
2ꢇꢉ
2ꢈꢈꢃ29/ꢍ
2ꢈꢏꢃ29/ꢅ
2ꢈꢇꢃ29/ꢌ
2ꢈꢍꢃ29/ꢀꢋ
2ꢆꢋꢃ*.(60
)
$
Figure 2. 42-Pin SIDP Pin Identification
CP00300-TVX0698
P R E L I M I N A R Y
3
Part_Number
Z8 Digital Television Controllers
ZiLOG
PIN IDENTIFICATION (Continued)
Table 1. Z90231/233/234 42-Pin SDIP Package
Pin Number
34
Pin Function
+5 Volts
I/O/PWR
PWR
Reset State
PWR
Name
VDD
Note
30,13
0 Volts
PWR
PWR
VSS, AVSS
36
Infra Red remote capture input
14-bit Pulse Width Modulator output
6-bit Pulse Width Modulator output
Bit Programmable Input/Output ports
Bit programmable Input/Output ports
Half tone output
I
O
O
I/O
I/O
O
I/O
I/O
I/O
I/O
I
I
I
IRIN
PWM11
PWM[10:1]
P5[6:0]
1
1
1
20,19,18,17,2,3,4,5,6,7
I
7,6,5,4,3,2,1
I
42,41,40,39,38,37,35,21
I
P2[7:0]
21
I
HLFTN
SDATA0,1
SCLK0,1
P6[3:0]
40,42
I2C Data
I2C Clock
I
39,41
I
16,12,10,9
Bit programmable Input/Output ports
Bit programmable Input/Output ports
Crystal oscillator input
Crystal oscillator output
Dot clock oscillator input
Dot clock oscillator output
Horizontal Sync
I
20,19,18,17,15,14,11,8
I
P4[7:0]
31
I
XTAL1
32
O
I
O
I
XTAL2
28
OSDX1
OSDX2
HSYNC
VSYNC
VBLANK
R,G,B
29
O
I
O
I
26
27
Vertical Sync
I
I
25
Video blank
O
O
AI
I
O
O
I
24,23,22
9,10,11,12
33
Video R,G,B
4-bit Analog to Digital converter input
Device reset
ADC[3:0]
/RESET
I
Note:
1. It is Input on POR. It must be configured to be output ports for PWM applications
4
P R E L I M I N A R Y
CP00300-TVX0698
Z90231/233/234/239
Z8 Digital Television Controllers
ZiLOG
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
rating is a stress rating only. Operation of the device at any
condition above those indicated in the operational sections
of these specifications is not implied. Exposure to absolute
maximumratingconditionsforextendedperiodsmayaffect
device reliability
Symbol
VDD
VI
Parameters
Power Supply Voltage
Input Voltage
Min
–0.3
–0.3
–0.3
Max
+7
Units
V
Notes
VDD+0.3
VDD+0.3
–10
V
VO
Output Voltage
V
IOH
Output Current High
Output Current High
Output Current Low
Output Current Low
Operating Temperature
Storage Temperature
mA
mA
mA
mA
per pin
per device
per pin
IOH
–100
20
IOL
IOL
200
per device
oC
oC
TA
0
70
TSTG
–55
150
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test con-
ditions as noted. All voltages are referenced to GND. Pos-
itive current flows into the referenced pin (Figure 3).
+5V
2.1 kΩ
From Output
Under Test
150 pF
9.1 kΩ
Figure 3. Test Load Diagram
CP00300-TVX0698
P R E L I M I N A R Y
5
Part_Number
Z8 Digital Television Controllers
ZiLOG
DC CHARACTERISTICS
Q
Q
6 ꢂꢑꢋ %ꢂVQꢂꢒꢂꢍꢋ %ꢓꢂ8 ꢂꢑꢂꢒꢈꢄꢏ8ꢂVQꢂꢒꢏꢄꢏ8ꢓꢂ(
ꢂꢑꢂꢇꢂ/*\
#
&&
15%
Symbol
VDD
Parameter
Min
Typical Max
Units
V
Conditions
Power Supply Voltage
Input Voltage High
Input Voltage Low
Input XTAL/Osc in High
Input XTAL/Osc In Low
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Schmitt Hysteresis
Reset Input Current
Input Leakage
4.5
5.00
5.5
VIH
0.7VDD
0
VDD
V
VIL
0.2VDD
VCC
V
VIHC
VILC
VOH_ST
VOL_ST
VOH_LE
VOL_LE
VHY
0.7VDD
0
V
0.07VDD
V
VDD–0.4
4.75
0.16
V
IOH=–2mA for standard drive
IOL=2.00mA for standard drive
IOH=–0.98mA for low EMI drive
IOL=0.66mA for low EMI drive
0.4
V
VDD–0.4
V
0.4
V
0.1VDD
0.8
V
IIR
–46
0.01
0.02
25
–80
3.0
3.0
40
6
uA
uA
uA
mA
mA
uA
VRL=0V
IIL
–3.0
–3.0
0V,VDD
IOL
Tri-State Leakage
Supply Current
0V,VDD
ICC
All inputs at rail;outputs floating
All inputs at rail;outputs floating
All inputs at rail;outputs floating
ICC1
HALT Mode Current
STOP Mode Current
3.2
ICC2
0.1
10
Note: 6[RKECNꢂXCNWGUꢂOGCUWTGFꢂCVꢂꢆꢏ %ꢄꢂ/KPKOWOꢂCPFꢂ/CZKOWOꢂXCNWGUꢂKPFKECVGFꢂHTQOꢂꢋ %ꢂVQꢂꢍꢋ %ꢄ
6
P R E L I M I N A R Y
CP00300-TVX0698
Z90231/233/234/239
Z8 Digital Television Controllers
ZiLOG
AC CHARACTERISTICS
No
1
Symbol
TpC
Parameter
Min
Max
1000
25
Unit
ns
Input clock period
166
2
TrC, TfC
TwC
Clock input raise and fall
Input clock width
ns
3
35
70
ns
4
TwHSYNC
L
Timer input low width
Timer input high width
Timer input period
ns
5
TwHSYNC
TpHSYNC
TrHSYNC, TrHSYNC
TwIL
H
3TpC
8TpC
6
7
Timer input raise and fall
Int request input low
Int request input high
Power-On reset delay
100
100
ns
ns
8
70
3TpC
25
9
TwIH
10
11
TdPOR
ms
ns
TdLVIRES
Low voltage detect to internal
RESET condition
200
12
13
14
TwRES
TdHsOl
TdHsOh
Reset minimum width
Hsync start to Vosc stop
Hsync start to Vosc start
5TpC
2TpV
3TpV
1TpV
CP00300-TVX0698
P R E L I M I N A R Y
7
Part_Number
Z8 Digital Television Controllers
ZiLOG
AC TIMING DIAGRAMS
ꢆ
ꢄ
ꢀ
ꢂ
:6#.ꢀ
*
ꢂ
ꢃ
ꢁ
ꢁ
ꢅ
+430
ꢈ
ꢇ
8
ꢀꢀ
ꢀꢉ
+PVGTPCNꢃ4'5'6
ꢀꢁ
'ZVGTPCNꢃ4'5'6
*
ꢀꢂ
ꢀꢃ
15%:ꢆ
Figure 4. Timing Diagram
8
P R E L I M I N A R Y
CP00300-TVX0698
Z90231/233/234/239
Z8 Digital Television Controllers
ZiLOG
Pre-Characterization Product:
The product represented by this CPS is newly introduced and
ZiLOG has not completed the full characterization of the
product. The CPS states what ZiLOG knows about this product
at this time, but additional features or non-conformance with
some aspects of the CPS may be found, either by ZiLOG or its
customers in the course of further application and
characterization work. In addition, ZiLOG cautions that delivery
may be uncertain at times, due to start-up yield issues.
© 1998 by ZiLOG, Inc. All rights reserved. No part of this
document may be copied or reproduced in any form or by any
means without the prior written consent of ZiLOG, Inc. The
information in this document is subject to change without notice.
Devices sold by ZiLOG, Inc. are covered by warranty and patent
indemnification provisions appearing in ZiLOG, Inc. Terms and
Conditions of Sale only.
update or keep current the information contained in this
document.
ZiLOG’s products are not authorized for use as critical
components in life support devices or systems unless a specific
written agreement pertaining to such intended use is executed
between the customer and ZiLOG prior to use. Life support
devices or systems are those which are intended for surgical
implantation into the body, or which sustains life whose failure
to perform, when properly used in accordance with instructions
for use provided in the labeling, can be reasonably expected to
result in significant injury to the user.
ZILOG, INC. MAKES NO WARRANTY, EXPRESS,
STATUTORY, IMPLIED OR BY DESCRIPTION,
REGARDING THE INFORMATION SET FORTH HEREIN
OR REGARDING THE FREEDOM OF THE DESCRIBED
DEVICES
FROM
INTELLECTUAL
PROPERTY
ZiLOG, Inc.
910 East Hamilton Avenue, Suite 110
Campbell, CA 95008
INFRINGEMENT. ZILOG, INC. MAKES NO WARRANTY
OF MERCHANTABILITY OR FITNESS FOR ANY
PURPOSE.
Telephone (408) 558-8500
FAX 408 558-8300
Internet: http://www.zilog.com
ZiLOG, Inc. shall not be responsible for any errors that may
appear in this document. ZiLOG, Inc. makes no commitment to
CP00300-TVX0698
P R E L I M I N A R Y
9
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