MAT14ARZ

更新时间:2025-07-10 12:35:53
品牌:ADI
描述:Matched Monolithic Quad Transistor

MAT14ARZ 概述

Matched Monolithic Quad Transistor 匹配的单片四路晶体管 双极性晶体管

MAT14ARZ 数据手册

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Matched Monolithic Quad Transistor  
MAT14  
FEATURES  
PIN CONFIGURATION  
Low offset voltage: 400 µV maximum  
High current gain: 300 minimum  
Excellent current gain match: 4% maximum  
Low voltage noise density at 100 Hz, 1 mA  
3 nV/Hz maximum  
C
B
E
1
2
3
4
5
6
7
14  
13  
12  
C
B
E
1
1
1
4
4
MAT14  
4
SUB  
TOP VIEW  
11 SUB  
(Not to Scale)  
E
B
C
10  
9
E
3
2
2
2
B
C
3
3
Excellent log conformance  
8
Bulk resistance (rBE) = 0.6 Ω maximum  
Guaranteed matching for all transistors  
Figure 1.  
APPLICATIONS  
Low noise op amp front end  
Current mirror and current sink/source  
Low noise instrumentation amplifiers  
Voltage controlled attenuators  
Log amplifiers  
GENERAL DESCRIPTION  
The MAT14 is a quad monolithic NPN transistor that offers  
excellent parametric matching for precision amplifier and  
nonlinear circuit applications. Performance characteristics  
of the MAT14 include high gain (300 minimum) over a wide  
range of collector current, low noise (3 nV/Hz maximum at  
100 Hz, IC = 1 mA), and excellent logarithmic conformance.  
The MAT14 also features a low offset voltage of 100 µV typical  
and tight current gain matching to within 4%. Each transistor of  
the MAT14 is individually tested to data sheet specifications.  
For matching parameters (offset voltage, input offset current,  
and gain match), each of the dual transistor combinations are  
verified to meet stated limits. Device performance is guaranteed  
at an ambient temperature of 25°C and over the industrial tem-  
perature range.  
The long-term stability of matching parameters is guaranteed  
by the protection diodes across the base emitter junction of  
each transistor. These diodes prevent degradation of beta and  
matching characteristics due to reverse bias, base emitter current.  
The superior logarithmic conformance and accurate matching  
characteristics of the MAT14 make it an excellent choice for use  
in log and antilog circuits. The MAT14 is an ideal choice in  
applications where low noise and high gain are required.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2010 Analog Devices, Inc. All rights reserved.  
 
 
 
 
MAT14  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Thermal Resistance.......................................................................4  
ESD Caution...................................................................................4  
Typical Performance Characteristics ..............................................5  
Theory of Operation .........................................................................8  
Applications Information.............................................................8  
Outline Dimensions..........................................................................9  
Ordering Guide .............................................................................9  
Applications....................................................................................... 1  
Pin Configuration............................................................................. 1  
General Description ......................................................................... 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Electrical Characteristics............................................................. 3  
Absolute Maximum Ratings............................................................ 4  
REVISION HISTORY  
12/10—Rev. 0 to Rev. A  
Changes to General Description .................................................... 1  
Changes to Operating Temperature Range in Table 2................. 4  
Updated Outline Dimensions......................................................... 9  
Changes to Ordering Guide ............................................................ 9  
10/10—Revision 0: Initial Version  
Rev. A | Page 2 of 12  
MAT14  
SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS  
TA = 25°C, unless otherwise specified.  
Table 1.  
Parameter  
Symbol  
Test Conditions/Comments  
Min Typ  
Max Unit  
DC AND AC CHARACTERISTICS  
Current Gain  
hFE  
10 µA ≤ IC ≤ 1 mA  
0 V ≤ VCB 30 V1  
−40°C ≤ TA ≤ +85°C  
IC = 100 µA2  
0 V ≤ VCB ≤ 30 V  
IC = 1 mA, VCB = 03  
fO = 10 Hz  
300  
200  
600  
500  
1
Current Gain Match  
ΔhFE  
eN  
4
%
Noise Voltage Density  
2
1.8  
1.8  
4
3
3
nV/√Hz  
nV/√Hz  
nV/√Hz  
fO = 100 Hz  
fO = 1 kHz  
Offset Voltage  
VOS  
10 µA ≤ IC ≤ 1 mA4  
0 V ≤ VCB ≤ 30 V  
−40°C ≤ TA ≤ +85°C  
0 V ≤ VCB ≤ 30 V4  
10 µA ≤ IC ≤ 1 mA  
10 µA ≤ IC ≤ 1 mA4, VCB = 0 V  
−40°C ≤ TA ≤ +85°C  
IC = 100 µA, VCB = 0 V  
IC = 10 µA  
100  
120  
400  
520  
µV  
μV  
Offset Voltage Change vs. VCB Change  
ΔVOS/ΔVCB  
100  
10  
200  
50  
µV  
µV  
Offset Voltage Change vs. IC Change  
Offset Voltage Drift  
ΔVOS/ΔIC  
ΔVOS/ΔT  
0.4  
2
µV/°C  
V
Breakdown Voltage  
BVCEO  
fT  
ICBO  
ICS  
40  
40  
−40°C ≤ TA ≤ +85°C  
IC = 1 mA, VCE = 10 V  
V
Gain-Bandwidth Product  
Collector Leakage Current  
Base  
300  
MHz  
VCB = 40 V  
−40°C ≤TA ≤ +85°C  
VCS = 40 V  
−40°C ≤ TA ≤ +85°C  
VCE = 40 V  
5
pA  
nA  
nA  
nA  
nA  
nA  
0.5  
0.5  
0.7  
3
Substrate  
Emitter  
ICES  
−40°C ≤ TA ≤ +85°C  
5
Input Current  
Bias  
IB  
IC = 100 µA, 0 V ≤ VCB ≤ 30 V  
−40°C ≤ TA ≤ +85°C  
IC = 100 µA, VCB = 0 V  
−40°C ≤ TA ≤ +85°C  
IC = 100 µA  
165  
200  
2
330  
500  
13  
nA  
nA  
nA  
nA  
Offset  
IOS  
8
40  
Offset Drift  
ΔIOS/ΔT  
−40°C ≤ TA ≤ +85°C  
IC = 1 mA, IB = 100 µA  
100  
0.03  
10  
0.4  
40  
pA/°C  
V
pF  
Ω
Collector Saturation Voltage  
Output Capacitance  
Bulk Resistance  
VCE(SAT)  
COBO  
rBE  
0.06  
0.6  
5
VCB = 15 V, IE = 0, f = 1 MHz  
10 µA ≤ IC ≤ 10 mA,VCB = 0 V6  
VCB = 15 V, IE = 0, f = 1 MHz  
Input Capacitance  
CEBO  
pF  
1 Current gain measured at IC = 10 µA, 100 µA, and 1 mA.  
2 Current gain match (ΔhFE) defined as: ΔhFE = (100(ΔIB)(hFE min)/IC).  
3 Sample tested.  
4 Measured at IC = 10 µA and guaranteed by design over the specified range of IC.  
5 See Table 2 for the emitter current rating.  
6 Guaranteed by design.  
Rev. A | Page 3 of 12  
 
 
 
MAT14  
ABSOLUTE MAXIMUM RATINGS  
Table 2.  
THERMAL RESISTANCE  
θJA is specified for the worst-case conditions, that is, a device  
soldered in a circuit board for surface-mount packages.  
Parameter  
Rating  
Voltage  
Collector-to-Base Voltage (BVCBO  
Collector-to-Emitter Voltage (BVCEO  
Collector-to-Collector Voltage (BVCC)  
Emitter-to-Emitter Voltage (BVEE)  
)
40 V  
40 V  
40 V  
40 V  
Table 3. Thermal Resistance  
Package Type  
)
θJA  
θJC  
Unit  
14-Lead SOIC  
115  
36  
°C/W  
Current  
Collector Current (IC)  
Emitter Current (IE)  
30 mA  
30 mA  
ESD CAUTION  
Temperature  
Storage Temperature Range  
Operating Temperature Range  
Junction Temperature Range  
−65°C to +150°C  
−40°C to +85°C  
−65°C to +150°C  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Rev. A | Page 4 of 12  
 
 
 
 
MAT14  
TYPICAL PERFORMANCE CHARACTERISTICS  
700  
680  
660  
640  
620  
0.70  
0.65  
0.60  
0.55  
0.50  
0.45  
0.40  
0.35  
0.30  
T
= 125°C  
600  
580  
560  
540  
520  
500  
480  
460  
440  
420  
400  
380  
360  
340  
320  
300  
A
T
= 85°C  
A
T
= 25°C  
A
0.001  
0.01  
0.1  
1
0.001  
0.01  
0.1  
1
10  
COLLECTOR CURRENT (mA)  
COLLECTOR CURRENT (mA)  
Figure 2. Current Gain vs. Collector Current  
Figure 5. Base Emitter-On-Voltage vs. Collector Current  
700  
680  
660  
640  
620  
600  
580  
560  
540  
520  
500  
480  
460  
440  
420  
400  
380  
360  
340  
320  
300  
100  
10  
V
= 20V  
CB  
1
V
= 0V  
CB  
0.1  
0.01  
0.001  
125  
0.001  
0.01  
0.1  
1
10  
–50  
–25  
0
25  
50  
75  
100  
150  
COLLECTOR CURRENT (mA)  
TEMPERATURE (°C)  
Figure 3. Current Gain vs. Temperature  
Figure 6. Small Signal Input Resistance vs. Collector Current  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
1m  
0.1m  
0.01m  
1µ  
NOISE = 100Hz  
NOISE = 10Hz  
0.1µ  
0.01µ  
0
2
4
6
8
10  
12  
1µ  
0.01m  
0.1m  
1m  
0.01  
0.1  
1
COLLECTOR CURRENT (I  
)
C
COLLECTOR CURRENT (A)  
Figure 4. Voltage Noise Density vs. Collector Current  
Figure 7. Small Signal Output Conductance vs. Collector Current  
Rev. A | Page 5 of 12  
 
MAT14  
200  
160  
120  
80  
10  
1
100kΩ  
T
= 125°C  
A
0.1  
10kΩ  
1kΩ  
40  
T
= 85°C  
A
T
= 25°C  
10  
A
0
0.01  
0.01  
0.001  
0.01  
0.1  
1
0.1  
1
100  
COLLECTOR CURRENT (mA)  
COLLECTOR CURRENT (mA)  
Figure 8. Saturation Voltage vs. Collector Current  
Figure 10. Total Noise vs. Collector Current  
20  
18  
16  
14  
12  
10  
8
100  
10  
1
10µA  
1mA  
6
4
2
0
0
1
2
3
4
5
6
7
8
9
10  
1
10  
100  
1k  
10k  
COLLECTOR-TO-BASE VOLTAGE (V)  
FREQUENCY (Hz)  
Figure 11. Collector-to-Base Capacitance vs. Collector-to-Base Voltage  
Figure 9. Noise Voltage Density vs. Frequency  
Rev. A | Page 6 of 12  
MAT14  
40  
35  
30  
25  
20  
15  
10  
5
10  
1
0.1  
0.01  
0.001  
0
25  
50  
75  
100  
125  
0
1
2
3
4
5
6
7
8
9
10  
TEMPERATURE (°C)  
COLLECTOR-TO-SUBSTRATE VOLTAGE (V)  
Figure 12. Collector-to-Substrate Capacitance vs.  
Collector-to-Substrate Voltage  
Figure 14. Collector-to-Collector Leakage vs. Temperature  
10  
1
0.1  
0.01  
0.001  
25  
50  
75  
100  
125  
TEMPERATURE (°C)  
Figure 13. Collector-to-Base Leakage vs. Temperature  
Rev. A | Page 7 of 12  
MAT14  
THEORY OF OPERATION  
these mirrors is reduced from that of the unity-gain source due  
to base current errors but remains better than 2%.  
APPLICATIONS INFORMATION  
To minimize coupling between devices, tie one of the substrate  
pins (Pin 4 or Pin 11) to the most negative circuit potential.  
Note that Pin 4 and Pin 11 are internally connected.  
I
I
= 2(I )  
REF  
REF  
OUT  
Q1  
Q4  
Applications Current Sources  
MAT14 can be used to implement a variety of high impedance  
current mirrors as shown in Figure 15, Figure 16, and Figure 17.  
These current mirrors can be used as biasing elements and load  
devices for amplifier stages.  
Q2  
Q3  
I
I
= I  
REF  
OUT REF  
V–  
Figure 16. Current Mirror, IOUT = 2(lREF  
)
I
I
= 1/2(I  
)
REF  
OUT REF  
Q1  
Q3  
Q2  
Q4  
Q1  
Q4  
Q2  
Q3  
V–  
Figure 15. Unity-Gain Current Mirror, IOUT = IREF  
V–  
The unity-gain current mirror shown in Figure 15 has an  
accuracy of better than 1% and an output impedance of more  
than 100 MΩ at 100 μA.  
Figure 17. Current Mirror, IOUT = ½(IREF  
)
Figure 18 is a temperature independent current sink that has an  
accuracy of better than 1% at an output current of 100 μA to 1 mA.  
A Schottky diode acts as a clamp to ensure correct circuit startup at  
power-on. Use 1% metal film type resistors in this circuit.  
Figure 16 and Figure 17 each show a modified current mirror;  
Figure 16 is designed for a current gain of two (2), and Figure 17  
is designed for a current gain of one-half (½). The accuracy of  
+15V  
2
6
ADR01  
10V  
R
I
=
OUT  
I
I
I
OUT  
OUT  
OUT  
4
R
100pF  
2
R
7
1
3
7
5
8
14  
12  
6
2
6
9
13  
MAT14  
OP1177  
4
3
10  
HP  
5082-2811  
R
R
R
R
–15V  
Figure 18. Temperature Independent Current Sink, IOUT = 10 V/R  
Rev. A | Page 8 of 12  
 
 
 
 
 
 
MAT14  
OUTLINE DIMENSIONS  
8.75 (0.3445)  
8.55 (0.3366)  
8
7
14  
1
6.20 (0.2441)  
5.80 (0.2283)  
4.00 (0.1575)  
3.80 (0.1496)  
1.27 (0.0500)  
BSC  
0.50 (0.0197)  
0.25 (0.0098)  
45°  
1.75 (0.0689)  
1.35 (0.0531)  
0.25 (0.0098)  
0.10 (0.0039)  
8°  
0°  
COPLANARITY  
0.10  
SEATING  
PLANE  
1.27 (0.0500)  
0.40 (0.0157)  
0.51 (0.0201)  
0.31 (0.0122)  
0.25 (0.0098)  
0.17 (0.0067)  
COMPLIANT TO JEDEC STANDARDS MS-012-AB  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 19. 14-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-14)  
Dimensions shown in millimeters and (inches)  
ORDERING GUIDE  
Model1  
Temperature Range  
Package Description  
Package Option  
MAT14ARZ  
MAT14ARZ-R7  
MAT14ARZ-RL  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +85°C  
14-Lead Standard Small Outline Package [SOIC_N]  
14-Lead Standard Small Outline Package [SOIC_N]  
14-Lead Standard Small Outline Package [SOIC_N]  
R-14  
R-14  
R-14  
1 Z = RoHS Compliant Part.  
Rev. A | Page 9 of 12  
 
 
MAT14  
NOTES  
Rev. A | Page 10 of 12  
MAT14  
NOTES  
Rev. A | Page 11 of 12  
MAT14  
NOTES  
©2010 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D09045-0-12/10(A)  
Rev. A | Page 12 of 12  

MAT14ARZ CAD模型

原理图符号

PCB 封装图

3D模型

MAT14ARZ 替代型号

型号 制造商 描述 替代类型 文档
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