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M906-01-125.0000

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M906-01-125.0000 概述

CLCC-36, Tube

M906-01-125.0000 数据手册

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P r o d u c t D a t a S h e e t

Integrated

Circuit

Systems, Inc.

M906-01

VCSO BASED GBE CLOCK GENERATOR

GENERAL DESCRIPTION

PIN ASSIGNMENT (9 x 9 mm SMT)

The M906-01 is a PLL (Phase Locked Loop) based

clock generator that uses an

internal VCSO (Voltage Controlled

SAW Oscillator) to produce a very

low jitter output clock. It is ideal for

Gigabit Ethernet. The output clock

(frequency of 156.25 or 187.50MHz

for example) is provided from six

XTAL_2

FOUT4

nFOUT4

FOUT5

nFOUT5

VCC

nFOUT2

FOUT2

nFOUT1

FOUT1

GND

nFOUT0

FOUT0

VCC

LVPECL clock output pairs. (Specify frequency at time

of order.) The accuracy of the output frequency is

assured by the internal PLL, which phase-locks the

internal VCSO to the reference input frequency (25 or

30MHz for example). The input reference can either

be an external crystal, utilizing the internal crystal

oscillator, or a stable external clock source such as

a packaged crystal oscillator.

M906-01

( T o p V i e w )

DNC

GND

FEATURES

◆ Output clock frequency from 125MHz to 190MHz

(Consult factory for frequency availability)

Figure 1: Pin Assignment

◆ Six identical LVPECL output pairs

◆ Integrated SAW (surface acoustic wave) delay line

◆ Low jitter 0.7ps RMS (over 12kHz-20MHz)

◆ Ideal for Gigabit Ethernet clock reference

◆ Output-to-output skew < 100ps

Example Output Frequency Configurations

Ref Clock

Frequency

(MHz)

Output

Frequency¹

(MHz)

PLL

Ratio

Application

◆ External XTAL or LVCMOS reference input

◆ Selectable external feed-through clock input

◆ STOP clock control (Logic 1 stops output clocks)

◆ Industrial temperature grade available

◆ Single 3.3V power supply

125

GbE

25/4

156.25

187.50

10GbE

12GbE

Table 1: Example Output Frequency Configurations

Note 1:Specify output clock frequency at time of order

◆ Small 9 x 9 mm SMT (surface mount) package

◆ Pb-free design/construction on all 9 x 9 mm modules

SIMPLIFIED BLOCK DIAGRAM

M906-01-156.25

VSCO

External

Crystal

LVPECL

Output

Clock Pairs

(e.g., 156.25

Frequency

Multiplying

PLL

XTAL

OSC

Divider

Reference

Clock Input

(e.g., 25 or 30MHz)

or 187.50MHz)

External

Loop Filter

External External

Output

Clock STOP

Control

Clock

Input

Select

Figure 2: Simplified Block Diagram

M906-01 Datasheet Rev 3.2

Revised 15Jun2006

M906-01 VCSO Based GbE Clock Generator

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

M906-01

Integrated

Circuit

Systems, Inc.

VCSO BASED

E CLOCK

ENERATOR

P r o d u c t D a t a S h e e t

DETAILED BLOCK DIAGRAM

R_LOOPC_LOOP

R_POST

External

Loop Filter

Components

C_POST

R_LOOPC_LOOP

nOP_IN OP_OUT

R_POST

M906-01

OP_IN

R_IN

nOP_OUT

nVC

FOUT5

Phase

Detector

SAW Delay Line

nFOUT5

XTAL_1 / REF_IN

XTAL

OSC

R Divider

R = 4

FOUT4

XTAL_2

nFOUT4

R_IN

Loop Filter

Amplifier

Phase

Shifter

FOUT3

VCSO

nFOUT3

M Divider

M = 25

FOUT2

nFOUT2

Phase Locked Loop (PLL)

EXT_CLK

FOUT1

nFOUT1

EN_EXT_CLK

FOUT0

nFOUT0

STOP

Figure 3: Detailed Block Diagram

PIN DESCRIPTIONS

Number Name

1, 2, 3, 10, 14, 26 GND

I/O

Ground

Configuration

Description

Power supply ground connections.

OP_IN

nOP_IN

Input

External loop filter connections. See Figure 5,

External Clock Feed-through, on pg. 3.

nOP_OUT

OP_OUT

Output

nVC

Input

11, 19, 33

VCC

Power

Power supply connection, connect to +3.3V.

FOUT0

nFOUT0

FOUT1

nFOUT1

FOUT2

nFOUT2

Clock output pairs, differential LVPECL output

(156.25 MHz for the M906-01-156.2500)

Output

No internal terminator

FOUT3

nFOUT3

FOUT4

nFOUT4

FOUT5

nFOUT5

Logic 1 enables the EXT_CLK input.

Use Logic 0 for normal operation.

EN_EXT_CLK

EXT_CLK

STOP

Input

Internal pull-down resistor

External clock feed-through: 0 to 200 MHz

Logic 1 stops clock outputs.

Use Logic 0 for normal operation.

Internal pull-down resistor

External crystal connection. Also accepts

LVCMOS/LVTTL compatible clock source.

XTAL_1 / REF_IN

Input

External crystal connection. Leave unconnected

when driving pin 27 with external clock reference.

XTAL_2

DNC

34, 35, 36

Do Not Connect.

Table 2: Pin Descriptions

Note 1: For typical value of internal pull-down resistor, see DC Characteristics, Pull-down on pg. 6.

M906-01 Datasheet Rev 3.2

2 of 8

Revised 15Jun2006

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

M906-01

Integrated

Circuit

Systems, Inc.

VCSO BASED

E CLOCK

ENERATOR

P r o d u c t D a t a S h e e t

The PLL

FUNCTIONAL DESCRIPTION

The PLL (Phase Locked Loop) includes the phase

detector, the VCSO, a feedback divider (labeled

“M Divider”), and a reference divider (“R Divider”).

The M906-01 is a PLL (Phase Locked Loop) based

clock generator that generates output clocks

synchronized to an input reference clock.

The feedback divider divides the VCSO output

frequency by a fixed value “M” to match the reference

frequency provided to the phase detector by the

reference divider.

The M906-01 combines the flexibility of a VCSO

(Voltage Controlled SAW Oscillator) with the stability of

a crystal oscillator.

Input Reference

By controlling the frequency and phase of the VCSO,

the phase detector precisely locks the frequency and

phase of the feedback divider output to that of the

reference divider output. This creates an output

frequency that is a multiple of the reference frequency

(which is output from the VCSO).

The input reference can either be an external, discrete

crystal device or a stable external clock source such as

a packaged crystal oscillator:

• If an external crystal is used with the on-chip crystal

oscillator circuit (XTAL OSC), the external crystal

should be a parallel-resonant, fundamental mode

crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input

pins. External crystal load capacitors are also

required.

The relationship between the VCSO output frequency,

the M Divider, the R Divider and the input reference

frequency is defined as follows:

----

Fvcso = Fxtal ×

• If an external LVCMOS/LVTTL clock source is used,

apply it to the XTAL_1 / REF_IN input pin.

For the M906-01-156.2500 (see “Ordering Information” on pg. 8):

In either case, the reference clock is supplied to the

phase detector of the PLL. The M906-01 includes a

reference divider that divides the input reference

frequency by a fixed value “R” and provides the result to

the phase detector.

• VCSO output frequency = 156.25MHz

• Input reference frequency = 25MHz

• M=25

• R= 4

Therefore, for the M906-01-156.2500:

The EX_CLK pin is available for a clock feed-through

mode for testing. See “External Clock Feed-through”

on pg. 3.

---------

156.25MHz = 25MHz

----

The product of the input crystal frequency and

falls within the lock range of the VCSO.

External Clock Feed-through

The EXT_CLK pin provides an input for an external

single-ended clock that directly drives the LVPECL

clock outputs. It can be used for system debugging and

performance evaluation.

1. Set pin EN_EXT_CLK to Logic 1.

2. Apply an external LVCMOS/LVTTL clock source

to the EXT_CLK input pin.

Due to the fact that EXT_CLK bypasses the PLL, any

frequency between DC and 200MHz can be used.

STOP Clock

The STOP pin puts the output clock into a static condition.

Logic 1 Output clocks are static

Logic 0 Output clocks enabled for normal operation

M906-01 Datasheet Rev 3.2

3 of 8

Revised 15Jun2006

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

M906-01

Integrated

Circuit

Systems, Inc.

VCSO BASED

E CLOCK

ENERATOR

P r o d u c t D a t a S h e e t

External Loop Filter

APPLICATION INFORMATION

To provide stable PLL operation, and thereby a low jitter

output clock, the M906-01 requires the use of an

external loop filter. This is provided via the provided

filter pins (see Figure 5).

This section includes information on the optional

external crystal and on the external loop filter.

The subsections on the loop filter provide example

component values and also briefly describe the SAW

PLL simulator tool and additional application

information available at www.icst.com.

Due to the differential signal path design, the

implementation requires two identical complementary

RC filters as shown here.

External Crystal Specifications

R_LOOPC_LOOP

R_POST

If an external crystal is used with the on-chip crystal

oscillator circuit (XTAL OSC), the external crystal

should have the following general specifications:

C_POST

Crystal Specifications

R_LOOPC_LOOP

nOP_IN OP_OUT

R_POST

Parameter

Min Typ Max Unit

AT-cut quartz

Crystal Type

OP_IN

nOP_OUT

nVC

Fundamental

Mode of Oscillation

Frequency Range

Equivalent Series Resistance

MHz

Figure 5: External Clock Feed-through

ESR

Ω

Example External Loop Filter Component Values

Spurious Response (non-harmonic)

-40 dBc

post

(pF)

Load Capacitance,

C_L

PLL Band- Damping R loop C loop R post

parallel load resonant

width (kHz) Factor

(kΩ)

(µF)

(kΩ)

0.1

1.0

Drive Level

Table 3: Crystal Specifications

0.5

3.0

3.3

1.1

4.5

4.2

1.5

4.7

4.70

1.00

1500

270

1.5 ¹

2.1 ²

The external crystal will be applied to the XTAL_1 / REF_IN

and XTAL_2 input pins. External crystal load capacitors

are also required.

4.7

0.10

6.4

20.0

33.0

0.10

Recommended External Crystal Configuration

10.6

0.033

120

M906-01

M9xx-0x

Table 4: Example External Loop Filter Component Values

Note 1: Optimum loop bandwidth when using an external reference

crystal. Will help to attenuate interference on the crystal’s

sinusoidal clock waveform and therefore will minimize device

output clock jitter.

Note 2: Alternative loop filter setting when using an external reference

crystal. Smaller C loop lowers loop damping factor with negli-

gible increase in output jitter.

XTAL_1 / REF_IN

XTAL_2

XTAL OSC

XTAL

Note 3: Optimum loop bandwidth when using an external reference

crystal oscillator. The square wave clock reference does not

require as much jitter attenuation, which allows for a wider

loop bandwidth and improved system noise tolerance.

Figure 4: Recommended External Crystal Configuration

XTAL= 25 or 30 MHz, Load Capacitance Specification = 18 pF

Refer to the M906-01 product web page at

www.icst.com/products/summary/m906-01.htm for

additional product information.

27 pF

33 pF

External load capacitors C1 and C2 present a load of 15 pf

to the crystal (they are seen in series by the crystal through

the common ground connection). With the additional of PCB

trace capacitance and M906-01 input capacitance, the total

load to the crystal is about 18 pf.

M906-01 Datasheet Rev 3.2

4 of 8

Revised 15Jun2006

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

M906-01

Integrated

Circuit

VCSO BASED

P r o d u c t D a t a S h e e t

SAW PLL Application Notes Available

E CLOCK

ENERATOR

Systems, Inc.

PLL Simulator Tool Available

A free PC software utility is available on the ICS website

(www.icst.com). The M2000 Timing Modules PLL

Simulator is a downloadable application that simulates

PLL jitter and wander transfer characteristics. This

enables the user to set appropriate external loop

component values in a given application.

The ICS web site also has application notes on:

• PCB layout guidelines (including special detailed

instructions for preventing issues such as external

reference crosstalk)

• Any new special device application details that may

become available

• Instructions for using PLL simulator software

Refer to the SAW PLL Simulator Software web page at

www.icst.com/products/calculators/m2000filterSWdesc.htm

for additional information.

• Guidelines for PCB fabrication (inc. recommended

PCB footprint, solder mask, and furnace profile)

Refer to the SAW PLL Application Notes web page at

www.icst.com/products/appnotes/SawPllAppNotes.htm

for application notes and any additional product

information that may become available.

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter

Rating

Unit

V_I

Input Voltage

-0.5 to V_CC+0.5

V_O

I _O

V_CC

T_S

Output Voltage

-0.5 to V_CC+0.5

Output Current

4.6

Power Supply Voltage

Storage Temperature

-45 to +100

^oC

Table 5: Absolute Maximum Ratings

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the

device. These ratings are stress specifications only. Functional operation of product at these conditions

or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or

AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods

may affect product reliability

RECOMMENDED CONDITIONS OF OPERATION

Symbol Parameter

Min

Typ

Max Unit

3.135

3.3

3.465

V_CC

Positive Supply Voltage

T_A

Ambient Operating Temperature

^oC

Commercial

Industrial

+70

+85

-40

Table 6: Recommended Conditions of Operation

M906-01 Datasheet Rev 3.2

5 of 8

Revised 15Jun2006

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

M906-01

Integrated

Circuit

Systems, Inc.

VCSO BASED

E CLOCK

ENERATOR

P r o d u c t D a t a S h e e t

ELECTRICAL SPECIFICATIONS

DC Characteristics

Unless stated otherwise, V_CC

3.3V +

%,T_A= 0 ^oC to +70 ^oC (commercial) , T_A= -40 ^oC to +85 ^oC (industrial) , Output Frequency=156.25MHz¹

LVPECL outputs terminated with 50

Ω to V_CC- 2V

Symbol Parameter

Power Supply V_CCPositive Supply Voltage

Min

3.135

Typ

3.3

Max

3.465

Unit

I_CC

Power Supply Current

350

Logic Inputs

V_IH

V_IL

I_IH

Input High Voltage

Input Low Voltage

Input High Current

Input Low Current

Input High Voltage

Input Low Voltage

Input High Current

Input Low Current

+0.3

0.8

150

-0.3

EN_EXT_CLK, EXT_CLK,

STOP

µA

I_IL

-5.0

Reference

Clock

Input

V_IH

V_IL

I_IH

(V / 2 ) +0.5

V +0.3

-0.3

-5.0

(V / 2 ) -0.5 V

XTAL_1 / REF_IN

(XTAL_2 disconnected)

150

µA

I_IL

EN_EXT_CLK, EXT_CLK,

STOP, XTAL_1 / REF_IN

All Inputs

Pull-down

C_IN

Input Capacitance, All Inputs

Internal Pull-down Resistor

Output High Voltage

EN_EXT_CLK, STOP

kΩ

pulldown

Differential

Output

V_OH

V_OL

V_P-P

-1.4

-2.0

-1.0

FOUT, nFOUT (0-5)

Output Low Voltage

-1.7

0.5

0.85

Peak to Peak Output Voltage

Table 7: DC Characteristics

Note 1: See Ordering Information on pg. 8

AC Characteristics

Unless stated otherwise, V_CC

3.3V +

%,T_A= 0 ^oC to +70 ^oC (commercial) , T_A= -40 ^oC to +85 ^oC (industrial) , Output Frequency=156.25MHz¹

LVPECL outputs terminated with 50

Ω to V_CC- 2V

Symbol Parameter

Min

125

Typ

156.25

Max

190

Unit

MHz

Test Conditions

F_OUT

Output Frequency Range

F_IN

Nominal Input Frequency, XTAL_1 / REF_IN

VCSO Pull-Range

MHz

ppm

APR

Φn

±100

±150

Single Side Band

Phase Noise

1kHz Offset

10kHz Offset

100kHz Offset

-90

-110

-135

0.7

dBc/Hz

@156.25MHz

1.0

J(t)

t_DC

t_R

Jitter (rms)

12kHz to 20MHz

Output Duty Cycle, High Time

FOUT, nFOUT (0-1)

350

450

550

100

200

Output Rise Time

Output Fall Time

Output Skew

MHz

20% to 80%

FOUT, nFOUT (0-1)

Between Any Pair

EXT_CLK

t_F

t_S

EXT_CLK Frequency

Table 8: AC Characteristics

M906-01 Datasheet Rev 3.2

6 of 8

Revised 15Jun2006

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

M906-01

Integrated

Circuit

Systems, Inc.

VCSO BASED

E CLOCK

ENERATOR

P r o d u c t D a t a S h e e t

Note 1: See Ordering Information on pg. 8

DEVICE PACKAGE - 9 x 9mm CERAMIC LEADLESS CHIP CARRIER

Mechanical Dimensions:

Refer to the SAW PLL application notes web page at

www.icst.com/products/appnotes/SawPllAppNotes.htm

for application notes, including recommended PCB

footprint, solder mask, and furnace profile.

Figure 6: Device Package - 9 x 9mm Ceramic Leadless Chip Carrier

M906-01 Datasheet Rev 3.2

7 of 8

Revised 15Jun2006

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

P r o d u c t D a t a S h e e t

M906-01

Integrated

Circuit

Systems, Inc.

VCSO BASED

E CLOCK

ENERATOR

ORDERING INFORMATION

Part Numbering Scheme

Example Part Numbers

Output Freq. (MHz) Temperature Order Part Number

Part Number:

Device Number

M906-01-xxx.xxxx

commercial

industrial

M906-01-156.2500

M906-01 156.2500

M906-01-156.2500

M906-01 156.2500

M906-01-187.5000

M906-01 187.5000

Temperature

156.25

187.50

to +70 ^o

C (commercial)

^“I^-”=⁼- 40 to +85 ^o

(industrial)

commercial

industrial

Output Frequency (MHz)

See Table 8, right. Consult ICS for other frequencies.

commercial

Figure 7: Part Numbering Scheme

industrial

Table 9: Example Part Numbers

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)

assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would

result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial

applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary

environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any

circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or

critical medical instruments.

M906-01 Datasheet Rev 3.2

8 of 8

Revised 15Jun2006

Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400

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