MCP14E4
更新时间:2024-12-04 05:42:11
品牌:MICROCHIP
描述:The MCP14E3/E4/E5 devices are a family of 4 A, dual output MOSFET gate drivers with separate enabl
MCP14E4 概述
The MCP14E3/E4/E5 devices are a family of 4 A, dual output MOSFET gate drivers with separate enabl
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PDF下载MCP14E3/MCP14E4/MCP14E5
4.0A Dual High-Speed Power MOSFET Drivers With Enable
Features
General Description
• High Peak Output Current: 4.0A (typical)
The MCP14E3/MCP14E4/MCP14E5 devices are a
family of 4.0A buffers/MOSFET drivers. Dual-inverting,
dual-noninvertering, and complementary outputs are
standard logic options offered.
• Independent Enable Function for Each Driver
Output
• Low Shoot-Through/Cross-Conduction Current in
Output Stage
The MCP14E3/MCP14E4/MCP14E5 drivers are
capable of operating from a 4.5V to 18V single power
supply and can easily charge and discharge 2200 pF
gate capacitance in under 15 ns (typical). They provide
low impedance in both the ON and OFF states to
ensure the MOSFET’s intended state will not be
affected, even by large transients. The MCP14E3/
MCP14E4/MCP14E5 inputs may be driven directly
from either TTL or CMOS (2.4V to 18V).
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• High Capacitive Load Drive Capability:
- 2200 pF in 15 ns (typical)
- 5600 pF in 26 ns (typical)
• Short Delay Times: 50 ns (typical)
• Latch-Up Protected: Will Withstand 1.5A Reverse
Current
Additional control of the MCP14E3/MCP14E4/
MCP14E5 outputs is allowed by the use of separate
enable functions. The ENB_A and ENB_B pins are
active high and are internally pulled up to VDD. The pins
maybe left floating for standard operation.
• Logic Input Will Withstand Negative Swing Up To
5V
• Space-Saving Packages:
- 8-Lead 6x5 DFN, PDIP, SOIC
The MCP14E3/MCP14E4/MCP14E5 dual-output 4.0A
driver family is offered in both surface-mount and pin-
through-hole packages with a -40°C to +125°C
temperature rating. The low thermal resistance of the
thermally enhanced DFN package allows for greater
power dissipation capability for driving heavier
capacitive or resistive loads.
Applications
• Switch Mode Power Supplies
• Pulse Transformer Drive
• Line Drivers
• Motor and Solenoid Drive
These devices are highly latch-up resistant under any
conditions within their power and voltage ratings. They
are not subject to damage when up to 5V of noise
spiking (of either polarity) occurs on the ground pin.
They can accept, without damage or logic upset, up to
1.5A of reverse current being forced back into their
outputs. All terminals are fully protect against
Electrostatic Discharge (ESD) up to 4 kV.
Package Types
MCP14E4
8-Pin
MCP14E4
8-Pin
MCP14E3
MCP14E5
MCP14E3
MCP14E5
6x5 DFN (1)
PDIP/SOIC
ENB_A
IN A
ENB_B
OUT A
VDD
ENB_B
OUT A
VDD
ENB_B
OUT A
VDD
ENB_B
ENB_B
ENB_B
ENB_A
8
7
6
5
1
IN A 2
GND 3
IN B 4
OUT A
VDD
OUT A
VDD
OUT A
VDD
GND
IN B
OUT B
OUT B
OUT B
OUT B
OUT B
OUT B
Note 1: Exposed pad of the DFN package is electrically isolated.
© 2008 Microchip Technology Inc.
DS22062B-page 1
MCP14E3/MCP14E4/MCP14E5
Functional Block Diagram
VDD
Inverting
VDD
Output
Internal
Pull-up
Non-inverting
Enable
4.7 V
Input
Dual Inverting
MCP14E3
MCP14E4
MCP14E5
Effective
Input C = 20 pF
(Each Input)
4.7 V
Dual Noninverting
One Inverting, One Noninverting
GND
DS22062B-page 2
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
† Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational sections of this specification is not intended.
Exposure to maximum rating conditions for extended periods
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage ................................................................+20V
Input Voltage ...............................(VDD + 0.3V) to (GND – 5V)
Enable Voltage.............................(VDD + 0.3V) to (GND - 5V)
Input Current (VIN>VDD)................................................50 mA
Package Power Dissipation (TA = 50°C)
may affect device reliability.
8L-DFN ....................................................................... Note 3
8L-PDIP ........................................................................1.10W
8L-SOIC.....................................................................665 mW
DC CHARACTERISTICS (NOTE 2)
Electrical Specifications: Unless otherwise indicated, TA = +25°C, with 4.5V ≤ VDD ≤ 18V.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input
Logic ‘1’, High Input Voltage
Logic ‘0’, Low Input Voltage
Input Current
VIH
VIL
IIN
2.4
—
–1
-5
1.5
1.3
—
—
0.8
V
V
1
µA 0V ≤ VIN ≤ VDD
Input Voltage
VIN
—
VDD+0.3
V
Output
High Output Voltage
Low Output Voltage
Output Resistance, High
Output Resistance, Low
Peak Output Current
VOH
VOL
ROH
ROL
IPK
VDD – 0.025
—
—
—
0.025
3.5
3.0
—
V
V
Ω
Ω
A
A
DC Test
—
—
—
—
—
DC Test
2.5
2.5
4.0
>1.5
IOUT = 10 mA, VDD = 18V
IOUT = 10 mA, VDD = 18V
VDD = 18V (Note 2)
Duty cycle ≤ 2%, t ≤ 300 µs
Latch-Up Protection With-
stand Reverse Current
IREV
—
Switching Time (Note 1)
Rise Time
tR
tF
—
—
15
18
30
30
ns
ns
Figure 4-1, Figure 4-2
CL = 2200 pF
Fall Time
Figure 4-1, Figure 4-2
CL = 2200 pF
Propagation Delay Time
Propagation Delay Time
tD1
tD2
—
—
46
50
55
55
ns
ns
Figure 4-1, Figure 4-2
Figure 4-1, Figure 4-2
Enable Function (ENB_A, ENB_B)
High-Level Input Voltage
Low-Level Input Voltage
Hysteresis
VEN_H
1.60
1.30
0.10
40
1.90
2.20
0.30
85
2.90
2.40
0.60
115
V
V
V
VDD = 12V, LO to HI Transition
VDD = 12V, HI to LO Transition
VEN_L
VHYST
IENBL
Enable Leakage Current
µA VDD = 12V,
ENB_A = ENB_B = GND
Propagation Delay Time
Propagation Delay Time
tD3
tD4
—
—
60
50
—
—
ns
ns
Figure 4-3 (Note 1)
Figure 4-3 (Note 1)
Note 1: Switching times ensured by design.
2: Tested during characterization, not production tested.
3: Package power dissipation is dependent on the copper pad area on the PCB.
© 2008 Microchip Technology Inc.
DS22062B-page 3
MCP14E3/MCP14E4/MCP14E5
DC CHARACTERISTICS (NOTE 2) (CONTINUED)
Electrical Specifications: Unless otherwise indicated, TA = +25°C, with 4.5V ≤ VDD ≤ 18V.
Parameters
Power Supply
Sym
Min
Typ
Max
Units
Conditions
Supply Voltage
Supply Current
VDD
IDD
4.5
—
—
18.0
2.00
V
1.60
mA VIN_A = 3V, VIN_B = 3V,
ENB_A = ENB_B = High
IDD
IDD
IDD
IDD
IDD
IDD
IDD
—
—
—
—
—
—
—
0.60
1.20
1.20
1.40
0.55
1.00
1.00
0.90
1.40
1.40
1.80
0.75
1.20
1.20
mA VIN_A = 0V, VIN_B = 0V,
ENB_A = ENB_B = High
mA VIN_A = 3V, VIN_B = 0V,
ENB_A = ENB_B = High
mA VIN_A = 0V, VIN_B = 3V,
ENB_A = ENB_B = High
mA VIN_A = 3V, VIN_B = 3V,
ENB_A = ENB_B = Low
mA VIN_A = 0V, VIN_B = 0V,
ENB_A = ENB_B = Low
mA VIN_A = 3V, VIN_B = 0V,
ENB_A = ENB_B = Low
mA VIN_A = 0V, VIN_B = 3V,
ENB_A = ENB_B = Low
Note 1: Switching times ensured by design.
2: Tested during characterization, not production tested.
3: Package power dissipation is dependent on the copper pad area on the PCB.
DS22062B-page 4
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V ≤ VDD ≤ 18V.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input
Logic ‘1’, High Input Voltage VIH
2.4
—
—
—
—
—
0.8
+10
V
V
Logic ‘0’, Low Input Voltage
Input Current
VIL
IIN
–10
µA
0V ≤ VIN ≤ VDD
Output
High Output Voltage
Low Output Voltage
Output Resistance, High
Output Resistance, Low
Switching Time (Note 1)
Rise Time
VOH VDD – 0.025
—
—
—
0.025
6.0
V
V
Ω
Ω
DC TEST
VOL
ROH
ROL
—
—
—
DC TEST
3.0
3.0
IOUT = 10 mA, VDD = 18V
IOUT = 10 mA, VDD = 18V
5.0
tR
tF
—
—
25
28
40
40
ns
ns
Figure 4-1, Figure 4-2
CL = 2200 pF
Fall Time
Figure 4-1, Figure 4-2
CL = 2200 pF
Delay Time
Delay Time
tD1
tD2
—
—
50
50
70
70
ns
ns
Figure 4-1, Figure 4-2
Figure 4-1, Figure 4-2
Enable Function (ENB_A, ENB_B)
High-Level Input Voltage
Low-Level Input Voltage
Hysteresis
VEN_H
VEN_L
VHYST
IENBL
tD3
1.60
1.30
—
2.20
1.80
0.40
87
2.90
2.40
—
V
V
VDD = 12V, LO to HI Transition
VDD = 12V, HI to LO Transition
V
Enable Leakage Current
Propagation Delay Time
Propagation Delay Time
Power Supply
40
115
—
µA
ns
ns
VDD = 12V, ENB_A = ENB_B = GND
—
50
Figure 4-3
Figure 4-3
tD4
—
60
—
Supply Voltage
VDD
IDD
4.5
—
—
18.0
3.0
V
Supply Current
2.0
mA
VIN_A = 3V, VIN_B = 3V,
ENB_A = ENB_B = High
IDD
IDD
IDD
IDD
IDD
IDD
IDD
—
—
—
—
—
—
—
0.8
1.5
1.5
1.8
0.6
1.1
1.1
1.1
2.0
2.0
2.8
0.8
1.8
1.8
mA
mA
mA
mA
mA
mA
mA
VIN_A = 0V, VIN_B = 0V,
ENB_A = ENB_B = High
VIN_A = 3V, VIN_B = 0V,
ENB_A = ENB_B = High
VIN_A = 0V, VIN_B = 3V,
ENB_A = ENB_B = High
VIN_A = 3V, VIN_B = 3V,
ENB_A = ENB_B = Low
VIN_A = 0V, VIN_B = 0V,
ENB_A = ENB_B = Low
VIN_A = 3V, VIN_B = 0V,
ENB_A = ENB_B = Low
VIN_A = 0V, VIN_B = 3V,
ENB_A = ENB_B = Low
Note 1: Switching times ensured by design.
© 2008 Microchip Technology Inc.
DS22062B-page 5
MCP14E3/MCP14E4/MCP14E5
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V ≤ VDD ≤ 18V.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Specified Temperature Range
Maximum Junction Temperature
Storage Temperature Range
Package Thermal Resistances
Thermal Resistance, 8L-6x5 DFN
TA
TJ
TA
–40
—
—
—
—
+125
+150
+150
°C
°C
°C
–65
θJA
—
35.7
—
°C/W Typical four-layer board with
vias to ground plane
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
θJA
θJA
—
—
89.3
—
—
°C/W
°C/W
149.5
DS22062B-page 6
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
2.0
TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein are
not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
120
90
60
30
0
100
80
60
40
20
0
10,000 pF
6,800 pF
10,000 pF
6,800 pF
4,700 pF
4,700 pF
100 pF
2,200 pF
2,200 pF
100 pF
4
6
8
10
12
14
16
18
4
6
8
10
12
14
16
18
Supply Voltage (V)
Supply Voltage (V)
FIGURE 2-1:
Rise Time vs. Supply
FIGURE 2-4:
Fall Time vs. Supply
Voltage.
Voltage.
60
50
40
30
20
10
60
50
40
30
20
10
12V
12V
18V
5V
5V
18V
0
0
100
1000
10000
100
1000
10000
Capacitive Load (pF)
Capacitive Load (pF)
FIGURE 2-2:
Rise Time vs. Capacitive
FIGURE 2-5:
Fall Time vs. Capacitive
Load.
Load.
60
24
VDD = 18V
VDD = 12V
22
20
18
16
14
12
10
55
tD1
tFALL
50
tRISE
45
tD2
40
35
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
4
5
6
7
8
9
10
11
12
Input Amplitude (V)
FIGURE 2-3:
Rise and Fall Times vs.
FIGURE 2-6:
Propagation Delay vs. Input
Temperature.
Amplitude.
© 2008 Microchip Technology Inc.
DS22062B-page 7
MCP14E3/MCP14E4/MCP14E5
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
140
120
100
80
80
70
60
50
40
VDD = 12V
tD1
tD1
tD2
tD2
60
40
20
4
6
8
10
12
14
16
18
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Supply Voltage (V)
FIGURE 2-7:
Propagation Delay Time vs.
FIGURE 2-10:
Propagation Delay Time vs.
Supply Voltage.
Temperature.
1.4
1.2
1.8
VDD = 18V
1.6
Input = 1
1.4
1.2
1.0
0.8
0.6
0.4
1.0
0.8
0.6
0.4
0.2
0.0
Input = 1
Input = 0
Input = 0
0.2
4
6
8
10
12
14
16
18
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Supply Voltage (V)
FIGURE 2-8:
Quiescent Current vs.
FIGURE 2-11:
Quiescent Current vs.
Supply Voltage.
Temperature.
8
7
6
8
7
VIN = 5V (MCP14E3)
VIN = 0V (MCP14E4)
VIN = 0V (MCP14E3)
VIN = 5V (MCP14E4)
TA = 125°C
6
5
4
3
2
1
TA = 125°C
5
4
3
2
1
TA = 25°C
TA = 25°C
4
6
8
10
12
14
16
18
4
6
8
10
12
14
16
18
Supply Voltage (V)
Supply Voltage (V)
FIGURE 2-9:
Output Resistance (Output
FIGURE 2-12:
Output Resistance (Output
High) vs. Supply Voltage.
Low) vs. Supply Voltage.
DS22062B-page 8
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
120
120
100
80
60
40
20
0
VDD = 18V
VDD = 18V
10,000 pF
50 kHz
100
6,800 pF
100 kHz
80
400 kHz
200 kHz
4,700 pF
60
40
20
0
2,200 pF
650 kHz
100 pF
100
1000
10000
10000
10000
10
100
Frequency (kHz)
1000
1000
1000
Capacitive Load (pF)
FIGURE 2-13:
Capacitive Load.
Supply Current vs.
FIGURE 2-16:
Frequency.
Supply Current vs.
70
70
VDD = 12V
VDD = 12V
10,000 pF
6,800 pF
50 kHz
60
50
60
50
40
30
20
10
100 kHz
200 kHz
4,700 pF
400 kHz
40
30
20
10
0
2,200 pF
650 kHz
100 pF
0
100
1000
10
100
Capacitive Load (pF)
Frequency (kHz)
FIGURE 2-14:
Capacitive Load.
Supply Current vs.
FIGURE 2-17:
Frequency.
Supply Current vs.
35
35
VDD = 6V
VDD = 6V
10,000 pF
6,800 pF
50 kHz
30
25
20
15
30
25
20
15
10
5
100 kHz
400 kHz
200 kHz
4,700 pF
2,200 pF
650 kHz
10
5
100 pF
0
0
100
1000
10
100
Capacitive Load (pF)
Frequency (kHz)
FIGURE 2-15:
Supply Current vs.
FIGURE 2-18:
Supply Current vs.
Capacitive Load.
Frequency.
© 2008 Microchip Technology Inc.
DS22062B-page 9
MCP14E3/MCP14E4/MCP14E5
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VDD = 18V
VDD = 12V
VHI
VLO
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
FIGURE 2-19:
Input Threshold vs.
FIGURE 2-22:
Enable Hysteresis vs.
Temperature.
Temperature.
2.0
1.8
1E-06
1E-07
1E-08
VHI
1.6
VLO
1.4
1.2
1.0
1E-09
4
4
6
8
10
12
14
16
18
6
8
10
12
14
16
18
Supply Voltage (V)
Supply Voltage (V)
Note:
The values on this graph represent the
loss seen by both drivers in a package
during one complete cycle.
FIGURE 2-20:
Voltage.
Input Threshold vs. Supply
For a single driver, divide the stated
value by 2.
For a signal transition of a single driver,
divide the state value by 4.
3.1
2.9
2.7
VDD = 12V
VEN_H
2.5
2.3
2.1
1.9
1.7
1.5
FIGURE 2-23:
Supply Voltage.
Crossover Energy vs.
VEN_L
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
FIGURE 2-21:
Enable Threshold vs.
Temperature.
DS22062B-page 10
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
8-Pin
PDIP, SOIC
8-Pin
Symbol
6x5 DFN
Description
1
2
1
2
ENB_A
IN A
Output A Enable
Input A
3
3
GND
Ground
4
4
IN B
Input B
5
5
OUT B
VDD
Output B
6
6
Supply Input
Output A
7
7
OUT A
ENB_B
NC
8
8
Output B Enable
Exposed Metal Pad
—
PAD
Note:
Duplicate pins must be connected for proper operation.
3.1
Control Inputs A and B
3.5
Enable A (ENB_A)
The MOSFET driver inputs are a high-impedance TTL/
CMOS compatible input. The inputs also have hystere-
sis between the high and low input levels, allowing
them to be driven from slow rising and falling signals
and to provide noise immunity.
The ENB_A pin is the enable control for Output A. This
enable pin is internally pulled up to VDD for active high
operation and can be left floating for standard
operation. When the ENB_A pin is pulled below the
enable pin Low Level Input Voltage (VEN_L), Output A
will be in the off state regardless of the input pin state.
3.2
Outputs A and B
3.6
Enable B (ENB_B)
Outputs A and B are CMOS push-pull outputs that are
capable of sourcing and sinking 4.0A of peak current
(VDD = 18V). The low output impedance ensures the
gate of the MOSFET will stay in the intended state even
during large transients. These outputs also have a
reverse latch-up rating of 1.5A.
The ENB_B pin is the enable control for Output B. This
enable pin is internally pulled up to VDD for active high
operation and can be left floating for standard
operation. When the ENB_B pin is pulled below the
enable pin Low-Level Input Voltage (VEN_L), Output B
will be in the off state regardless of the input pin state.
3.3
Supply Input (VDD)
3.7
DFN Exposed Pad
VDD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local ceramic capacitor.
This bypass capacitor provides a localized low-imped-
ance path for the peak currents that are to be provided
to the load.
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
3.4
Ground (GND)
Ground is the device return pin. The ground pin(s)
should have a low impedance connection to the bias
supply source return. High peak currents will flow out
the ground pin(s) when the capacitive load is being
discharged.
© 2008 Microchip Technology Inc.
DS22062B-page 11
MCP14E3/MCP14E4/MCP14E5
4.0
4.1
APPLICATION INFORMATION
General Information
VDD = 18V
1 µF
MOSFET drivers are high-speed, high current devices
which are intended to source/sink high peak currents to
charge/discharge the gate capacitance of external
MOSFETs or IGBTs. In high frequency switching power
supplies, the PWM controller may not have the drive
capability to directly drive the power MOSFET. A MOS-
FET driver like the MCP14E3/MCP14E4/MCP14E5
family can be used to provide additional source/sink
current capability.
0.1 µF
Ceramic
Input
Input
Output
CL = 2200 pF
MCP14E4
(1/2 MCP14E5)
An additional degree of control has been added to the
MCP14E3/MCP14E4/MCP14E5 family. There are
separate enable functions for each driver that allow for
the immediate termination of the output pulse
regardless of the state of the input signal.
+5V
90%
Input
4.2
MOSFET Driver Timing
10%
0V
The ability of a MOSFET driver to transition from a fully
off state to a fully on state are characterized by the
drivers rise time (tR), fall time (tF), and propagation
delays (tD1 and tD2). The MCP14E3/MCP14E4/
MCP14E5 family of drivers can typically charge and
discharge a 2200 pF load capacitance in 15 ns along
with a typical matched propagation delay of 50 ns.
Figure 4-1 and Figure 4-2 show the test circuit and
timing waveform used to verify the MCP14E3/
MCP14E4/MCP14E5 timing.
18V
90%
90%
tD1
tD2
tF
tR
Output
0V
10%
10%
FIGURE 4-2:
Waveform.
Non-Inverting Driver Timing
4.3
Enable Function
The ENB_A and ENB_B enable pins allow for indepen-
dent control of OUT A and OUT B respectively. They
are active high and are internally pulled up to VDD so
that the default state is to enable the driver. These pins
can be left floating for normal operation.
VDD = 18V
0.1 µF
1 µF
Ceramic
When an enable pin voltage is above the enable pin
high threshold voltage, VEN_H (2.4V typical), that driver
output is enabled and allowed to react to changes in
the INPUT pin voltage state. Likewise, when the enable
pin voltage falls below the enable pin low threshold
voltage, VEN_L (2.0V typical), that driver output is dis-
abled and does not respond the changes in the INPUT
pin voltage state. When the driver is disabled, the out-
put goes to a low state. Refer to Table 4-1 for enable
pin logic. The threshold voltages of the enable function
are compatible with logic levels. Hysteresis is provided
to help increase the noise immunity of the enable
function, avoiding false triggers of the enable signal
during driver switching. For robust designs, it is
recommended that the slew rate of the enable pin
signal be greater than 1 V/ns.
Input
Input
Output
CL = 2200 pF
MCP14E3
(1/2 MCP14E5)
+5V
90%
Input
0V
10%
tD1
tD2
tF
tR
18V
90%
90%
10%
Output
There are propagation delays associated with the
driver receiving an enable signal and the output
reacting. These propagation delays, tD3 and tD4, are
graphically represented in Figure 4-3.
10%
0V
FIGURE 4-1:
Waveform.
Inverting Driver Timing
DS22062B-page 12
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
TABLE 4-1:
ENB_A
ENABLE PIN LOGIC
MCP14E3
MCP14E4
MCP14E5
ENB_B
IN A
IN B
OUT A
OUT B
OUT A
OUT B
OUT A
OUT B
H
H
H
H
L
H
H
H
H
L
H
H
L
H
L
L
L
L
H
L
H
H
L
H
L
L
L
H
L
H
L
H
H
L
H
L
H
H
L
H
L
L
H
L
L
X
X
L
L
L
Placing a ground plane beneath the MCP14E3/
MCP14E4/MCP14E5 will help as a radiated noise
shield as well as providing some heat sinking for power
dissipated within the device.
5V
ENB_x
0V
VEN_H
4.6
Power Dissipation
VEN_L
The total internal power dissipation in a MOSFET driver
is the summation of three separate power dissipation
elements.
tD3
tD4
VDD
EQUATION 4-1:
90%
PT = PL + PQ + PCC
OUT x
Where:
PT
PL
=
=
=
=
Total power dissipation
10%
Load power dissipation
0V
PQ
Quiescent power dissipation
Operating power dissipation
PCC
FIGURE 4-3:
Enable Timing Waveform.
4.6.1
CAPACITIVE LOAD DISSIPATION
4.4
Decoupling Capacitors
The power dissipation caused by a capacitive load is a
direct function of frequency, total capacitive load, and
supply voltage. The power lost in the MOSFET driver
for a complete charging and discharging cycle of a
MOSFET is:
Careful layout and decoupling capacitors are highly
recommended when using MOSFET drivers. Large
currents are required to charge and discharge
capacitive loads quickly. For example, 2.5A are needed
to charge a 2200 pF load with 18V in 16 ns.
To operate the MOSFET driver over a wide frequency
range with low supply impedance, a ceramic and low
ESR film capacitor are recommended to be placed in
parallel between the driver VDD and GND. A 1.0 µF low
ESR film capacitor and a 0.1 µF ceramic capacitor
should be used. These capacitors should be placed
close to the driver to minimized circuit board parasitics
and provide a local source for the required current.
EQUATION 4-2:
2
PL = f × CT × VDD
Where:
f
CT
=
=
=
Switching frequency
Total load capacitance
MOSFET driver supply voltage
VDD
4.5
PCB Layout Considerations
Proper PCB layout is important in a high current, fast
switching circuit to provide proper device operation and
robustness of design. PCB trace loop area and
inductance should be minimized by the use of ground
planes or trace under MOSFET gate drive signals,
separate analog and power grounds, and local driver
decoupling.
© 2008 Microchip Technology Inc.
DS22062B-page 13
MCP14E3/MCP14E4/MCP14E5
4.6.2
QUIESCENT POWER DISSIPATION
The power dissipation associated with the quiescent
current draw of the MCP14E3/MCP14E4/MCP14E5
depends upon the state of the input and enable pins.
Refer to the DC Characteristic table for the quiescent
current draw for specific combinations of input and
enable pin states. The quiescent power dissipation is:
EQUATION 4-3:
PQ = (IQH × D + IQL × (1 – D)) × VDD
Where:
IQH
=
Quiescent current in the high
state
D
=
=
Duty cycle
IQL
Quiescent current in the low
state
VDD
=
MOSFET driver supply voltage
4.6.3
OPERATING POWER DISSIPATION
The operating power dissipation occurs each time the
MOSFET driver output transitions because for a very
short period of time both MOSFETs in the output stage
are on simultaneously. This cross-conduction current
leads to a power dissipation describes as:
EQUATION 4-4:
PCC = CC × f × VDD
Where:
CC
=
Cross-conduction constant
(A*sec)
f
=
=
Switching frequency
VDD
MOSFET driver supply voltage
DS22062B-page 14
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
5.0
5.1
PACKAGING INFORMATION
Package Marking Information (Not to Scale)
8-Lead DFN-S (6x5)
Example:
XXXXXXX
XXXXXXX
XXYYWW
NNN
MCP14E3
e
3
E/MF^
0814
256
8-Lead PDIP (300 mil)
Example:
MCP14E3
XXXXXXXX
XXXXXNNN
e
3
E/P^^256
0814
YYWW
8-Lead SOIC (150 mil)
Example:
MCP14E3E
XXXXXXXX
XXXXYYWW
e
3
SN^0814
NNN
256
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2008 Microchip Technology Inc.
DS22062B-page 15
MCP14E3/MCP14E4/MCP14E5
8-Lead Plastic Dual Flat, No Lead Package (MF) – 6x5 mm Body [DFN-S]
PUNCH SINGULATED
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
e
L
D1
b
N
N
K
E
E2
E1
EXPOSED
PAD
NOTE 1
1
2
2
1
NOTE 1
D2
TOP VIEW
BOTTOM VIEW
φ
A2
A
A3
A1
NOTE 2
Units
MILLIMETERS
NOM
Dimension Limits
MIN
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
0.85
Overall Height
A
–
–
1.00
0.80
0.05
Molded Package Thickness
Standoff
A2
A1
A3
D
0.65
0.00
0.01
Base Thickness
0.20 REF
4.92 BSC
4.67 BSC
4.00
Overall Length
Molded Package Length
Exposed Pad Length
Overall Width
D1
D2
E
3.85
4.15
5.99 BSC
5.74 BSC
2.31
Molded Package Width
Exposed Pad Width
Contact Width
E1
E2
b
2.16
0.35
0.50
0.20
–
2.46
0.47
0.75
–
0.40
Contact Length
L
0.60
Contact-to-Exposed Pad
Model Draft Angle Top
K
–
φ
–
12°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-113B
DS22062B-page 16
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
8-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
N
NOTE 1
E1
3
1
2
D
E
A2
A
L
A1
c
e
eB
b1
b
Units
INCHES
Dimension Limits
MIN
NOM
8
MAX
Number of Pins
Pitch
N
e
.100 BSC
–
Top to Seating Plane
A
–
.210
.195
–
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.290
.240
.348
.115
.008
.040
.014
–
.130
–
.310
.250
.365
.130
.010
.060
.018
–
.325
.280
.400
.150
.015
.070
.022
.430
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
b1
b
Lower Lead Width
Overall Row Spacing §
eB
Notes:
1. Pin 1 visual index feature may vary, but must be located with the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-018B
© 2008 Microchip Technology Inc.
DS22062B-page 17
MCP14E3/MCP14E4/MCP14E5
8-Lead Plastic Small Outline (SN) – Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
e
N
E
E1
NOTE 1
1
2
3
α
h
b
h
c
φ
A2
A
L
A1
L1
β
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
A
–
–
1.75
–
Molded Package Thickness
Standoff §
A2
A1
E
1.25
0.10
–
–
0.25
Overall Width
6.00 BSC
Molded Package Width
Overall Length
E1
D
h
3.90 BSC
4.90 BSC
Chamfer (optional)
Foot Length
0.25
0.40
–
0.50
1.27
L
–
Footprint
L1
φ
1.04 REF
Foot Angle
0°
0.17
0.31
5°
–
–
–
–
–
8°
Lead Thickness
Lead Width
c
0.25
0.51
15°
b
Mold Draft Angle Top
Mold Draft Angle Bottom
α
β
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic.
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-057B
DS22062B-page 18
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢍꢓꢔꢆMꢆꢓꢄꢕꢕꢖꢗꢘꢆꢙꢚꢛꢜꢆꢎꢎꢆ ꢖꢅ!ꢆ"ꢍꢏ#$%
ꢓꢖꢊꢃ& AꢀꢁurꢁꢁpꢀꢀrꢁhpxhtrꢁqꢀhvtꢂꢁyrhrꢁrrꢁurꢁHvpꢀpuvꢁQhpxhtvtꢁTrpvsvphvꢁyphrqꢁhꢁ
u)ꢃꢃꢄvpꢀpuvꢄpꢃhpxhtvt
© 2008 Microchip Technology Inc.
DS22062B-page 19
MCP14E3/MCP14E4/MCP14E5
NOTES:
DS22062B-page 20
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
APPENDIX A: REVISION HISTORY
Revision B (April 2008)
The following is the list of modifications:
1. Correct examples in Product identification
System page.
Revision A (September 2007)
• Original Release of this Document.
© 2008 Microchip Technology Inc.
DS22062B-page 21
MCP14E3/MCP14E4/MCP14E5
NOTES:
DS22062B-page 22
© 2008 Microchip Technology Inc.
MCP14E3/MCP14E4/MCP14E5
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
X
XX
a) MCP14E3-E/MF: 4.0A Dual Inverting
MOSFET Driver,
Temperature Package
Range
8LD DFN package.
b) MCP14E3-E/P:
4.0A Dual Inverting
MOSFET Driver,
Device:
MCP14E3: 4.0A Dual MOSFET Driver, Inverting
MCP14E3T: 4.0A Dual MOSFET Driver, Inverting
Tape and Reel
MCP14E4: 4.0A Dual MOSFET Driver, Non-Inverting
MCP14E4T: 4.0A Dual MOSFET Driver, Non-Inverting
Tape and Reel
8LD PDIP package.
c) MCP14E3-E/SN: 4.0A Dual Inverting
MOSFET Driver,
8LD SOIC package.
MCP14E5: 4.0A Dual MOSFET Driver, Complementary
MCP14E5T: 4.0A Dual MOSFET Driver, Complementary
Tape and Reel
a) MCP14E4-E/MF: 4.0A Dual Non-Inverting
MOSFET Driver,
8LD DFN package.
b) MCP14E4-E/P:
4.0A Dual Non-Inverting
MOSFET Driver,
8LD PDIP package.
Temperature Range:
Package: *
E
=
-40°C to +125°C
MF
P
SN
=
=
=
Dual, Flat, No-Lead (6x5 mm Body), 8-lead
Plastic DIP, (300 mil body), 8-lead
Plastic SOIC (150 mil Body), 8-Lead
c) MCP14E4T-E/SN: Tape and Reel,
4.0A Dual Non-Inverting
MOSFET Driver,
8LD SOIC package.
* All package offerings are Pb Free (Lead Free)
a) MCP14E5T-E/MF: Tape and Reel,
4.0A Dual Complementary
MOSFET Driver,
8LD DFN package.
b) MCP14E5-E/P:
4.0A Dual Complementary
MOSFET Driver,
8LD PDIP package.
c) MCP14E5-E/SN: 4.0A Dual Complementary
MOSFET Driver,
8LD SOIC package.
© 2008 Microchip Technology Inc.
DS22062B-page 23
MCP14E3/MCP14E4/MCP14E5
NOTES:
DS22062B-page 24
© 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PRO MATE, rfPIC and SmartShunt are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2008 Microchip Technology Inc.
DS22062B-page 25
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
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Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
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Tel: 45-4450-2828
Fax: 45-4485-2829
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Tel: 91-11-4160-8631
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Tel: 33-1-69-53-63-20
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Fax: 765-864-8387
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
01/02/08
DS22062B-page 26
© 2008 Microchip Technology Inc.
MCP14E4 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
MCP14E4EMF | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E4EP | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E4ESN | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E4TEMF | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E4TEP | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E4TESN | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E5 | MICROCHIP | The MCP14E3/E4/E5 devices are a family of 4 A, dual output MOSFET gate drivers with separate enabl | 获取价格 | |
MCP14E5-E | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E5EMF | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 | |
MCP14E5EP | MICROCHIP | 4.0A Dual High-Speed Power MOSFET Drivers With Enable | 获取价格 |
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