概述
规格参数
数据手册
替代型号NCP435FCT2G 概述
受控负载开关，超小型，2.0 A，带自动放电路径 USB芯片 MOSFET 驱动器
NCP435FCT2G 规格参数
| 是否无铅： | 不含铅 | 生命周期： | Active |
| 包装说明： | VFBGA, BGA4,2X2,20 | 针数： | 4 |
| Reach Compliance Code： | compliant | ECCN代码： | EAR99 |
| HTS代码： | 8542.39.00.01 | Factory Lead Time： | 4 weeks |
| 风险等级： | 1.56 | 驱动器位数： | 1 |
| 高边驱动器： | YES | 接口集成电路类型： | BUFFER OR INVERTER BASED MOSFET DRIVER |
| JESD-30 代码： | S-PBGA-B4 | JESD-609代码： | e1 |
| 长度： | 0.96 mm | 湿度敏感等级： | 1 |
| 功能数量： | 1 | 端子数量： | 4 |
| 最高工作温度： | 85 °C | 最低工作温度： | -40 °C |
| 最大输出电流： | 2 A | 封装主体材料： | PLASTIC/EPOXY |
| 封装代码： | VFBGA | 封装等效代码： | BGA4,2X2,20 |
| 封装形状： | SQUARE | 封装形式： | GRID ARRAY, VERY THIN PROFILE, FINE PITCH |
| 电源： | 1/3.6 V | 认证状态： | Not Qualified |
| 座面最大高度： | 0.63 mm | 子类别： | Peripheral Drivers |
| 最大供电电压： | 3.6 V | 最小供电电压： | 1 V |
| 标称供电电压： | 3.3 V | 表面贴装： | YES |
| 温度等级： | INDUSTRIAL | 端子面层： | Tin/Silver/Copper (Sn/Ag/Cu) |
| 端子形式： | BALL | 端子节距： | 0.5 mm |
| 端子位置： | BOTTOM | 接通时间： | 190 µs |
| 宽度： | 0.96 mm | Base Number Matches： | 1 |
NCP435FCT2G 数据手册
通过下载NCP435FCT2G数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载NCP434, NCP435
2A Ultra-Small Controlled
Load Switch with
Auto-Discharge Path
The NCP434 and NCP435 are a low Ron MOSFET controlled by
external logic pin, allowing optimization of battery life, and portable
device autonomy.
Indeed, due to a current consumption optimization with PMOS
structure, leakage currents are eliminated by isolating connected IC’s
on the battery when not used.
http://onsemi.com
MARKING
DIAGRAM
1
Output discharge path is also embedded to eliminate residual
voltages on the output (NCP435 only).
WLCSP4
CASE 567FG
XX
Available in wide input voltage range from 1.0 V to 4.0 V, and a very
small 0.96 x 0.96 mm WLCSP4, 0.5 mm pitch.
XX
= Specific Device Code
Features
PIN DIAGRAM
• 1 V − 3.6 V Operating Range
• 29 mW P MOSFET at 3.3 V
• DC current up to 2 A
• Output Auto−discharge (NCP435)
• Active high EN pin
• WLCSP4 0.96 x 0.96 mm
• These are Pb−Free Devices
1
2
A
OUT
IN
B
GND
EN
Typical Applications
• Mobile Phones
• Tablets
(Top View)
• Digital Cameras
• GPS
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
• Portable Devices
V+
LS
NCP435
DCDC Converter
A2
A1
B1
Platform IC’n
IN OUT
EN GND
or
LDO
B2
ENx
EN
0
Figure 1. Typical Application Circuit
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
March, 2013 − Rev. 4
NCP435/D
NCP434, NCP435
PIN FUNCTION DESCRIPTION
Pin Name
Pin Number
Type
Description
IN
A2
POWER
Load−switch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND as
close as possible to the IC.
GND
EN
B1
B2
A1
POWER
INPUT
Ground connection.
Enable input, logic high turns on power switch.
OUT
OUTPUT
Load−switch output; connect a 1 mF ceramic capacitor from OUT to GND as close as
possible to the IC is recommended.
BLOCK DIAGRAM
IN: Pin A2
OUT: Pin A1
Gate driver and soft
start control
Control
logic
EN: Pin B2
EN block
Optional:
NCP435
GND: Pin B1
Figure 2. Block Diagram
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
IN, OUT, EN, Pins
V
V
V
−0.3 to + 4.0
0 to + 4.0
EN , IN , OUT
From IN to OUT Pins: Input/Output
Maximum Junction Temperature
Storage Temperature Range
Moisture Sensitivity (Note 1)
V
V
V
IN , OUT
T
−40 to + 125
−40 to + 150
Level 1
°C
°C
J
T
STG
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
http://onsemi.com
2
NCP434, NCP435
OPERATING CONDITIONS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
Operational Power Supply
Enable Voltage
1.0
3.6
V
IN
V
EN
0
−40
1
3.6
T
Ambient Temperature Range
Decoupling input capacitor
Decoupling output capacitor
25
+85
°C
mF
mF
A
C
IN
C
1
OUT
R
Thermal Resistance Junction−to−Air
WLCSP package (Note 6)
100
°C/W
q
JA
I
Maximum DC current
2
A
OUT
P
D
Power Dissipation Rating (Note 7)
T
≤ 25°C
WLCSP package
WLCSP package
0.5
0.2
W
W
A
T = 85°C
A
2. According to JEDEC standard JESD22−A108.
3. This device series contains ESD protection and passes the following tests:
4. Human Body Model (HBM) 4.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) 250 V per JEDEC standard: JESD22−A115 for all pins.
Charge Device Model (CDM) 2.0 kV per JEDEC standard: JESD22−C101 for all pins.
5. Latch up Current Maximum Rating: 100 mA per JEDEC standard: JESD78 class II.
6. The R
is dependent of the PCB heat dissipation and thermal via.
q
JA
7. The maximum power dissipation ( ) is given by the following formula:
PD
T
JMAX * TA
PD
+
RqJA
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3
NCP434, NCP435
ELECTRICAL CHARACTERISTICS Min and Max Limits apply for T between −40°C to +85°C for
between 1.0 V to 3.6 V
VIN
A
(Unless otherwise noted). Typical values are referenced to T = +25°C and V = 3.3 V (Unless otherwise noted).
A
IN
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
POWER SWITCH
Static drain−source on−
V
= 4 V
T = 25°C, I = 200 mA (Note 9)
27
29
30
34
mW
IN
A
state resistance
V
= 3.3 V
= 3.3 V
= 1.8 V
= 1.2 V
= 1.1 V
T = 25°C, I = 200 mA
A
IN
IN
IN
IN
IN
V
V
V
V
T = 85°C
A
38
R
DS(on)
T = 25°C, I = 200 mA
A
43
80
52
T = 25°C, I = 200 mA
A
120
T = 25°C, I = 100 mA
A
110
65
R
Output discharge path
Output rise time
EN = low
V
IN
= 3.3 V, NCP435 only
90
90
W
DIS
T
R
V
IN
= 3.3 V
C
C
= 1 mF, R
= 25 W
= 25 W
35
20
61
ms
LOAD
LOAD
(Note 8)
T
F
Output fall time
V
IN
= 3.3 V
= 1 mF, R
42
70
ms
LOAD
LOAD
(Note 8)
T
Gate turn on
Enable time
V
V
= 3.3 V
= 3.3 V
Gate turn on + Output rise time
From EN low to high to
65
30
126
66
190
100
ms
ms
on
IN
T
en
IN
V
= 10% of fully on
OUT
V
High−level input voltage
Low−level input voltage
Pull down resistor
0.9
V
V
IH
V
0.5
7
IL
R
5.1
MW
EN
QUIESCENT CURRENT
Current consumption
8. Parameters are guaranteed for C
V
= 3.3 V, EN = low, No load
= 3.3 V, EN = high, No load
0.15
0.3
0.6
0.6
mA
mA
IN
I
Q
V
IN
and R
connected to the OUT pin with respect to the ground
9. Guaranteed by design and characterization, not production tested.
LOAD
LOAD
TIMINGS
V
IN
EN
V
OUT
T
T
R
T
T
F
EN
DIS
T
OFF
T
ON
Figure 3. Enable, Rise and fall time
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4
NCP434, NCP435
TYPICAL CHARACTERISTICS
Figure 4. RDS(on) (mW) vs. VIN (V) from
Figure 5. RDS(on) (mW) vs. VIN (V) from
1 V to 2. 6 V
1 V to 4 V
Figure 6. RDS(on) (mW) vs. Iload (mA)
Figure 7. RDS(on) (mW) vs. Temperature
(5C)
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5
NCP434, NCP435
Figure 8. RDS(on) (mW) vs.
Temperature (5C) at 1.2 V and
3.6 V
Figure 9. RDS(on) (mW) vs.
Current (mA)
Figure 10. Standby Current (mA)
Figure 11. Standby Current (mA)
versus VIN (V), No Load
versus VIN (V), VOUT Short to GND
Figure 12. Quiescent Current (mA) versus VIN (V), No Load
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6
NCP434, NCP435
Figure 13. Enable Time, Rise Time, and Ton Time
Figure 14. Disable Time, Fall Time and Toff Time
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7
NCP434, NCP435
FUNCTIONAL DESCRIPTION
Overview
The auto−discharge is activated when EN pin is set to low
level (disable state).
The discharge path ( Pull down NMOS) stays activated as
The NCP434 − NCP435 are high side P channel MOSFET
power distribution switch designed to isolate ICs connected
on the battery in order to save energy. The part can be turned
on, with a range of battery from 1.0 V to 4 V.
long as EN pin is set at low level and V > 1.0 V.
IN
In order to limit the current across the internal discharge
NMOSFET, the typical value is set at 65 W.
Enable Input
Enable pin is an active high. The path is opened when EN
pin is tied low (disable), forcing P MOS switch off.
CIN and COUT Capacitors
IN and OUT, 1 mF, at least, capacitors must be placed as
close as possible the part for stability improvement.
The IN/OUT path is activated with a minimum of V of
IN
1.0 V and EN forced to high level.
Auto Discharge (NCP435 Only)
NMOS FET is placed between the output pin and GND,
in order to discharge the application capacitor connected on
OUT pin.
APPLICATION INFORMATION
Power Dissipation
TJ + RD RqJA ) TA
Main contributor in term of junction temperature is the
power dissipation of the power MOSFET. Assuming this,
the power dissipation and the junction temperature in
normal mode can be calculated with the following
equations:
T
= Junction temperature (°C)
= Package thermal resistance (°C/W)
= Ambient temperature (°C)
J
R
T
qJA
A
PCB Recommendations
Ǔ2
The NCP434 − NCP435 integrate an up to 2 A rated
PMOS FET, and the PCB design rules must be respected to
properly evacuate the heat out of the silicon. By increasing
ǒ
P
D + RDS(on) IOUT
P
D
= Power dissipation (W)
PCB area, especially around IN and OUT pins, the R
the package can be decreased, allowing higher power
dissipation.
of
R
I
= Power MOSFET on resistance (W)
= Output current (A)
qJA
DS(on)
OUT
Figure 15. Routing Example 1 oz, 2 Layers, 1005C/W
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8
NCP434, NCP435
Figure 16. Routing Example 2 oz, 4 Layers, 605C/W
Example of Application Definition
At 2 A, 25°C ambient temperature, R
44 mW @ V
DS(on)
IN
1.8 V, the junction temperature will be:
TJ * TA + RqJA PD + RqJA RDS(on) I2
2
Ǔ
+ 25 ) ǒ0.044 2
P
D
T
+ R
100 + 46° C
J
qJA
T : Junction Temperature.
J
T : Ambient Temperature.
A
Taking into account of Rt obtain with:
q
R = Thermal resistance between IC and air, through PCB.
• 2 oz, 4 layers: 60°C/W.
At 2 A, 25°C ambient temperature, R
1.8 V, the junction temperature will be:
q
R : intrinsic resistance of the IC MOSFET.
DS(on)
44 mW @ V
DS(on)
IN
I: load DC current.
Taking into account of R obtain with:
q
2
Ǔ
+ 25 ) ǒ0.044 2
+ T ) R P
D
T
60 + 35.5° C
q
J
A
• 1 oz, 2 layers: 100°C/W.
ORDERING INFORMATION
†
Device
NCP434FCT2G
Marking
Package
Shipping
AJ
WLCSP 0.96 x 0.96 mm
3000 / Tape & Reel
3000 / Tape & Reel
(Pb−Free)
NCP435FCT2G
AH
WLCSP 0.96 x 0.96 mm
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
9
NCP434, NCP435
PACKAGE DIMENSIONS
WLCSP4, 0.96x0.96
CASE 567FG
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
D
A
B
PIN A1
REFERENCE
E
MILLIMETERS
DIM
A
A1
A2
b
MIN
0.54
0.22
MAX
0.63
0.28
2X
0.05
0.05
C
2X
0.33 REF
C
TOP VIEW
0.29
0.34
D
E
e
0.96 BSC
0.96 BSC
0.50 BSC
A2
A
0.05
C
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
A1
0.05
C
A1
SEATING
PLANE
NOTE 3
C
SIDE VIEW
e
4X
4X
b
0.50
PITCH
e
0.25
0.05
0.03
C
C
A B
0.50
B
A
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
1
2
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
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NCP435/D
NCP435FCT2G 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| NCP434FCT2G | ONSEMI | 2A Ultra-Small Controlled Load Switch with | 完全替代 |
|
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