NGD18N40ACLB

更新时间:2025-06-17 12:14:05
品牌:ONSEMI
描述:Ignition IGBT, 18 A, 400 V N.Channel DPAK

NGD18N40ACLB 概述

Ignition IGBT, 18 A, 400 V N.Channel DPAK 点火IGBT , 18 A, 400 V N.Channel DPAK

NGD18N40ACLB 数据手册

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NGD18N40CLB,  
NGD18N40ACLB  
Ignition IGBT, 18 A, 400 V  
NChannel DPAK  
This Logic Level Insulated Gate Bipolar Transistor (IGBT) features  
monolithic circuitry integrating ESD and OverVoltage clamped  
protection for use in inductive coil drivers applications. Primary uses  
include Ignition, Direct Fuel Injection, or wherever high voltage and  
high current switching is required.  
http://onsemi.com  
18 AMPS, 400 VOLTS  
VCE(on) 3 2.0 V @  
Features  
IC = 10 A, VGE . 4.5 V  
Ideal for CoilonPlug Applications  
DPAK Package Offers Smaller Footprint for Increased Board Space  
GateEmitter ESD Protection  
C
Temperature Compensated GateCollector Voltage Clamp Limits  
Stress Applied to Load  
R
G
G
Integrated ESD Diode Protection  
R
GE  
New Design Increases Unclamped Inductive Switching (UIS) Energy  
Per Area  
Low Threshold Voltage Interfaces Power Loads to Logic or  
Microprocessor Devices  
Low Saturation Voltage  
High Pulsed Current Capability  
E
4
DPAK  
CASE 369C  
STYLE 7  
2
3
1
Optional Gate Resistor (R ) and GateEmitter Resistor (R  
)
G
GE  
Emitter Ballasting for ShortCircuit Capability  
These are PbFree Devices  
MARKING DIAGRAM  
1
Gate  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
YWW  
G18  
N40xG  
4
2
Collector  
Rating  
CollectorEmitter Voltage  
CollectorGate Voltage  
GateEmitter Voltage  
Symbol Value  
Unit  
Collector  
V
CES  
V
CER  
430  
430  
18  
V
DC  
V
DC  
V
DC  
3
Emitter  
V
GE  
G18N40x = Device Code  
x = B or A  
Collector CurrentContinuous  
I
C
15  
50  
A
DC  
A
AC  
Y
WW  
G
= Year  
= Work Week  
= PbFree Device  
@ T = 25°C Pulsed  
C
ESD (Human Body Model)  
R = 1500 Ω, C = 100 pF  
ESD  
ESD  
kV  
8.0  
ESD (Machine Model) R = 0 Ω, C = 200 pF  
800  
V
ORDERING INFORMATION  
Total Power Dissipation @ T = 25°C  
Derate above 25°C  
P
D
115  
0.77  
Watts  
W/°C  
C
Device  
Package  
Shipping  
NGD18N40CLBT4G  
DPAK  
(PbFree)  
2500/Tape &  
Reel  
Operating and Storage Temperature Range  
T , T  
55 to  
+175  
°C  
J
stg  
NGD18N40ACLBT4G  
DPAK  
(PbFree)  
2500/Tape &  
Reel  
Stresses exceeding Maximum Ratings may damage the device. Maximum  
Ratings are stress ratings only. Functional operation above the Recommended  
Operating Conditions is not implied. Extended exposure to stresses above the  
Recommended Operating Conditions may affect device reliability.  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
December, 2011 Rev. 8  
NGD18N40CLB/D  
NGD18N40CLB, NGD18N40ACLB  
UNCLAMPED COLLECTORTOEMITTER AVALANCHE CHARACTERISTICS (55° ≤ T 175°C)  
J
Characteristic  
Symbol  
Value  
Unit  
Single Pulse CollectortoEmitter Avalanche Energy  
E
AS  
mJ  
V
CC  
V
CC  
V
CC  
= 50 V, V = 5.0 V, Pk I = 21.1 A, L = 1.8 mH, Starting T = 25°C  
400  
400  
300  
GE  
L
J
= 50 V, V = 5.0 V, Pk I = 16.2 A, L = 3.0 mH, Starting T = 25°C  
GE  
L
J
= 50 V, V = 5.0 V, Pk I = 18.3 A, L = 1.8 mH, Starting T = 125°C  
GE  
L
J
Reverse Avalanche Energy  
= 100 V, V = 20 V, Pk I = 25.8 A, L = 6.0 mH, Starting T = 25°C  
E
AS(R)  
mJ  
V
CC  
2000  
GE  
L
J
MAXIMUM SHORTCIRCUIT TIMES (55°C T 150°C)  
J
Short Circuit Withstand Time 1 (See Figure 17, 3 Pulses with 10 ms Period)  
Short Circuit Withstand Time 2 (See Figure 18, 3 Pulses with 10 ms Period)  
THERMAL CHARACTERISTICS  
t
t
750  
5.0  
ms  
sc1  
ms  
sc2  
Thermal Resistance, Junction to Case  
R
R
1.3  
95  
°C/W  
°C/W  
°C  
θ
JC  
JA  
L
Thermal Resistance, Junction to Ambient  
DPAK (Note 1)  
θ
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 5 seconds  
T
275  
ELECTRICAL CHARACTERISTICS  
Characteristic  
OFF CHARACTERISTICS  
CollectorEmitter Clamp Voltage  
Symbol  
Test Conditions  
Temperature  
Min  
Typ  
Max  
Unit  
BV  
T = 40°C to  
380  
390  
395  
405  
420  
430  
V
DC  
CES  
J
I
C
= 2.0 mA  
= 10 mA  
150°C  
T = 40°C to  
J
I
C
150°C  
T = 25°C  
2.0  
10  
1.0  
20  
40*  
10  
Zero Gate Voltage Collector Current  
I
μA  
DC  
J
CES  
V
V
= 350 V,  
CE  
T = 150°C  
J
= 0 V  
GE  
T = 40°C  
J
V
= 15 V,  
T = 25°C  
J
2.0  
CE  
V
GE  
= 0 V  
T = 25°C  
0.7  
12  
0.1  
33  
36  
32  
13  
1.0  
25*  
1.0  
37  
Reverse CollectorEmitter Leakage Current  
Reverse CollectorEmitter Clamp Voltage  
I
mA  
J
ECS  
T = 150°C  
J
V
= 24 V  
CE  
T = 40°C  
J
T = 25°C  
J
27  
30  
25  
11  
B
V
V
VCES(R)  
DC  
T = 150°C  
J
40  
I
C
= 75 mA  
T = 40°C  
J
35  
GateEmitter Clamp Voltage  
GateEmitter Leakage Current  
Gate Resistor  
BV  
T = 40°C to  
15  
GES  
J
DC  
I
G
= 5.0 mA  
150°C  
I
T = 40°C to  
384  
640  
70  
700  
μA  
DC  
GES  
J
V
= 10 V  
GE  
150°C  
R
T = 40°C to  
Ω
G
J
150°C  
Gate Emitter Resistor  
R
T = 40°C to  
10  
16  
26  
Ω
k
GE  
J
150°C  
1. When surface mounted to an FR4 board using the minimum recommended pad size.  
*Maximum Value of Characteristic across Temperature Range.  
http://onsemi.com  
2
 
NGD18N40CLB, NGD18N40ACLB  
ELECTRICAL CHARACTERISTICS (continued)  
Characteristic  
ON CHARACTERISTICS (Note 2)  
Gate Threshold Voltage  
Symbol  
Test Conditions  
Temperature  
Min  
Typ  
Max  
Unit  
T = 25°C  
J
1.1  
0.75  
1.2  
1.4  
1.0  
1.6  
3.4  
1.9  
1.4  
2.1*  
V
GE(th)  
V
DC  
I
C
= 1.0 mA,  
T = 150°C  
J
V
GE  
= V  
CE  
T = 40°C  
J
Threshold Temperature Coefficient  
(Negative)  
mV/°C  
T = 25°C  
1.0  
0.9  
1.1  
1.3  
1.2  
1.4  
1.4  
1.4  
1.4  
1.8  
2.0  
1.7  
1.3  
1.3  
1.4  
1.4  
1.3  
1.45  
1.6  
1.55  
1.6  
1.8  
1.8  
1.8  
2.2  
2.4  
2.1  
1.8  
1.75  
1.8  
1.6  
1.6  
CollectortoEmitter OnVoltage  
V
CE(on)  
V
DC  
J
I
V
= 6.0 A,  
C
T = 150°C  
J
= 4.0 V  
GE  
T = 40°C  
J
1.7*  
1.9*  
1.8  
T = 25°C  
J
I
C
= 8.0 A,  
T = 150°C  
J
V
= 4.0 V  
GE  
T = 40°C  
J
1.9*  
2.05  
2.0  
T = 25°C  
J
I
V
= 10 A,  
C
T = 150°C  
J
= 4.0 V  
GE  
T = 40°C  
J
2.1*  
2.5  
T = 25°C  
J
I
V
= 15 A,  
C
T = 150°C  
J
2.6*  
2.5  
= 4.0 V  
GE  
T = 40°C  
J
T = 25°C  
J
2.0*  
2.0*  
2.0*  
1.65  
I
V
= 10 A,  
C
T = 150°C  
J
= 4.5 V  
GE  
T = 40°C  
J
I
C
= 6.5 A,  
T = 25°C  
J
V
GE  
= 3.7 V  
Forward Transconductance  
gfs  
V
= 5.0 V, I = 6.0 A  
T = 40°C to  
8.0  
14  
25  
Mhos  
pF  
CE  
C
J
150°C  
DYNAMIC CHARACTERISTICS  
Input Capacitance  
C
400  
50  
800  
75  
1000  
100  
10  
ISS  
T = 40°C to  
V
= 25 V, V = 0 V  
J
CC  
GE  
Output Capacitance  
C
OSS  
RSS  
150°C  
f = 1.0 MHz  
Transfer Capacitance  
C
4.0  
7.0  
SWITCHING CHARACTERISTICS  
TurnOff Delay Time (Resistive)  
t
V
= 300 V, I = 6.5 A  
T = 25°C  
4.0  
9.0  
0.7  
4.5  
10  
15  
μSec  
μSec  
d(off)  
CC  
C
J
R
= 1.0 kΩ, R = 46 Ω,  
G
L
Fall Time (Resistive)  
TurnOn Delay Time  
Rise Time  
t
f
V
CC  
= 300 V, I = 6.5 A  
T = 25°C  
J
C
R
= 1.0 kΩ, R = 46 Ω,  
G
G
G
L
t
V
R
= 10 V, I = 6.5 A  
T = 25°C  
J
4.0  
7.0  
d(on)  
CC  
C
= 1.0 kΩ, R = 1.5 Ω  
L
t
r
V
R
= 10 V, I = 6.5 A  
T = 25°C  
J
CC  
C
= 1.0 kΩ, R = 1.5 Ω  
L
2. Pulse Test: Pulse Width v 300 μS, Duty Cycle v 2%.  
*Maximum Value of Characteristic across Temperature Range.  
http://onsemi.com  
3
 
NGD18N40CLB, NGD18N40ACLB  
TYPICAL ELECTRICAL CHARACTERISTICS (unless otherwise noted)  
60  
50  
40  
30  
20  
10  
0
60  
V
= 10 V  
GE  
5 V  
V
GE  
= 10 V  
50  
40  
30  
20  
10  
0
5 V  
4.5 V  
4.5 V  
4 V  
T = 40°C  
J
4 V  
T = 25°C  
J
3.5 V  
3.5 V  
3 V  
3 V  
2.5 V  
2.5 V  
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
V
CE  
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)  
V
CE  
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)  
Figure 1. Output Characteristics  
Figure 2. Output Characteristics  
60  
55  
50  
45  
40  
35  
30  
25  
20  
15  
10  
60  
50  
40  
30  
20  
10  
0
V
GE  
= 10 V  
V
= 10 V  
CE  
T = 150°C  
T = 40°C  
J
J
5 V  
T = 150°C  
J
4.5 V  
4 V  
T = 25°C  
J
3.5 V  
3 V  
2.5 V  
5
0
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
V
CE  
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)  
V
GE  
, GATE TO EMITTER VOLTAGE (VOLTS)  
Figure 3. Output Characteristics  
Figure 4. Transfer Characteristics  
4.0  
3.5  
3
T = 25°C  
J
V
= 5 V  
GE  
2.5  
I
= 25 A  
= 20 A  
= 15 A  
= 10 A  
= 5 A  
C
I
= 15 A  
= 10 A  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
C
I
C
2
1.5  
1
I
C
I
C
I
= 5 A  
C
I
C
I
C
0.5  
0
50  
25  
0
25  
50  
75  
100  
125 150  
3
4
5
6
7
8
9
10  
T , JUNCTION TEMPERATURE (°C)  
J
GATETOEMITTER VOLTAGE (VOLTS)  
Figure 5. CollectortoEmitter Saturation  
Voltage versus Junction Temperature  
Figure 6. CollectortoEmitter Voltage versus  
GatetoEmitter Voltage  
http://onsemi.com  
4
NGD18N40CLB, NGD18N40ACLB  
10000  
3
2.5  
2
T = 150°C  
J
C
iss  
I
= 15 A  
= 10 A  
= 5 A  
1000  
100  
10  
C
I
C
C
oss  
1.5  
1
I
C
C
rss  
1
0
0.5  
0
0
20  
40 60 80 100 120 140 160 180 200  
3
4
5
6
7
8
9
10  
GATE TO EMITTER VOLTAGE (VOLTS)  
V
CE  
, COLLECTOR TO EMITTER VOLTAGE (VOLTS)  
Figure 7. CollectortoEmitter Voltage versus  
GatetoEmitter Voltage  
Figure 8. Capacitance Variation  
30  
25  
20  
15  
10  
2
V
V
R
= 50 V  
= 5.0 V  
= 1000 Ω  
1.8  
1.6  
1.4  
1.2  
CC  
V
+ 4 σ  
TH  
GE  
V
TH  
G
V
4 σ  
L = 1.8 mH  
TH  
1
0.8  
0.6  
0.4  
L = 3 mH  
L = 6 mH  
5
0
0.2  
0
50 30 10  
10  
30 50 70 90 110 130 150  
50 25  
0
25  
50  
75 100 125 150 175  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 9. Gate Threshold Voltage versus  
Temperature  
Figure 10. Minimum Open Secondary Latch  
Current versus Temperature  
12  
10  
8
30  
25  
20  
15  
10  
V
V
R
= 50 V  
= 5.0 V  
= 1000 Ω  
CC  
V
V
R
= 300 V  
= 5.0 V  
= 1000 Ω  
CC  
GE  
GE  
L = 1.8 mH  
L = 3 mH  
G
t
f
G
I
C
= 10 A  
L = 300 μH  
6
L = 6 mH  
t
d(off)  
4
2
0
5
0
50 25  
0
25  
50  
75 100 125 150 175  
50 30 10  
10  
30  
50 70 90 110 130 150  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Figure 11. Typical Open Secondary Latch  
Current versus Temperature  
Figure 12. Inductive Switching Fall Time  
versus Temperature  
http://onsemi.com  
5
NGD18N40CLB, NGD18N40ACLB  
100  
10  
1
100  
DC  
DC  
10  
100 μs  
1 ms  
1
100 μs  
10 ms  
1 ms  
10 ms  
100 ms  
0.1  
0.1  
100 ms  
0.01  
0.01  
1
10  
100  
1000  
1
10  
100  
1000  
COLLECTOREMITTER VOLTAGE (VOLTS)  
COLLECTOREMITTER VOLTAGE (VOLTS)  
Figure 13. Single Pulse Safe Operating Area  
Figure 14. Single Pulse Safe Operating Area  
(Mounted on an Infinite Heatsink at TA = 255C)  
(Mounted on an Infinite Heatsink at TA = 1255C)  
100  
10  
1
100  
10  
1
t = 1 ms, D = 0.05  
1
t = 1 ms, D = 0.05  
1
t = 2 ms, D = 0.10  
1
t = 2 ms, D = 0.10  
1
t = 3 ms, D = 0.30  
1
t = 3 ms, D = 0.30  
1
0.1  
0.1  
0.01  
0.01  
1
10  
100  
1000  
1
10  
100  
1000  
COLLECTOREMITTER VOLTAGE (VOLTS)  
COLLECTOREMITTER VOLTAGE (VOLTS)  
Figure 15. Pulse Train Safe Operating Area  
Figure 16. Pulse Train Safe Operating Area  
(Mounted on an Infinite Heatsink at TC = 255C)  
(Mounted on an Infinite Heatsink at TC = 1255C)  
V
BATT  
= 16 V  
V
BATT  
= 16 V  
R = 0.1 W  
L
R = 0.1 W  
L
L = 10 mH  
L = 10 mH  
5.0 V  
V
IN  
R = 1 kW  
G
5.0 V  
V
IN  
R = 1 kW  
G
R
= 55 mW  
S
Figure 17. Circuit Configuration for  
Short Circuit Test #1  
Figure 18. Circuit Configuration for  
Short Circuit Test #2  
http://onsemi.com  
6
NGD18N40CLB, NGD18N40ACLB  
100  
10  
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
1
0.1  
0.01  
D CURVES APPLY FOR POWER  
PULSE TRAIN SHOWN  
P
(pk)  
Single Pulse  
READ TIME AT t  
1
t
1
0.001  
0.0001  
t
T
R
T = P  
X R(t) for t 0.2 s  
R
(t)  
JA  
2
q
J(pk)  
A
(pk)  
q
JC  
DUTY CYCLE, D = t /t  
1
2
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t,TIME (S)  
Figure 19. Transient Thermal Resistance  
(Nonnormalized JunctiontoAmbient mounted on  
minimum pad area)  
http://onsemi.com  
7
NGD18N40CLB, NGD18N40ACLB  
PACKAGE DIMENSIONS  
DPAK  
CASE 369C  
ISSUE D  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
C
A
D
2. CONTROLLING DIMENSION: INCHES.  
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-  
MENSIONS b3, L3 and Z.  
A
E
c2  
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH, PROTRUSIONS, OR BURRS. MOLD  
FLASH, PROTRUSIONS, OR GATE BURRS SHALL  
NOT EXCEED 0.006 INCHES PER SIDE.  
5. DIMENSIONS D AND E ARE DETERMINED AT THE  
OUTERMOST EXTREMES OF THE PLASTIC BODY.  
6. DATUMS A AND B ARE DETERMINED AT DATUM  
PLANE H.  
b3  
B
4
2
L3  
L4  
Z
H
DETAIL A  
1
3
INCHES  
DIM MIN MAX  
0.086 0.094  
A1 0.000 0.005  
0.025 0.035  
MILLIMETERS  
MIN  
2.18  
0.00  
0.63  
0.76  
4.57  
0.46  
0.46  
5.97  
6.35  
MAX  
2.38  
0.13  
0.89  
1.14  
5.46  
0.61  
0.61  
6.22  
6.73  
A
b2  
c
b
b
b2 0.030 0.045  
b3 0.180 0.215  
M
0.005 (0.13)  
C
H
e
c
0.018 0.024  
c2 0.018 0.024  
GAUGE  
PLANE  
SEATING  
PLANE  
L2  
C
D
E
e
0.235 0.245  
0.250 0.265  
0.090 BSC  
2.29 BSC  
9.40 10.41  
1.40 1.78  
2.74 REF  
0.51 BSC  
0.89 1.27  
H
L
L1  
L2  
0.370 0.410  
0.055 0.070  
0.108 REF  
L
A1  
L1  
0.020 BSC  
DETAIL A  
L3 0.035 0.050  
ROTATED 905 CW  
L4  
Z
−−− 0.040  
0.155 −−−  
−−−  
3.93  
1.01  
−−−  
STYLE 7:  
PIN 1. GATE  
2. COLLECTOR  
3. EMITTER  
SOLDERING FOOTPRINT*  
4. COLLECTOR  
6.20  
3.00  
0.244  
0.118  
2.58  
0.102  
5.80  
0.228  
1.60  
0.063  
6.17  
0.243  
mm  
inches  
ǒ
Ǔ
SCALE 3:1  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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NGD18N40CLB/D  

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