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PI74FCT162501TA

更新时间：2025-07-09 15:05:56

品牌：PERICOM

描述：Registered Bus Transceiver, FCT Series, 18-Func, 1-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56

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概述
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PI74FCT162501TA 概述

Registered Bus Transceiver, FCT Series, 18-Func, 1-Bit, True Output, CMOS, PDSO56, 0.240 INCH, PLASTIC, TSSOP-56 总线驱动器/收发器

PI74FCT162501TA 规格参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	TSSOP, TSSOP56,.3,20
针数：	56	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.32	Is Samacsys：	N
控制类型：	INDEPENDENT CONTROL	计数方向：	BIDIRECTIONAL
系列：	FCT	JESD-30 代码：	R-PDSO-G56
JESD-609代码：	e0	长度：	14 mm
逻辑集成电路类型：	REGISTERED BUS TRANSCEIVER	最大I（ol）：	0.024 A
位数：	1	功能数量：	18
端口数量：	2	端子数量：	56
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE WITH SERIES RESISTOR	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装等效代码：	TSSOP56,.3,20	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	包装方法：	TUBE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
认证状态：	Not Qualified	座面最大高度：	1.2 mm
子类别：	Bus Driver/Transceivers	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
翻译：	N/A	触发器类型：	POSITIVE EDGE
宽度：	6.1 mm	Base Number Matches：	1

PI74FCT162501TA 数据手册

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^PI74FCT16P⁵⁰I¹7^/14⁶F²⁵C⁰¹T^/11⁶6^2H50⁵⁰1¹T^T

^{18-BIT REGISTE}P^RI^E7^D4^TF^RC^AT^NS1^C6^E2^I5^V0^E1^RT^S

PI74FCT162H501T

Fast CMOS 18-Bit

Registered Transceivers

ProductFeatures

CommonFeatures:

Product Description

Pericom Semiconductor’s PI74FCT series of logic circuits are pro-

duced in the Company’s advanced 0.6 micron CMOS technology,

achieving industry leading speed grades.

• PI74FCT16501T,PI74FCT162501T,andPI74FCT162H501T

are high-speed,

low power devices with high current drive.

ThePI74FCT16501T,PI74FCT162501T,andPI74FCT162H501T

are 18-bit are registered bus transceivers designed with D-type

latches and flip-flops to allow data flow in transparent, latched, and

clocked modes. The Output Enable (OEAB and OEBA, Latch

Enable (LEAB and LEBA) and Clock (CLKAB and CLKBA)

inputs control the data flow in each direction. When LEAB is

HIGH, the device operates in transparent mode for A-to-B data

flow. When LEAB is LOW, the A data is latched if CLKAB is held

at a HIGH or LOW logic level. The A bus data is stored in the latch/

flip-flopontheLOW-to-HIGHtransitionofCLKAB,ifLEABisLOW.

OEABperformstheoutputenablefunctionontheBport. Dataflow

from B port to A port is similar using OEBA, LEBA and CLKBA.

These high-speed, low power devices offer a flow-through

organization for ease of board layout.

• VCC =5V±10%

• Hysteresis on all inputs

• Packages available

–56-pin240milwideplasticTSSOP(A)

–56-pin300milwideplasticSSOP(V)

PI74FCT16501TFeatures

• High output drive: IOH = –32 mA; IOL = 64 mA

• Power off disable outputs permit “live insertion”

• Typical VOLP (Output Ground Bounce) < 1.0V

atVCC =5V,TA =25°C

PI74FCT162501TFeatures

ThePI74FCT16501ToutputbuffersaredesignedwithaPower-Off

disable allowing "live insertion" of boards when used as backplane

drivers.

• Balanced output drivers: ±24 mA

• Reduced system switching noise

• Typical VOLP (Output Ground Bounce) < 0.6V

atVCC =5V,TA =25°C

The PI74FCT162501T has ±24 mA balanced output drivers. It is

designed with current limiting resistors at its outputs to control the

output edge rate resulting in lower ground bounce and undershoot.

This eliminates the need for external terminating resistors for most

interface applications.

PI74FCT162H501TFeatures

• Bus Hold retains last active bus state during 3-state

• Eliminates the need for external pull-up resistors

The PI74FCT162H501T has “Bus Hold” which retains the input’s

last state whenever the input goes to high-impedance preventing

“floating”inputsandeliminatingtheneedforpull-up/downresistors.

Logic Block Diagram

OEAB

CLKBA

LEBA

OEBA

CLKAB

LEAB

TO 17 OTHER CHANNELS

PS2035A 03/11/96

PI74FCT16501/162501/162H501T

18-BIT REGISTERED TRANSCEIVERS

Truth Table^(1,4)

Product Pin Description

Inputs

LEAB CLKAB

Outputs

Pin Name

OEAB

OEBA

LEAB

LEBA

CLKAB

CLKBA

Description

OEAB

A-to-B Output Enable Input

B-to-A Output Enable Input (Active LOW)

A-to-B Latch Enable Input

B-to-A Latch Enable Input

A-to-B Clock Input

↑

B-to-A Clock Input

B⁽²⁾

B⁽³⁾

A-to-B Data Inputs or B-to-A 3-State Outputs⁽¹⁾

B-to-A Data Inputs or A-to-B 3-State Outputs⁽¹⁾

Ground

GND

Notes:

VCC

Power

1. A-to-B data flow is shown. B-to-A data flow is similar but

uses OEBA, LEBA, and CLKBA.

2. Output level before the indicated steady-state input condi-

tions were established.

Note: 1. For the PI74FCT162H501T, these pins have “Bus

Hold.” All other pins are standard, outputs, or I/Os.

3. Output level before the indicated steady-state input condi-

tions were established, provided that CLKAB was LOW

before LEAB went LOW.

Product Pin Configuration

4. H = High Voltage Level

L = Low Voltage Level

Z = High Impedance

↑ = LOW-to-HIGH Transition

OEAB

LEAB

GND

CLKAB

GND

VCC

GND

56-PIN

V56

A56

A10

A11

GND

A12

A13

A14

VCC

A15

A16

GND

A17

OEBA

LEBA

B10

B11

GND

B12

B13

B14

VCC

B15

B16

GND

B17

CLKBA

GND

PS2035A 03/11/96

PI74FCT16501/162501/162H501T

18-BIT REGISTERED TRANSCEIVERS

MaximumRatings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Note:

StorageTemperature .................................................................... –65°Cto+150°C

Stresses greater than those listed under

Ambient Temperature with Power Applied ....................................–40°Cto+85°C MAXIMUM RATINGS may cause permanent

damage to the device. This is a stress rating

Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. –0.5Vto+7.0V

only and functional operation of the device at

Supply Voltage to Ground Potential (Outputs & D/O Only) ........... –0.5Vto+7.0V

DC Input Voltage ............................................................................ –0.5Vto+7.0V

DC Output Current ..................................................................................... 120mA

Power Dissipation ..........................................................................................1.0W

these or any other conditions above those

indicated in the operational sections of this

specification is not implied. Exposure to

absolute maximum rating conditions for

extended periods may affect reliability.

DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%)

Parameters Description

TestConditions⁽¹⁾

Min.

Typ⁽²⁾

Max.

Units

VIH

VIL

IIH

InputHIGHVoltage

GuaranteedLogicHIGHLevel

GuaranteedLogicLOWLevel

Standard Input, VCC = Max.

StandardI/O,VCC =Max.

Bus Hold Input⁽⁴⁾, VCC = Max.

BusHoldI/O⁽⁴⁾, VCC =Max.

Standard Input, VCC = Min.

Standard I/O, VCC = Min.

2.0

Input LOW Voltage

InputHIGHCurrent

Input LOW Current

Bus Hold

0.8

±100

–1

±100

VIN =VCC

VIN =GND

VIN = GND

VIN =2.0V

VIN=0.8V

VOUT =2.7V

VOUT =0.5V

µA

IIH

IIL

Bus Hold Input⁽⁴⁾, VCC = Min.

Bus Hold I/O⁽⁴⁾, VCC = Min.

Bus Hold Input⁽⁴⁾, VCC = Min.

IBHH

IBHL

IOZH

–50

+50

Sustain Current

High-Impedance

Output Current

(5)

VCC =Max.

–1

µA

I^OZL

(3-STATE OUTPUTS)

ClampDiodeVoltage

ShortCircuitCurrent

Output Drive Current

Input Hysteresis

VIK

IOS

VCC = Min., IIN =–18mA

VCC =Max.⁽³⁾,VOUT = GND

VCC =Max.⁽³⁾,VOUT =2.5V

–0.7

–140

–1.2

–200

–180

–80

–50

100

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. Pins with Bus Hold are identified in the pin description.

5. This specification does not apply to bi-directional functionalities with Bus Hold.

PS2035A 03/11/96

PI74FCT16501/162501/162H501T

18-BIT REGISTERED TRANSCEIVERS

PI74FCT16501T Output Drive Characteristics (Over the Operating Range)

Parameters Description

Test Conditions⁽¹⁾

Min. Typ⁽²⁾Max. Units

VOH

Output HIGH Voltage VCC = Min., VIN = VIH or VIL

IOH = –3.0 mA

IOH = –15.0 mA

IOH = –32.0 mA

IOL = 64 mA

2.5

2.4

2.0

3.5

3.0

0.2

—

VOL

I^OFF

Output LOW Voltage

Power Down Disable

VCC = Min., VIN = VIH or VIL

VCC = 0V, VIN or V^OUT≤4.5V

0.55

±100

µA

—

PI74FCT162501T/162H501T Output Drive Characteristics (Over the Operating Range)

Parameters Description

Test Conditions⁽¹⁾

Min. Typ⁽²⁾Max. Units

VOH

VOL

IODL

IODH

Output HIGH Voltage VCC = Min., VIN = VIH or VIL

IOH = –24.0 mA

IOL = 24 mA

2.4

3.3

0.3

115

–115

Output LOW Voltage

Output LOW Current

VCC = Min., VIN = VIH or VIL

VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V⁽³⁾

0.55

150

–150

–60

Output HIGH Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V⁽³⁾

Capacitance (TA = 25°C, f = 1 MHz)

Parameters⁽⁴⁾

Description

Test Conditions

Typ

Max.

Units

CIN

Input Capacitance

Output Capacitance

VIN = 0V

4.5

5.5

COUT

VOUT = 0V

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. This parameter is determined by device characterization but is not production tested.

PS2035A 03/11/96

PI74FCT16501/162501/162H501T

18-BIT REGISTERED TRANSCEIVERS

Power Supply Characteristics

Parameters Description

Test Conditions⁽¹⁾

Min. Typ⁽²⁾Max. Units

ICC

Quiescent Power

Supply Current

VCC = Max.

VIN = GND or VCC

0.1

0.5

500

µA

∆ICC

ICCD

Supply Current per

Input @ TTL HIGH

VIN = 3.4V⁽³⁾

1.5

Supply Current per

Input per MHz⁽⁴⁾

VCC = Max., Outputs Open

OEAB = OEBA = VCC or GND

One Bit Toggling

VIN = VCC

VIN = GND

120

µA/

MHz

50% Duty Cycle

Total Power Supply

Current⁽⁶⁾

VCC = Max.,

Outputs Open

VIN = VCC

VIN = GND

0.8

1.3

1.7⁽⁵⁾

fCP = 10 MHZ (CLKAB)

50% Duty Cycle

OEAB = OEBA = VCC

LEAB = GND

One Bit Toggling

fI = 5 MHZ

VIN = 3.4V

VIN = GND

4.2⁽⁵⁾

50% Duty Cycle

V^CC= Max., Output Open

fCP = 10 MHZ (CLKAB)

50% Duty Cycle

OEAB = OEBA = VCC

LEAB = GND

VIN = VCC

VIN = GND

3.8

8.5

6.5⁽⁵⁾

VIN = 3.4V

VIN = GND

20.8⁽⁵⁾

Eighteen Bits Toggling

fI = 2.5 MHZ

50% Duty Cycle

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.

2. Typical values are at Vcc = 5.0V, +25°C ambient.

3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.

6. IC =IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)

ICC = Quiescent Current

∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)

DH = Duty Cycle for TTL Inputs High

NT = Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)

fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

fI = Input Frequency

NI = Number of Inputs at fI

All currents are in milliamps and all frequencies are in megahertz.

PS2035A 03/11/96

PI74FCT16501/162501/162H501T

18-BIT REGISTERED TRANSCEIVERS

PI74FCT16501T Switching Characteristics over Operating Range

16501AT

Com.

16501CT

Com.

16501DT

Com.

16501ET

Com.

Parameters

Description

Conditions⁽¹⁾

Min

Max

150

5.1

Min

Max

Min

Max

150

4.1

Min

Max

150

3.8

Unit

MHz

MAX

CLKABorCLKBAfrequency

PropagationDelay

= 50 pF

—

150

4.6

—

PLH

PHL

=500Ω

1.5

to B

PropagationDelay

LEBAtoA ,LEABtoB

PropagationDelay

CLKBAtoA ,CLKABtoB

OutputEnableTime

OEBAtoA ,OEABtoB

OutputDisableTime⁽³⁾

OEBAtoA ,OEABtoB

X orAX to BX

PLH

PHL

1.5

3.0

5.6

6.0

5.6

—

1.5

3.0

5.3

5.6

5.2

—

1.5

3.0

4.6

5.2

—

1.5

2.4

4.2

4.8

5.2

—

PLH

PHL

PZH

PZL

PHZ

PLZ

SetupTimeHIGHorLOW

AxtoCLKAB,BxtoCLKBA

HoldTimeHIGHorLOW

AxtoCLKAB,BxtoCLKBA

SetupTime

ClockHIGH

Clock LOW

3.0

—

3.0

—

3.0

—

2.0

—

HIGHorLOW

Ax to LEAB,

Bx to LEBA

1.5

Hold Time HIGH or LOW

Ax to LEAB, Bx to LEBA

1.5

3.0

—

0.5

1.5

3.0

—

0.5

1.5

3.0

—

0.5

3.0

—

0.5

LEAB or LEBA Pulse Width

HIGH⁽³⁾

CLKAB or CLKBA Pulse Width

HIGH or LOW⁽³⁾

(O)

OutputSkew⁽⁴⁾

Notes:

1. See test circuit and wave forms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. This parameter is guaranteed but not production tested.

4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

PS2035A 03/11/96

PI74FCT16501/162501/162H501T

18-BIT REGISTERED TRANSCEIVERS

PI74FCT162501T Switching Characteristics over Operating Range

162501AT

Com.

162501CT

Com.

162501DT

Com.

162501ET

Com.

Parameters

Description

Conditions⁽¹⁾

Min

Max

Min

Max

Min

Max

Min

Max

Unit

MHz

MAX

CLKAB or CLKBA frequency

PropagationDelay

= 50 pF

—

150

5.1

—

150

4.6

—

150

4.1

—

150

3.8

PLH

PHL

= 500Ω

1.5

to B

PropagationDelay

LEBA to A , LEAB to B

PropagationDelay

CLKBA to A , CLKAB to B

Output Enable Time

OEBA to A , OEAB to B

Output Disable Time⁽³⁾

OEBA to A , OEAB to B

X or AX to BX

PLH

PHL

1.5

3.0

5.6

6.0

5.6

—

1.5

3.0

5.3

5.6

5.2

—

1.5

3.0

4.6

5.2

—

1.5

2.4

4.2

4.8

5.2

—

PLH

PHL

PZH

PZL

PHZ

PLZ

Setup Time HIGH or LOW

Ax to CLKAB, Bx to CLKBA

Hold Time HIGH or LOW

—

Ax to CLKAB, Bx to CLKBA

Setup Time

Clock HIGH

Clock LOW

3.0

1.5

—

3.0

1.5

—

3.0

1.5

—

2.0

1.5

—

HIGH or LOW

Ax to LEAB,

Bx to LEBA

Hold Time HIGH or LOW

Ax to LEAB, Bx to LEBA

1.5

3.0

—

0.5

1.5

3.0

—

0.5

1.5

3.0

—

0.5

3.0

—

0.5

LEAB or LEBA Pulse Width

HIGH⁽³⁾

CLKAB or CLKBA Pulse Width

HIGH or LOW⁽³⁾

(O)

OutputSkew⁽⁴⁾

Notes:

1. See test circuit and wave forms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. This parameter is guaranteed but not production tested.

4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

PS2035A 03/11/96

PI74FCT16501/162501/162H501T

18-BIT REGISTERED TRANSCEIVERS

PI74FCT162H501T Switching Characteristics over Operating Range (Advance Information)

162H501AT

Com.

162H501CT

Com.

162H501DT

Com.

162H501ET

Com.

Parameters

Description

Conditions⁽¹⁾

Min

—

Max

150

5.1

Min

—

Max

150

4.6

Min

—

Max

150

4.1

Min

—

Max

150

3.8

Unit

MHz

MAX

CLKAB or CLKBA frequency

PropagationDelay

= 50 pF

PLH

PHL

= 500Ω

1.5

to B

PropagationDelay

LEBA to A , LEAB to B

PropagationDelay

CLKBA to A , CLKAB to B

Output Enable Time

OEBA to A , OEAB to B

Output Disable Time⁽³⁾

OEBA to A , OEAB to B

X or AX to BX

PLH

PHL

1.5

3.0

5.6

6.0

5.6

—

1.5

3.0

5.3

5.6

5.2

—

1.5

3.0

4.6

5.2

—

1.5

2.4

4.2

4.8

5.2

—

PLH

PHL

PZH

PZL

PHZ

PLZ

Setup Time HIGH or LOW

Ax to CLKAB, Bx to CLKBA

Hold Time HIGH or LOW

—

Ax to CLKAB, Bx to CLKBA

Setup Time

Clock HIGH

Clock LOW

3.0

1.5

—

3.0

1.5

—

3.0

1.5

—

2.0

1.5

—

HIGH or LOW

Ax to LEAB,

Bx to LEBA

Hold Time HIGH or LOW

Ax to LEAB, Bx to LEBA

1.5

3.0

—

0.5

1.5

3.0

—

0.5

1.5

3.0

—

0.5

3.0

—

0.5

LEAB or LEBA Pulse Width

HIGH⁽³⁾

CLKAB or CLKBA Pulse Width

HIGH or LOW⁽³⁾

(O)

OutputSkew⁽⁴⁾

Notes:

1. See test circuit and wave forms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. This parameter is guaranteed but not production tested.

4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

PS2035A 03/11/96

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